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ARM: dts: imx6sx: Fix SAI DMA index

PATCH New Fabio Estevam 3 participants 6 messages Apr 1, 2016 – Apr 13, 2016

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Device tree bindings Arm i.MX and Layerscape dmaengine Arm and arm64 SoC sub-architectures (common parts)
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Fabio Estevam

author reviewer
#0 lore raw

PATCH v2 1/4 ARM: dts: imx6sx: Fix SAI DMA index

From: Fabio Estevam <[email protected]>

According to sdma_peripheral_type in include/linux/platform_data/dma-imx.h IMX_DMATYPE_SAI corresponds to index 24, so fix it accordingly.

Suggested-by Zidan Wang <[email protected]>
Signed-off-by Fabio Estevam <[email protected]>

---
Changes since v1:
- None

 arch/arm/boot/dts/imx6sx.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/boot/dts/imx6sx.dtsi +2 -2
index a5f7602..c8269e7 100644
@@ -970,7 +970,7 @@
 					 <&clks 0>, <&clks 0>;
 				clock-names = "bus", "mclk1", "mclk2", "mclk3";
 				dma-names = "rx", "tx";
-				dmas = <&sdma 31 23 0>, <&sdma 32 23 0>;
+				dmas = <&sdma 31 24 0>, <&sdma 32 24 0>;
 				dma-source = <&gpr 0 15 0 16>;
 				status = "disabled";
 			};

@@ -990,7 +990,7 @@
 					 <&clks 0>, <&clks 0>;
 				clock-names = "bus", "mclk1", "mclk2", "mclk3";
 				dma-names = "rx", "tx";
-				dmas = <&sdma 33 23 0>, <&sdma 34 23 0>;
+				dmas = <&sdma 33 24 0>, <&sdma 34 24 0>;
 				dma-source = <&gpr 0 17 0 18>;
 				status = "disabled";
 			};
Signature · 1 line
1.9.1
author reviewer
#1 lore raw

PATCH v2 2/4 ARM: dts: imx6sx: Remove unused property

From: Fabio Estevam <[email protected]>

Property 'dma-source' is not used anywhere, nor it is documented, so let's just get rid of it.

Signed-off-by Fabio Estevam <[email protected]>

---
Changes since v1:
- None

 arch/arm/boot/dts/imx6sx.dtsi | 2 --
 1 file changed, 2 deletions(-)
arch/arm/boot/dts/imx6sx.dtsi +0 -2
index c8269e7..d02ab32 100644
@@ -971,7 +971,6 @@
 				clock-names = "bus", "mclk1", "mclk2", "mclk3";
 				dma-names = "rx", "tx";
 				dmas = <&sdma 31 24 0>, <&sdma 32 24 0>;
-				dma-source = <&gpr 0 15 0 16>;
 				status = "disabled";
 			};
 

@@ -991,7 +990,6 @@
 				clock-names = "bus", "mclk1", "mclk2", "mclk3";
 				dma-names = "rx", "tx";
 				dmas = <&sdma 33 24 0>, <&sdma 34 24 0>;
-				dma-source = <&gpr 0 17 0 18>;
 				status = "disabled";
 			};
Signature · 1 line
1.9.1
author reviewer
#2 lore raw

PATCH v2 3/4 fsl-imx-sdma.txt: Document 'fsl, sdma-event-remap' property

In reply to Fabio Estevam

From: Fabio Estevam <[email protected]>

Document the 'fsl,sdma-event-remap' property and provide an example of its usage.

Cc Vinod Koul <[email protected]>
Signed-off-by Fabio Estevam <[email protected]>

---
Changes since v1:
- Newly introduced in this series

 .../devicetree/bindings/dma/fsl-imx-sdma.txt       | 27 ++++++++++++++++++++++
 1 file changed, 27 insertions(+)
Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt +27 -0
index dc8d3aa..175f0e4 100644
@@ -58,6 +58,15 @@ The third cell specifies the transfer priority as below.
 	1	Medium
 	2	Low
 
+Optional properties:
+
+- gpr : The phandle to the General Purpose Register (GPR) node.
+- fsl,sdma-event-remap : Register bits of sdma event remap, the format is
+  <reg shift val>.
+    reg is the GPR register offset.
+    shift is the bit position inside the GPR register.
+    val is the value of the bit (0 or 1).
+
 Examples:
 
 sdma at 83fb0000 {

@@ -83,3 +92,21 @@ ssi2: ssi at 70014000 {
 	dma-names = "rx", "tx";
 	fsl,fifo-depth = <15>;
 };
+
+Using the fsl,sdma-event-remap property:
+
+If we want to use SDMA on the SAI1 port on a MX6SX:
+
+&sdma {
+	gpr = <&gpr>;
+	/* SDMA events remap for SAI1_RX and SAI1_TX */
+	fsl,sdma-event-remap = <0 15 1>, <0 16 1>;
+};
+
+The fsl,sdma-event-remap property in this case has two values:
+- <0 15 1> means that the offset is 0, so GPR0 is the register of the
+SDMA remap. Bit 15 of GPR0 selects between UART4_RX and SAI1_RX.
+Setting bit 15 to 1 selects SAI1_RX.
+- <0 16 1> means that the offset is 0, so GPR0 is the register of the
+SDMA remap. Bit 16 of GPR0 selects between UART4_TX and SAI1_TX.
+Setting bit 16 to 1 selects SAI1_TX.
Signature · 1 line
1.9.1
#3 lore raw

PATCH v2 3/4 fsl-imx-sdma.txt: Document 'fsl, sdma-event-remap' property

Quoted 4 lines · Fabio Estevam

From: Fabio Estevam <[email protected]>

Document the 'fsl,sdma-event-remap' property and provide an example of its usage.

just 2/3 patch so I have no idea of the series. Whats going on?

Quoted 55 lines
Cc Vinod Koul <[email protected]>
Signed-off-by Fabio Estevam <[email protected]>

---
Changes since v1:
- Newly introduced in this series

 .../devicetree/bindings/dma/fsl-imx-sdma.txt       | 27 ++++++++++++++++++++++
 1 file changed, 27 insertions(+)
Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt +27 -0
index dc8d3aa..175f0e4 100644
@@ -58,6 +58,15 @@ The third cell specifies the transfer priority as below.
 	1	Medium
 	2	Low
 
+Optional properties:
+
+- gpr : The phandle to the General Purpose Register (GPR) node.
+- fsl,sdma-event-remap : Register bits of sdma event remap, the format is
+  <reg shift val>.
+    reg is the GPR register offset.
+    shift is the bit position inside the GPR register.
+    val is the value of the bit (0 or 1).
+
 Examples:
 
 sdma at 83fb0000 {

@@ -83,3 +92,21 @@ ssi2: ssi at 70014000 {
 	dma-names = "rx", "tx";
 	fsl,fifo-depth = <15>;
 };
+
+Using the fsl,sdma-event-remap property:
+
+If we want to use SDMA on the SAI1 port on a MX6SX:
+
+&sdma {
+	gpr = <&gpr>;
+	/* SDMA events remap for SAI1_RX and SAI1_TX */
+	fsl,sdma-event-remap = <0 15 1>, <0 16 1>;
+};
+
+The fsl,sdma-event-remap property in this case has two values:
+- <0 15 1> means that the offset is 0, so GPR0 is the register of the
+SDMA remap. Bit 15 of GPR0 selects between UART4_RX and SAI1_RX.
+Setting bit 15 to 1 selects SAI1_RX.
+- <0 16 1> means that the offset is 0, so GPR0 is the register of the
+SDMA remap. Bit 16 of GPR0 selects between UART4_TX and SAI1_TX.
+Setting bit 16 to 1 selects SAI1_TX.
Signature · 1 line
1.9.1
Signature · 1 line
~Vinod
author reviewer
#4 lore raw

PATCH v2 4/4 ARM: dts: imx6sx-sdb: Add SAI support

In reply to Fabio Estevam

From: Fabio Estevam <[email protected]>

Introduce imx6sx-sdb-sai.dts so that it is possible to use the SAI interface.

Signed-off-by Fabio Estevam <[email protected]>

---
Changes since v1:
- Add imx6sx-sdb-sai.dtb into Makefile

 arch/arm/boot/dts/Makefile           |  1 +
 arch/arm/boot/dts/imx6sx-sdb-sai.dts | 67 ++++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/imx6sx-sdb.dtsi    | 16 +++++++++
 3 files changed, 84 insertions(+)
 create mode 100644 arch/arm/boot/dts/imx6sx-sdb-sai.dts
arch/arm/boot/dts/Makefile +1 -0
index 1993333..ea71187 100644
@@ -374,6 +374,7 @@ dtb-$(CONFIG_SOC_IMX6SL) += \
 dtb-$(CONFIG_SOC_IMX6SX) += \
 	imx6sx-sabreauto.dtb \
 	imx6sx-sdb-reva.dtb \
+	imx6sx-sdb-sai.dtb \
 	imx6sx-sdb.dtb
 dtb-$(CONFIG_SOC_IMX6UL) += \
 	imx6ul-14x14-evk.dtb \
arch/arm/boot/dts/imx6sx-sdb-sai.dts new file +67 -0

67 lines not on this page · raw message

arch/arm/boot/dts/imx6sx-sdb.dtsi +16 -0
index f1d3730..e5eafe4 100644
@@ -254,6 +254,12 @@
 	status = "okay";
 };
 
+&sai1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_sai1>;
+	status = "disabled";
+};
+
 &ssi2 {
 	status = "okay";
 };

@@ -468,6 +474,16 @@
 			>;
 		};
 
+		pinctrl_sai1: sai1grp {
+			fsl,pins = <
+				MX6SX_PAD_CSI_DATA00__SAI1_TX_BCLK	0x130b0
+				MX6SX_PAD_CSI_DATA01__SAI1_TX_SYNC	0x130b0
+				MX6SX_PAD_CSI_HSYNC__SAI1_TX_DATA_0	0x120b0
+				MX6SX_PAD_CSI_VSYNC__SAI1_RX_DATA_0	0x130b0
+				MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK	0x130b0
+			>;
+		};
+
 		pinctrl_uart1: uart1grp {
 			fsl,pins = <
 				MX6SX_PAD_GPIO1_IO04__UART1_TX		0x1b0b1
Signature · 1 line
1.9.1