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Amlogic Meson GXBaby and ODROID-C2 support

PATCH Superseded Beniamino Galvani 5 participants 15 messages Apr 24, 2016 – May 8, 2016

Subsystems (4)

v5 of 7 Superseded Latest is v7 →

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#0 lore raw

v5 cover Amlogic Meson GXBaby and ODROID-C2 support

Hi,

this series adds a very basic support for Amlogic S905 SoC (GXBaby) and for the ODROID-C2 board [1], and is based on u-boot sources available from the board vendor [2]. At the moment the only supported devices are the integrated UART and Ethernet adapter.

Changes since v4:
- added patch to implement generic PSCI reset
- used min() macro from linux/kernel.h

Changes since v3:
- designware eth: added check that buffer addresses are in first 4GiB as suggested by Marek (and thus removed the ack tags)
- consolidated pinmux and gpio macros
- used get_unaligned_be64() to avoid alignment faults in dram_init()
- uint32_t -> u32 in serial_meson.c
- implemented reboot and read from e-fuse through secure monitor

Changes since v2:
- squashed all platform patches into a single one
- got rid of additional non-upstream DTS node for ethernet
- improved board README
- added macros for SoC registers fields

Changes since v1:
- updated DTS files from Linux kernel
- added Ethernet support
- first 16MiB of RAM are now marked as unavailable; this seems to be required to successfully boot Linux
- fixed typo in config file

[1] http://www.hardkernel.com/main/products/prdt_info.php?g_code=G145457216438
[2] https://github.com/hardkernel/u-boot/tree/odroidc2-v2015.01

Beniamino Galvani (4):
arm: implement generic PSCI reset call for armv8
net: designware: fix descriptor layout and warnings on 64-bit archs
arm: add initial support for Amlogic Meson and ODROID-C2
arm: meson: implement calls to secure monitor

 arch/arm/Kconfig                       |   5 +
 arch/arm/Makefile                      |   1 +
 arch/arm/cpu/armv8/fwcall.c            |  16 +++
 arch/arm/dts/Makefile                  |   2 +
 arch/arm/dts/meson-gxbb-odroidc2.dts   |  69 +++++++++++++
 arch/arm/dts/meson-gxbb.dtsi           | 178 +++++++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-meson/gxbb.h |  52 ++++++++++
 arch/arm/include/asm/arch-meson/sm.h   |  12 +++
 arch/arm/include/asm/psci.h            |  17 +++-
 arch/arm/include/asm/system.h          |   2 +
 arch/arm/mach-meson/Kconfig            |  31 ++++++
 arch/arm/mach-meson/Makefile           |   7 ++
 arch/arm/mach-meson/board.c            |  67 +++++++++++++
 arch/arm/mach-meson/sm.c               |  57 +++++++++++
 board/hardkernel/odroid-c2/Kconfig     |  12 +++
 board/hardkernel/odroid-c2/MAINTAINERS |   6 ++
 board/hardkernel/odroid-c2/Makefile    |   7 ++
 board/hardkernel/odroid-c2/README      |  60 +++++++++++
 board/hardkernel/odroid-c2/odroid-c2.c |  67 +++++++++++++
 configs/odroid-c2_defconfig            |  23 +++++
 drivers/net/designware.c               |  59 ++++++-----
 drivers/net/designware.h               |   4 +-
 drivers/serial/Kconfig                 |  15 +++
 drivers/serial/Makefile                |   1 +
 drivers/serial/serial_meson.c          | 162 ++++++++++++++++++++++++++++++
 include/configs/odroid-c2.h            |  55 ++++++++++
 26 files changed, 957 insertions(+), 30 deletions(-)
 create mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts
 create mode 100644 arch/arm/dts/meson-gxbb.dtsi
 create mode 100644 arch/arm/include/asm/arch-meson/gxbb.h
 create mode 100644 arch/arm/include/asm/arch-meson/sm.h
 create mode 100644 arch/arm/mach-meson/Kconfig
 create mode 100644 arch/arm/mach-meson/Makefile
 create mode 100644 arch/arm/mach-meson/board.c
 create mode 100644 arch/arm/mach-meson/sm.c
 create mode 100644 board/hardkernel/odroid-c2/Kconfig
 create mode 100644 board/hardkernel/odroid-c2/MAINTAINERS
 create mode 100644 board/hardkernel/odroid-c2/Makefile
 create mode 100644 board/hardkernel/odroid-c2/README
 create mode 100644 board/hardkernel/odroid-c2/odroid-c2.c
 create mode 100644 configs/odroid-c2_defconfig
 create mode 100644 drivers/serial/serial_meson.c
 create mode 100644 include/configs/odroid-c2.h
Signature · 1 line
2.7.3
#1 lore raw

PATCH v5 1/4 arm: implement generic PSCI reset call for armv8

Add a psci_system_reset() which calls the SYSTEM_RESET function of PSCI 0.2 and can be used by boards that support it to implement reset_cpu().

---
 arch/arm/cpu/armv8/fwcall.c   | 16 ++++++++++++++++
 arch/arm/include/asm/psci.h   | 17 ++++++++++++++++-
 arch/arm/include/asm/system.h |  2 ++
 3 files changed, 34 insertions(+), 1 deletion(-)
arch/arm/cpu/armv8/fwcall.c +16 -0
index 9efcc5a..079e250 100644
@@ -8,6 +8,7 @@
 #include <config.h>
 #include <version.h>
 #include <asm/macro.h>
+#include <asm/psci.h>
 #include <asm/system.h>
 
 /*
@@ -73,3 +74,18 @@ void smc_call(struct pt_regs *args)
 		  "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
 		  "x16", "x17");
 }
+
+void __noreturn psci_system_reset(bool conduit_smc)
+{
+	struct pt_regs regs;
+
+	regs.regs[0] = ARM_PSCI_0_2_FN_SYSTEM_RESET;
+
+	if (conduit_smc)
+		smc_call(&regs);
+	else
+		hvc_call(&regs);
+
+	while (1)
+		;
+}
arch/arm/include/asm/psci.h +16 -1
index 128a606..3704f07 100644
@@ -18,7 +18,7 @@
 #ifndef __ARM_PSCI_H__
 #define __ARM_PSCI_H__
 
-/* PSCI interface */
+/* PSCI 0.1 interface */
 #define ARM_PSCI_FN_BASE		0x95c1ba5e
 #define ARM_PSCI_FN(n)			(ARM_PSCI_FN_BASE + (n))
 
@@ -32,6 +32,21 @@
 #define ARM_PSCI_RET_INVAL		(-2)
 #define ARM_PSCI_RET_DENIED		(-3)
 
+/* PSCI 0.2 interface */
+#define ARM_PSCI_0_2_FN_BASE			0x84000000
+#define ARM_PSCI_0_2_FN(n)			(ARM_PSCI_0_2_FN_BASE + (n))
+
+#define ARM_PSCI_0_2_FN_PSCI_VERSION		ARM_PSCI_0_2_FN(0)
+#define ARM_PSCI_0_2_FN_CPU_SUSPEND		ARM_PSCI_0_2_FN(1)
+#define ARM_PSCI_0_2_FN_CPU_OFF			ARM_PSCI_0_2_FN(2)
+#define ARM_PSCI_0_2_FN_CPU_ON			ARM_PSCI_0_2_FN(3)
+#define ARM_PSCI_0_2_FN_AFFINITY_INFO		ARM_PSCI_0_2_FN(4)
+#define ARM_PSCI_0_2_FN_MIGRATE			ARM_PSCI_0_2_FN(5)
+#define ARM_PSCI_0_2_FN_MIGRATE_INFO_TYPE	ARM_PSCI_0_2_FN(6)
+#define ARM_PSCI_0_2_FN_MIGRATE_INFO_UP_CPU	ARM_PSCI_0_2_FN(7)
+#define ARM_PSCI_0_2_FN_SYSTEM_OFF		ARM_PSCI_0_2_FN(8)
+#define ARM_PSCI_0_2_FN_SYSTEM_RESET		ARM_PSCI_0_2_FN(9)
+
 #ifndef __ASSEMBLY__
 int psci_update_dt(void *fdt);
 void psci_board_init(void);
arch/arm/include/asm/system.h +2 -0
index 9ae890a..2bdc0be 100644
@@ -128,6 +128,8 @@ void hvc_call(struct pt_regs *args);
  */
 void smc_call(struct pt_regs *args);
 
+void __noreturn psci_system_reset(bool smc);
+
 #endif	/* __ASSEMBLY__ */
 
 #else /* CONFIG_ARM64 */
Signature · 1 line
2.7.3
#2 lore raw

PATCH v5 2/4 net: designware: fix descriptor layout and warnings on 64-bit archs

In reply to Beniamino Galvani

All members of the DMA descriptor must be 32-bit, even on 64-bit
architectures: change the type to u32 to ensure this. Also, fix other warnings.

---
 drivers/net/designware.c | 59 ++++++++++++++++++++++++++----------------------
 drivers/net/designware.h |  4 ++--
 2 files changed, 34 insertions(+), 29 deletions(-)
drivers/net/designware.c +32 -27
index ca58f34..2eda461 100644
@@ -98,8 +98,8 @@ static void tx_descs_init(struct dw_eth_dev *priv)
 
 	for (idx = 0; idx < CONFIG_TX_DESCR_NUM; idx++) {
 		desc_p = &desc_table_p[idx];
-		desc_p->dmamac_addr = &txbuffs[idx * CONFIG_ETH_BUFSIZE];
-		desc_p->dmamac_next = &desc_table_p[idx + 1];
+		desc_p->dmamac_addr = (ulong)&txbuffs[idx * CONFIG_ETH_BUFSIZE];
+		desc_p->dmamac_next = (ulong)&desc_table_p[idx + 1];
 
 #if defined(CONFIG_DW_ALTDESCRIPTOR)
 		desc_p->txrx_status &= ~(DESC_TXSTS_TXINT | DESC_TXSTS_TXLAST |
@@ -117,11 +117,11 @@ static void tx_descs_init(struct dw_eth_dev *priv)
 	}
 
 	/* Correcting the last pointer of the chain */
-	desc_p->dmamac_next = &desc_table_p[0];
+	desc_p->dmamac_next = (ulong)&desc_table_p[0];
 
 	/* Flush all Tx buffer descriptors at once */
-	flush_dcache_range((unsigned int)priv->tx_mac_descrtable,
-			   (unsigned int)priv->tx_mac_descrtable +
+	flush_dcache_range((ulong)priv->tx_mac_descrtable,
+			   (ulong)priv->tx_mac_descrtable +
 			   sizeof(priv->tx_mac_descrtable));
 
 	writel((ulong)&desc_table_p[0], &dma_p->txdesclistaddr);
@@ -142,13 +142,12 @@ static void rx_descs_init(struct dw_eth_dev *priv)
 	 * Otherwise there's a chance to get some of them flushed in RAM when
 	 * GMAC is already pushing data to RAM via DMA. This way incoming from
 	 * GMAC data will be corrupted. */
-	flush_dcache_range((unsigned int)rxbuffs, (unsigned int)rxbuffs +
-			   RX_TOTAL_BUFSIZE);
+	flush_dcache_range((ulong)rxbuffs, (ulong)rxbuffs + RX_TOTAL_BUFSIZE);
 
 	for (idx = 0; idx < CONFIG_RX_DESCR_NUM; idx++) {
 		desc_p = &desc_table_p[idx];
-		desc_p->dmamac_addr = &rxbuffs[idx * CONFIG_ETH_BUFSIZE];
-		desc_p->dmamac_next = &desc_table_p[idx + 1];
+		desc_p->dmamac_addr = (ulong)&rxbuffs[idx * CONFIG_ETH_BUFSIZE];
+		desc_p->dmamac_next = (ulong)&desc_table_p[idx + 1];
 
 		desc_p->dmamac_cntl =
 			(MAC_MAX_FRAME_SZ & DESC_RXCTRL_SIZE1MASK) |
@@ -158,11 +157,11 @@ static void rx_descs_init(struct dw_eth_dev *priv)
 	}
 
 	/* Correcting the last pointer of the chain */
-	desc_p->dmamac_next = &desc_table_p[0];
+	desc_p->dmamac_next = (ulong)&desc_table_p[0];
 
 	/* Flush all Rx buffer descriptors at once */
-	flush_dcache_range((unsigned int)priv->rx_mac_descrtable,
-			   (unsigned int)priv->rx_mac_descrtable +
+	flush_dcache_range((ulong)priv->rx_mac_descrtable,
+			   (ulong)priv->rx_mac_descrtable +
 			   sizeof(priv->rx_mac_descrtable));
 
 	writel((ulong)&desc_table_p[0], &dma_p->rxdesclistaddr);
@@ -290,12 +289,11 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void *packet, int length)
 	struct eth_dma_regs *dma_p = priv->dma_regs_p;
 	u32 desc_num = priv->tx_currdescnum;
 	struct dmamacdescr *desc_p = &priv->tx_mac_descrtable[desc_num];
-	uint32_t desc_start = (uint32_t)desc_p;
-	uint32_t desc_end = desc_start +
+	ulong desc_start = (ulong)desc_p;
+	ulong desc_end = desc_start +
 		roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
-	uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
-	uint32_t data_end = data_start +
-		roundup(length, ARCH_DMA_MINALIGN);
+	ulong data_start = desc_p->dmamac_addr;
+	ulong data_end = data_start + roundup(length, ARCH_DMA_MINALIGN);
 	/*
 	 * Strictly we only need to invalidate the "txrx_status" field
 	 * for the following check, but on some platforms we cannot
@@ -312,7 +310,7 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void *packet, int length)
 		return -EPERM;
 	}
 
-	memcpy(desc_p->dmamac_addr, packet, length);
+	memcpy((void *)data_start, packet, length);
 
 	/* Flush data to be sent */
 	flush_dcache_range(data_start, data_end);
@@ -352,11 +350,11 @@ static int _dw_eth_recv(struct dw_eth_dev *priv, uchar **packetp)
 	u32 status, desc_num = priv->rx_currdescnum;
 	struct dmamacdescr *desc_p = &priv->rx_mac_descrtable[desc_num];
 	int length = -EAGAIN;
-	uint32_t desc_start = (uint32_t)desc_p;
-	uint32_t desc_end = desc_start +
+	ulong desc_start = (ulong)desc_p;
+	ulong desc_end = desc_start +
 		roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
-	uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
-	uint32_t data_end;
+	ulong data_start = desc_p->dmamac_addr;
+	ulong data_end;
 
 	/* Invalidate entire buffer descriptor */
 	invalidate_dcache_range(desc_start, desc_end);
@@ -372,7 +370,7 @@ static int _dw_eth_recv(struct dw_eth_dev *priv, uchar **packetp)
 		/* Invalidate received data */
 		data_end = data_start + roundup(length, ARCH_DMA_MINALIGN);
 		invalidate_dcache_range(data_start, data_end);
-		*packetp = desc_p->dmamac_addr;
+		*packetp = (uchar *)(ulong)desc_p->dmamac_addr;
 	}
 
 	return length;
@@ -382,8 +380,8 @@ static int _dw_free_pkt(struct dw_eth_dev *priv)
 {
 	u32 desc_num = priv->rx_currdescnum;
 	struct dmamacdescr *desc_p = &priv->rx_mac_descrtable[desc_num];
-	uint32_t desc_start = (uint32_t)desc_p;
-	uint32_t desc_end = desc_start +
+	ulong desc_start = (ulong)desc_p;
+	ulong desc_end = desc_start +
 		roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
 
 	/*
@@ -488,6 +486,11 @@ int designware_initialize(ulong base_addr, u32 interface)
 		return -ENOMEM;
 	}
 
+	if ((unsigned long long)priv + sizeof(*priv) > (1ULL << 32)) {
+		printf("designware: buffers are outside DMA memory\n");
+		return -EINVAL;
+	}
+
 	memset(dev, 0, sizeof(struct eth_device));
 	memset(priv, 0, sizeof(struct dw_eth_dev));
 
@@ -583,6 +586,7 @@ static int designware_eth_probe(struct udevice *dev)
 	struct eth_pdata *pdata = dev_get_platdata(dev);
 	struct dw_eth_dev *priv = dev_get_priv(dev);
 	u32 iobase = pdata->iobase;
+	ulong ioaddr;
 	int ret;
 
 #ifdef CONFIG_DM_PCI
@@ -601,8 +605,9 @@ static int designware_eth_probe(struct udevice *dev)
 #endif
 
 	debug("%s, iobase=%x, priv=%p\n", __func__, iobase, priv);
-	priv->mac_regs_p = (struct eth_mac_regs *)iobase;
-	priv->dma_regs_p = (struct eth_dma_regs *)(iobase + DW_DMA_BASE_OFFSET);
+	ioaddr = iobase;
+	priv->mac_regs_p = (struct eth_mac_regs *)ioaddr;
+	priv->dma_regs_p = (struct eth_dma_regs *)(ioaddr + DW_DMA_BASE_OFFSET);
 	priv->interface = pdata->phy_interface;
 	priv->max_speed = pdata->max_speed;
 
drivers/net/designware.h +2 -2
index ed6344c..d48df7b 100644
@@ -110,8 +110,8 @@ struct eth_dma_regs {
 struct dmamacdescr {
 	u32 txrx_status;
 	u32 dmamac_cntl;
-	void *dmamac_addr;
-	struct dmamacdescr *dmamac_next;
+	u32 dmamac_addr;
+	u32 dmamac_next;
 } __aligned(ARCH_DMA_MINALIGN);
 
 /*
Signature · 1 line
2.7.3
#3 lore raw

PATCH v5 2/4 net: designware: fix descriptor layout and warnings on 64-bit archs

Quoted 15 lines · Beniamino Galvani

All members of the DMA descriptor must be 32-bit, even on 64-bit
architectures: change the type to u32 to ensure this. Also, fix other warnings.

---
 drivers/net/designware.c | 59 ++++++++++++++++++++++++++----------------------
 drivers/net/designware.h |  4 ++--
 2 files changed, 34 insertions(+), 29 deletions(-)
drivers/net/designware.c +0 -0
index ca58f34..2eda461 100644

drivers/net/designware.c static void tx_descs_init(struct dw_eth_dev *priv) · line 102

Quoted 7 lines
drivers/net/designware.c +2 -2
@@ -98,8 +98,8 @@ static void tx_descs_init(struct dw_eth_dev *priv)
 
        for (idx = 0; idx < CONFIG_TX_DESCR_NUM; idx++) {
                desc_p = &desc_table_p[idx];
-               desc_p->dmamac_addr = &txbuffs[idx * CONFIG_ETH_BUFSIZE];
-               desc_p->dmamac_next = &desc_table_p[idx + 1];
+               desc_p->dmamac_addr = (ulong)&txbuffs[idx * CONFIG_ETH_BUFSIZE];
+               desc_p->dmamac_next = (ulong)&desc_table_p[idx + 1];

Why are you not casting to the type of the struct member (u32)? Won't this emit warnings on 64-bit?

Quoted 166 lines
drivers/net/designware.c +30 -25
 #if defined(CONFIG_DW_ALTDESCRIPTOR)
                desc_p->txrx_status &= ~(DESC_TXSTS_TXINT | DESC_TXSTS_TXLAST |
@@ -117,11 +117,11 @@ static void tx_descs_init(struct dw_eth_dev *priv)
        }
 
        /* Correcting the last pointer of the chain */
-       desc_p->dmamac_next = &desc_table_p[0];
+       desc_p->dmamac_next = (ulong)&desc_table_p[0];
 
        /* Flush all Tx buffer descriptors at once */
-       flush_dcache_range((unsigned int)priv->tx_mac_descrtable,
-                          (unsigned int)priv->tx_mac_descrtable +
+       flush_dcache_range((ulong)priv->tx_mac_descrtable,
+                          (ulong)priv->tx_mac_descrtable +
                           sizeof(priv->tx_mac_descrtable));
 
        writel((ulong)&desc_table_p[0], &dma_p->txdesclistaddr);
@@ -142,13 +142,12 @@ static void rx_descs_init(struct dw_eth_dev *priv)
         * Otherwise there's a chance to get some of them flushed in RAM when
         * GMAC is already pushing data to RAM via DMA. This way incoming from
         * GMAC data will be corrupted. */
-       flush_dcache_range((unsigned int)rxbuffs, (unsigned int)rxbuffs +
-                          RX_TOTAL_BUFSIZE);
+       flush_dcache_range((ulong)rxbuffs, (ulong)rxbuffs + RX_TOTAL_BUFSIZE);
 
        for (idx = 0; idx < CONFIG_RX_DESCR_NUM; idx++) {
                desc_p = &desc_table_p[idx];
-               desc_p->dmamac_addr = &rxbuffs[idx * CONFIG_ETH_BUFSIZE];
-               desc_p->dmamac_next = &desc_table_p[idx + 1];
+               desc_p->dmamac_addr = (ulong)&rxbuffs[idx * CONFIG_ETH_BUFSIZE];
+               desc_p->dmamac_next = (ulong)&desc_table_p[idx + 1];
 
                desc_p->dmamac_cntl =
                        (MAC_MAX_FRAME_SZ & DESC_RXCTRL_SIZE1MASK) |
@@ -158,11 +157,11 @@ static void rx_descs_init(struct dw_eth_dev *priv)
        }
 
        /* Correcting the last pointer of the chain */
-       desc_p->dmamac_next = &desc_table_p[0];
+       desc_p->dmamac_next = (ulong)&desc_table_p[0];
 
        /* Flush all Rx buffer descriptors at once */
-       flush_dcache_range((unsigned int)priv->rx_mac_descrtable,
-                          (unsigned int)priv->rx_mac_descrtable +
+       flush_dcache_range((ulong)priv->rx_mac_descrtable,
+                          (ulong)priv->rx_mac_descrtable +
                           sizeof(priv->rx_mac_descrtable));
 
        writel((ulong)&desc_table_p[0], &dma_p->rxdesclistaddr);
@@ -290,12 +289,11 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void *packet, int length)
        struct eth_dma_regs *dma_p = priv->dma_regs_p;
        u32 desc_num = priv->tx_currdescnum;
        struct dmamacdescr *desc_p = &priv->tx_mac_descrtable[desc_num];
-       uint32_t desc_start = (uint32_t)desc_p;
-       uint32_t desc_end = desc_start +
+       ulong desc_start = (ulong)desc_p;
+       ulong desc_end = desc_start +
                roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
-       uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
-       uint32_t data_end = data_start +
-               roundup(length, ARCH_DMA_MINALIGN);
+       ulong data_start = desc_p->dmamac_addr;
+       ulong data_end = data_start + roundup(length, ARCH_DMA_MINALIGN);
        /*
         * Strictly we only need to invalidate the "txrx_status" field
         * for the following check, but on some platforms we cannot
@@ -312,7 +310,7 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void *packet, int length)
                return -EPERM;
        }
 
-       memcpy(desc_p->dmamac_addr, packet, length);
+       memcpy((void *)data_start, packet, length);
 
        /* Flush data to be sent */
        flush_dcache_range(data_start, data_end);
@@ -352,11 +350,11 @@ static int _dw_eth_recv(struct dw_eth_dev *priv, uchar **packetp)
        u32 status, desc_num = priv->rx_currdescnum;
        struct dmamacdescr *desc_p = &priv->rx_mac_descrtable[desc_num];
        int length = -EAGAIN;
-       uint32_t desc_start = (uint32_t)desc_p;
-       uint32_t desc_end = desc_start +
+       ulong desc_start = (ulong)desc_p;
+       ulong desc_end = desc_start +
                roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
-       uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
-       uint32_t data_end;
+       ulong data_start = desc_p->dmamac_addr;
+       ulong data_end;
 
        /* Invalidate entire buffer descriptor */
        invalidate_dcache_range(desc_start, desc_end);
@@ -372,7 +370,7 @@ static int _dw_eth_recv(struct dw_eth_dev *priv, uchar **packetp)
                /* Invalidate received data */
                data_end = data_start + roundup(length, ARCH_DMA_MINALIGN);
                invalidate_dcache_range(data_start, data_end);
-               *packetp = desc_p->dmamac_addr;
+               *packetp = (uchar *)(ulong)desc_p->dmamac_addr;
        }
 
        return length;
@@ -382,8 +380,8 @@ static int _dw_free_pkt(struct dw_eth_dev *priv)
 {
        u32 desc_num = priv->rx_currdescnum;
        struct dmamacdescr *desc_p = &priv->rx_mac_descrtable[desc_num];
-       uint32_t desc_start = (uint32_t)desc_p;
-       uint32_t desc_end = desc_start +
+       ulong desc_start = (ulong)desc_p;
+       ulong desc_end = desc_start +
                roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
 
        /*
@@ -488,6 +486,11 @@ int designware_initialize(ulong base_addr, u32 interface)
                return -ENOMEM;
        }
 
+       if ((unsigned long long)priv + sizeof(*priv) > (1ULL << 32)) {
+               printf("designware: buffers are outside DMA memory\n");
+               return -EINVAL;
+       }
+
        memset(dev, 0, sizeof(struct eth_device));
        memset(priv, 0, sizeof(struct dw_eth_dev));
 
@@ -583,6 +586,7 @@ static int designware_eth_probe(struct udevice *dev)
        struct eth_pdata *pdata = dev_get_platdata(dev);
        struct dw_eth_dev *priv = dev_get_priv(dev);
        u32 iobase = pdata->iobase;
+       ulong ioaddr;
        int ret;
 
 #ifdef CONFIG_DM_PCI
@@ -601,8 +605,9 @@ static int designware_eth_probe(struct udevice *dev)
 #endif
 
        debug("%s, iobase=%x, priv=%p\n", __func__, iobase, priv);
-       priv->mac_regs_p = (struct eth_mac_regs *)iobase;
-       priv->dma_regs_p = (struct eth_dma_regs *)(iobase + DW_DMA_BASE_OFFSET);
+       ioaddr = iobase;
+       priv->mac_regs_p = (struct eth_mac_regs *)ioaddr;
+       priv->dma_regs_p = (struct eth_dma_regs *)(ioaddr + DW_DMA_BASE_OFFSET);
        priv->interface = pdata->phy_interface;
        priv->max_speed = pdata->max_speed;
 
drivers/net/designware.h +2 -3
index ed6344c..d48df7b 100644
@@ -110,8 +110,8 @@ struct eth_dma_regs {
 struct dmamacdescr {
        u32 txrx_status;
        u32 dmamac_cntl;
-       void *dmamac_addr;
-       struct dmamacdescr *dmamac_next;
+       u32 dmamac_addr;
+       u32 dmamac_next;
 } __aligned(ARCH_DMA_MINALIGN);
 
 /*
--

2.7.3

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U-Boot at lists.denx.de
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#4 lore raw

PATCH v5 2/4 net: designware: fix descriptor layout and warnings on 64-bit archs

Quoted 7 lines · Joe Hershberger

drivers/net/designware.c static void tx_descs_init(struct dw_eth_dev *priv) · line 102

Quoted 4 lines
drivers/net/designware.c +2 -2
-               desc_p->dmamac_addr = &txbuffs[idx * CONFIG_ETH_BUFSIZE];
-               desc_p->dmamac_next = &desc_table_p[idx + 1];
+               desc_p->dmamac_addr = (ulong)&txbuffs[idx * CONFIG_ETH_BUFSIZE];
+               desc_p->dmamac_next = (ulong)&desc_table_p[idx + 1];

Why are you not casting to the type of the struct member (u32)? Won't this emit warnings on 64-bit?

Hi,

casting to u32 would cause a warning on arm64 ("warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]") because the pointer is 64bit.

The (ulong) cast is needed to convert the pointer to an arithmetic type of same width, which then can be assigned to the struct member. The assignment operator implicitly converts between different arithmetic types without the need for explicit casts.

Beniamino

#5 lore raw

PATCH v5 2/4 net: designware: fix descriptor layout and warnings on 64-bit archs

Quoted 11 lines · Beniamino Galvani
Quoted 7 lines · Joe Hershberger

drivers/net/designware.c static void tx_descs_init(struct dw_eth_dev *priv) · line 102

Quoted 4 lines
drivers/net/designware.c +2 -2
-               desc_p->dmamac_addr = &txbuffs[idx * CONFIG_ETH_BUFSIZE];
-               desc_p->dmamac_next = &desc_table_p[idx + 1];
+               desc_p->dmamac_addr = (ulong)&txbuffs[idx * CONFIG_ETH_BUFSIZE];
+               desc_p->dmamac_next = (ulong)&desc_table_p[idx + 1];

Why are you not casting to the type of the struct member (u32)? Won't this emit warnings on 64-bit?

Hi,

Quoted 8 lines

casting to u32 would cause a warning on arm64 ("warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]") because the pointer is 64bit.

The (ulong) cast is needed to convert the pointer to an arithmetic type of same width, which then can be assigned to the struct member. The assignment operator implicitly converts between different arithmetic types without the need for explicit casts.

That's the part that surprises me. I thought arithmetic assignments from larger to smaller types would warn.

Anyway, if it's warning clean,

#6 lore raw

PATCH v5 2/4 net: designware: fix descriptor layout and warnings on 64-bit archs

Quoted 21 lines · Joe Hershberger
Quoted 11 lines · Beniamino Galvani
Quoted 7 lines · Joe Hershberger

drivers/net/designware.c static void tx_descs_init(struct dw_eth_dev *priv) · line 102

Quoted 4 lines
drivers/net/designware.c +2 -2
-               desc_p->dmamac_addr = &txbuffs[idx * CONFIG_ETH_BUFSIZE];
-               desc_p->dmamac_next = &desc_table_p[idx + 1];
+               desc_p->dmamac_addr = (ulong)&txbuffs[idx * CONFIG_ETH_BUFSIZE];
+               desc_p->dmamac_next = (ulong)&desc_table_p[idx + 1];

Why are you not casting to the type of the struct member (u32)? Won't this emit warnings on 64-bit?

Hi,

Quoted 8 lines

casting to u32 would cause a warning on arm64 ("warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]") because the pointer is 64bit.

The (ulong) cast is needed to convert the pointer to an arithmetic type of same width, which then can be assigned to the struct member. The assignment operator implicitly converts between different arithmetic types without the need for explicit casts.

Quoted 4 lines

That's the part that surprises me. I thought arithmetic assignments from larger to smaller types would warn.

Anyway, if it's warning clean,

I am still not a big fan of picking the right type just to silence all possible warnings. I am worried this will bite us in the future.

Quoted 2 lines
Signature · 2 lines
Best regards,
Marek Vasut
#7 lore raw

PATCH v5 2/4 net: designware: fix descriptor layout and warnings on 64-bit archs

Quoted 22 lines · Marek Vasut
Quoted 21 lines · Joe Hershberger
Quoted 19 lines · Beniamino Galvani
Quoted 7 lines · Joe Hershberger

drivers/net/designware.c static void tx_descs_init(struct dw_eth_dev *priv) · line 102

Quoted 4 lines
drivers/net/designware.c +2 -2
-               desc_p->dmamac_addr = &txbuffs[idx * CONFIG_ETH_BUFSIZE];
-               desc_p->dmamac_next = &desc_table_p[idx + 1];
+               desc_p->dmamac_addr = (ulong)&txbuffs[idx * CONFIG_ETH_BUFSIZE];
+               desc_p->dmamac_next = (ulong)&desc_table_p[idx + 1];

Why are you not casting to the type of the struct member (u32)? Won't this emit warnings on 64-bit?

Hi,

casting to u32 would cause a warning on arm64 ("warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]") because the pointer is 64bit.

The (ulong) cast is needed to convert the pointer to an arithmetic type of same width, which then can be assigned to the struct member. The assignment operator implicitly converts between different arithmetic types without the need for explicit casts.

Quoted 7 lines
Quoted 4 lines

That's the part that surprises me. I thought arithmetic assignments from larger to smaller types would warn.

Anyway, if it's warning clean,

I am still not a big fan of picking the right type just to silence all possible warnings. I am worried this will bite us in the future.

When that future comes we'll have lots of things to fixup and convert to a better solution.

Signature · 8 lines
Tom
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#8 lore raw

PATCH v5 3/4 arm: add initial support for Amlogic Meson and ODROID-C2

In reply to Beniamino Galvani

This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a board definition for ODROID-C2. This initial submission only supports UART and Ethernet (through the existing Designware driver). DTS files are the ones submitted to Linux arm-soc for 4.7 [1].

[1] https://patchwork.ozlabs.org/patch/603583/

---
 arch/arm/Kconfig                       |   5 +
 arch/arm/Makefile                      |   1 +
 arch/arm/dts/Makefile                  |   2 +
 arch/arm/dts/meson-gxbb-odroidc2.dts   |  69 +++++++++++++
 arch/arm/dts/meson-gxbb.dtsi           | 178 +++++++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-meson/gxbb.h |  52 ++++++++++
 arch/arm/mach-meson/Kconfig            |  31 ++++++
 arch/arm/mach-meson/Makefile           |   7 ++
 arch/arm/mach-meson/board.c            |  66 ++++++++++++
 board/hardkernel/odroid-c2/Kconfig     |  12 +++
 board/hardkernel/odroid-c2/MAINTAINERS |   6 ++
 board/hardkernel/odroid-c2/Makefile    |   7 ++
 board/hardkernel/odroid-c2/README      |  60 +++++++++++
 board/hardkernel/odroid-c2/odroid-c2.c |  51 ++++++++++
 configs/odroid-c2_defconfig            |  23 +++++
 drivers/serial/Kconfig                 |  15 +++
 drivers/serial/Makefile                |   1 +
 drivers/serial/serial_meson.c          | 162 ++++++++++++++++++++++++++++++
 include/configs/odroid-c2.h            |  55 ++++++++++
 19 files changed, 803 insertions(+)
 create mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts
 create mode 100644 arch/arm/dts/meson-gxbb.dtsi
 create mode 100644 arch/arm/include/asm/arch-meson/gxbb.h
 create mode 100644 arch/arm/mach-meson/Kconfig
 create mode 100644 arch/arm/mach-meson/Makefile
 create mode 100644 arch/arm/mach-meson/board.c
 create mode 100644 board/hardkernel/odroid-c2/Kconfig
 create mode 100644 board/hardkernel/odroid-c2/MAINTAINERS
 create mode 100644 board/hardkernel/odroid-c2/Makefile
 create mode 100644 board/hardkernel/odroid-c2/README
 create mode 100644 board/hardkernel/odroid-c2/odroid-c2.c
 create mode 100644 configs/odroid-c2_defconfig
 create mode 100644 drivers/serial/serial_meson.c
 create mode 100644 include/configs/odroid-c2.h
arch/arm/Kconfig +5 -0
index d1c3157..95a0838 100644
@@ -456,6 +456,9 @@ config ARCH_KEYSTONE
 	select SUPPORT_SPL
 	select CMD_POWEROFF
 
+config ARCH_MESON
+	bool "Amlogic Meson"
+
 config ARCH_MX7
 	bool "Freescale MX7"
 	select CPU_V7
@@ -780,6 +783,8 @@ source "arch/arm/mach-orion5x/Kconfig"
 
 source "arch/arm/cpu/armv7/rmobile/Kconfig"
 
+source "arch/arm/mach-meson/Kconfig"
+
 source "arch/arm/mach-rockchip/Kconfig"
 
 source "arch/arm/mach-s5pc1xx/Kconfig"
arch/arm/Makefile +1 -0
index d516345..ecd1887 100644
@@ -50,6 +50,7 @@ machine-$(CONFIG_ARCH_HIGHBANK)		+= highbank
 machine-$(CONFIG_ARCH_KEYSTONE)		+= keystone
 # TODO: rename CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD
 machine-$(CONFIG_KIRKWOOD)		+= kirkwood
+machine-$(CONFIG_ARCH_MESON)		+= meson
 machine-$(CONFIG_ARCH_MVEBU)		+= mvebu
 # TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA
 # TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
arch/arm/dts/Makefile +2 -0
index aa31fd9..be28d21 100644
@@ -24,6 +24,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3288-jerry.dtb \
 	rk3288-rock2-square.dtb \
 	rk3036-sdk.dtb
+dtb-$(CONFIG_ARCH_MESON) += \
+	meson-gxbb-odroidc2.dtb
 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
 	tegra20-medcom-wide.dtb \
 	tegra20-paz00.dtb \
arch/arm/dts/meson-gxbb-odroidc2.dts new file +69 -0

69 lines not on this page · raw message

arch/arm/dts/meson-gxbb.dtsi new file +178 -0

178 lines not on this page · raw message

arch/arm/include/asm/arch-meson/gxbb.h new file +52 -0

52 lines not on this page · raw message

arch/arm/mach-meson/Kconfig new file +31 -0
new file mode 100644
index 0000000..77d3cfe
@@ -0,0 +1,31 @@
+if ARCH_MESON
+
+config MESON_GXBB
+	bool "Support Meson GXBaby"
+	select ARM64
+	select DM
+	select DM_SERIAL
+	help
+	  The Amlogic Meson GXBaby (S905) is an ARM SoC with a
+	  quad-core Cortex-A53 CPU and a Mali-450 GPU.
+
+if MESON_GXBB
+
+config TARGET_ODROID_C2
+	bool "ODROID-C2"
+	help
+	  ODROID-C2 is a single board computer based on Meson GXBaby
+	  with 2 GiB of RAM, Gigabit Ethernet, HDMI, 4 USB, micro-SD
+	  slot, eMMC, IR receiver and a 40-pin GPIO header.
+
+endif
+
+config SYS_SOC
+	default "meson"
+
+config SYS_MALLOC_F_LEN
+	default 0x1000
+
+source "board/hardkernel/odroid-c2/Kconfig"
+
+endif
arch/arm/mach-meson/Makefile new file +7 -0
new file mode 100644
index 0000000..44e3d63
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2016 Beniamino Galvani <[email protected]>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += board.o
arch/arm/mach-meson/board.c new file +66 -0

66 lines not on this page · raw message

board/hardkernel/odroid-c2/Kconfig new file +12 -0
new file mode 100644
index 0000000..687d9c6
@@ -0,0 +1,12 @@
+if TARGET_ODROID_C2
+
+config SYS_BOARD
+	default "odroid-c2"
+
+config SYS_VENDOR
+	default "hardkernel"
+
+config SYS_CONFIG_NAME
+	default "odroid-c2"
+
+endif
board/hardkernel/odroid-c2/MAINTAINERS new file +6 -0
new file mode 100644
index 0000000..23ae1e7
@@ -0,0 +1,6 @@
+ODROID-C2
+M:	Beniamino Galvani <[email protected]>
+S:	Maintained
+F:	board/hardkernel/odroid-c2/
+F:	include/configs/odroid-c2.h
+F:	configs/odroid-c2_defconfig
board/hardkernel/odroid-c2/Makefile new file +7 -0
new file mode 100644
index 0000000..571044b
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2016 Beniamino Galvani <[email protected]>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	:= odroid-c2.o
board/hardkernel/odroid-c2/README new file +60 -0

60 lines not on this page · raw message

board/hardkernel/odroid-c2/odroid-c2.c new file +51 -0

51 lines not on this page · raw message

configs/odroid-c2_defconfig new file +23 -0
new file mode 100644
index 0000000..a771b20
@@ -0,0 +1,23 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MESON=y
+CONFIG_MESON_GXBB=y
+CONFIG_TARGET_ODROID_C2=y
+CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2"
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_SOURCE is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_CONTROL=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_MESON=y
+CONFIG_DEBUG_UART_BASE=0xc81004c0
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_MESON_SERIAL=y
drivers/serial/Kconfig +15 -0
index a9a5d47..7720b3e 100644
@@ -112,6 +112,14 @@ config DEBUG_UART_S5P
 	  will need to provide parameters to make this work. The driver will
 	  be available until the real driver-model serial is running.
 
+config DEBUG_UART_MESON
+	bool "Amlogic Meson"
+	depends on MESON_SERIAL
+	help
+	  Select this to enable a debug UART using the serial_meson driver. You
+	  will need to provide parameters to make this work. The driver will
+	  be available until the real driver-model serial is running.
+
 config DEBUG_UART_UARTLITE
 	bool "Xilinx Uartlite"
 	help
@@ -320,6 +328,13 @@ config XILINX_UARTLITE
 	  If you have a Xilinx based board and want to use the uartlite
 	  serial ports, say Y to this option. If unsure, say N.
 
+config MESON_SERIAL
+	bool "Support for Amlogic Meson UART"
+	depends on DM_SERIAL && ARCH_MESON
+	help
+	  If you have an Amlogic Meson based board and want to use the on-chip
+	  serial ports, say Y to this option. If unsure, say N.
+
 config MSM_SERIAL
 	bool "Qualcomm on-chip UART"
 	depends on DM_SERIAL
drivers/serial/Makefile +1 -0
index b0ac9d8..35c143d 100644
@@ -26,6 +26,7 @@ obj-$(CONFIG_SYS_NS16550) += ns16550.o
 obj-$(CONFIG_S5P) += serial_s5p.o
 obj-$(CONFIG_MXC_UART) += serial_mxc.o
 obj-$(CONFIG_PXA_SERIAL) += serial_pxa.o
+obj-$(CONFIG_MESON_SERIAL) += serial_meson.o
 obj-$(CONFIG_S3C24X0_SERIAL) += serial_s3c24x0.o
 obj-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o
 obj-$(CONFIG_SANDBOX_SERIAL) += sandbox.o
drivers/serial/serial_meson.c new file +162 -0

162 lines not on this page · raw message

include/configs/odroid-c2.h new file +55 -0

55 lines not on this page · raw message

Signature · 1 line
2.7.3
#9 lore raw

PATCH v5 3/4 arm: add initial support for Amlogic Meson and ODROID-C2

Quoted 8 lines · Beniamino Galvani

This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a board definition for ODROID-C2. This initial submission only supports UART and Ethernet (through the existing Designware driver). DTS files are the ones submitted to Linux arm-soc for 4.7 [1].

[1] https://patchwork.ozlabs.org/patch/603583/

[snip]

include/configs/odroid-c2.h line 34

Quoted 3 lines
include/configs/odroid-c2.h new file +3 -0
+#if !defined(CONFIG_IDENT_STRING)
+# define CONFIG_IDENT_STRING		" odroid-c2"
+#endif

Would this ever already be set?

include/configs/odroid-c2.h line 40

Quoted 5 lines
include/configs/odroid-c2.h new file +5 -0
+/* Serial setup */
+#define CONFIG_CONS_INDEX		0
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE \
+	{ 4800, 9600, 19200, 38400, 57600, 115200 }

And I assume you could live with the default table really.

Otherwise looks good, thanks.

Signature · 8 lines
Tom
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#10 lore raw

PATCH v5 3/4 arm: add initial support for Amlogic Meson and ODROID-C2

Quoted 5 lines · Tom Rini

include/configs/odroid-c2.h line 34

Quoted 3 lines
include/configs/odroid-c2.h new file +3 -0
+#if !defined(CONFIG_IDENT_STRING)
+# define CONFIG_IDENT_STRING		" odroid-c2"
+#endif

Would this ever already be set?

No, it shouldn't.

Quoted 7 lines

include/configs/odroid-c2.h line 40

Quoted 5 lines
include/configs/odroid-c2.h new file +5 -0
+/* Serial setup */
+#define CONFIG_CONS_INDEX		0
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE \
+	{ 4800, 9600, 19200, 38400, 57600, 115200 }

And I assume you could live with the default table really.

Right.

I will fix both and resubmit, thanks!

Beniamino

#11 lore raw

PATCH v5 3/4 arm: add initial support for Amlogic Meson and ODROID-C2

In reply to Beniamino Galvani

Hi,

Quoted 8 lines · Beniamino Galvani

This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a board definition for ODROID-C2. This initial submission only supports UART and Ethernet (through the existing Designware driver). DTS files are the ones submitted to Linux arm-soc for 4.7 [1].

[1] https://patchwork.ozlabs.org/patch/603583/

A few nits below but this looks very clean, thank you.

Quoted 41 lines
---
 arch/arm/Kconfig                       |   5 +
 arch/arm/Makefile                      |   1 +
 arch/arm/dts/Makefile                  |   2 +
 arch/arm/dts/meson-gxbb-odroidc2.dts   |  69 +++++++++++++
 arch/arm/dts/meson-gxbb.dtsi           | 178 +++++++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-meson/gxbb.h |  52 ++++++++++
 arch/arm/mach-meson/Kconfig            |  31 ++++++
 arch/arm/mach-meson/Makefile           |   7 ++
 arch/arm/mach-meson/board.c            |  66 ++++++++++++
 board/hardkernel/odroid-c2/Kconfig     |  12 +++
 board/hardkernel/odroid-c2/MAINTAINERS |   6 ++
 board/hardkernel/odroid-c2/Makefile    |   7 ++
 board/hardkernel/odroid-c2/README      |  60 +++++++++++
 board/hardkernel/odroid-c2/odroid-c2.c |  51 ++++++++++
 configs/odroid-c2_defconfig            |  23 +++++
 drivers/serial/Kconfig                 |  15 +++
 drivers/serial/Makefile                |   1 +
 drivers/serial/serial_meson.c          | 162 ++++++++++++++++++++++++++++++
 include/configs/odroid-c2.h            |  55 ++++++++++
 19 files changed, 803 insertions(+)
 create mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts
 create mode 100644 arch/arm/dts/meson-gxbb.dtsi
 create mode 100644 arch/arm/include/asm/arch-meson/gxbb.h
 create mode 100644 arch/arm/mach-meson/Kconfig
 create mode 100644 arch/arm/mach-meson/Makefile
 create mode 100644 arch/arm/mach-meson/board.c
 create mode 100644 board/hardkernel/odroid-c2/Kconfig
 create mode 100644 board/hardkernel/odroid-c2/MAINTAINERS
 create mode 100644 board/hardkernel/odroid-c2/Makefile
 create mode 100644 board/hardkernel/odroid-c2/README
 create mode 100644 board/hardkernel/odroid-c2/odroid-c2.c
 create mode 100644 configs/odroid-c2_defconfig
 create mode 100644 drivers/serial/serial_meson.c
 create mode 100644 include/configs/odroid-c2.h
arch/arm/Kconfig +0 -0
index d1c3157..95a0838 100644

arch/arm/Kconfig config ARCH_KEYSTONE · line 460

Quoted 5 lines
arch/arm/Kconfig +2 -0
@@ -456,6 +456,9 @@ config ARCH_KEYSTONE
        select SUPPORT_SPL
        select CMD_POWEROFF
 
+config ARCH_MESON
+       bool "Amlogic Meson"

Please add a help message describing what this is and what features it has.

Quoted 44 lines
arch/arm/Kconfig +3 -0
+
 config ARCH_MX7
        bool "Freescale MX7"
        select CPU_V7
@@ -780,6 +783,8 @@ source "arch/arm/mach-orion5x/Kconfig"
 
 source "arch/arm/cpu/armv7/rmobile/Kconfig"
 
+source "arch/arm/mach-meson/Kconfig"
+
 source "arch/arm/mach-rockchip/Kconfig"
 
 source "arch/arm/mach-s5pc1xx/Kconfig"
arch/arm/Makefile +1 -0
index d516345..ecd1887 100644
@@ -50,6 +50,7 @@ machine-$(CONFIG_ARCH_HIGHBANK)               += highbank
 machine-$(CONFIG_ARCH_KEYSTONE)                += keystone
 # TODO: rename CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD
 machine-$(CONFIG_KIRKWOOD)             += kirkwood
+machine-$(CONFIG_ARCH_MESON)           += meson
 machine-$(CONFIG_ARCH_MVEBU)           += mvebu
 # TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA
 # TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
arch/arm/dts/Makefile +2 -0
index aa31fd9..be28d21 100644
@@ -24,6 +24,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
        rk3288-jerry.dtb \
        rk3288-rock2-square.dtb \
        rk3036-sdk.dtb
+dtb-$(CONFIG_ARCH_MESON) += \
+       meson-gxbb-odroidc2.dtb
 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
        tegra20-medcom-wide.dtb \
        tegra20-paz00.dtb \
arch/arm/dts/meson-gxbb-odroidc2.dts new file +0 -0
new file mode 100644
index 0000000..653c2fa

arch/arm/dts/meson-gxbb-odroidc2.dts line 9

Quoted 9 lines
arch/arm/dts/meson-gxbb-odroidc2.dts new file +9 -0
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2016 Andreas F?rber
+ * Copyright (c) 2016 BayLibre, Inc.
+ * Author: Kevin Hilman <[email protected]>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.

Can you use SPDX for these?

Quoted 36 lines
arch/arm/dts/meson-gxbb-odroidc2.dts new file +36 -0
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;

[snip]

Quoted 44 lines
board/hardkernel/odroid-c2/odroid-c2.c new file +38 -0
new file mode 100644
index 0000000..c258d4f
@@ -0,0 +1,51 @@
+/*
+ * (C) Copyright 2016 Beniamino Galvani <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/gxbb.h>
+#include <dm/platdata.h>
+#include <phy.h>
+
+int board_init(void)
+{
+       return 0;
+}
+
+static const struct eth_pdata gxbb_eth_pdata = {
+       .iobase = GXBB_ETH_BASE,
+       .phy_interface = PHY_INTERFACE_MODE_RGMII,
+};
+
+U_BOOT_DEVICE(meson_eth) = {
+       .name = "eth_designware",
+       .platdata = &gxbb_eth_pdata,
+};
+
+int misc_init_r(void)
+{
+       /* Select Ethernet function */
+       setbits_le32(GXBB_PINMUX(6), 0x3fff);
+
+       /* Set RGMII mode */
+       setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
+                                    GXBB_ETH_REG_0_TX_PHASE(1) |
+                                    GXBB_ETH_REG_0_TX_RATIO(4) |
+                                    GXBB_ETH_REG_0_PHY_CLK_EN |
+                                    GXBB_ETH_REG_0_CLK_EN);

board/hardkernel/odroid-c2/odroid-c2.c line 48

Quoted 10 lines
board/hardkernel/odroid-c2/odroid-c2.c new file +10 -0
+
+       /* Enable power and clock gate */
+       setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
+       clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
+
+       /* Reset PHY on GPIOZ_14 */
+       clrbits_le32(GXBB_GPIO_EN(3), BIT(14));
+       clrbits_le32(GXBB_GPIO_OUT(3), BIT(14));
+       mdelay(10);
+       setbits_le32(GXBB_GPIO_OUT(3), BIT(14));

Once you have a GPIO/pinctrl driver this could presumably be replaced.

board/hardkernel/odroid-c2/odroid-c2.c line 51

Quoted 3 lines
board/hardkernel/odroid-c2/odroid-c2.c new file +3 -0
+
+       return 0;
+}

Regards,
Simon

#12 lore raw

PATCH v5 3/4 arm: add initial support for Amlogic Meson and ODROID-C2

Quoted 11 lines · Simon Glass

Hi,

Quoted 8 lines · Beniamino Galvani

This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a board definition for ODROID-C2. This initial submission only supports UART and Ethernet (through the existing Designware driver). DTS files are the ones submitted to Linux arm-soc for 4.7 [1].

[1] https://patchwork.ozlabs.org/patch/603583/

[snip]

Quoted 5 lines
Quoted 5 lines

+++ b/arch/arm/dts/meson-gxbb-odroidc2.dts

arch/arm/dts/meson-gxbb-odroidc2.dts new file +3 -0
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2016 Andreas F?rber
+ * Copyright (c) 2016 BayLibre, Inc.
Quoted 8 lines

arch/arm/dts/meson-gxbb-odroidc2.dts line 9

Quoted 6 lines
arch/arm/dts/meson-gxbb-odroidc2.dts new file +6 -0
+ * Author: Kevin Hilman <[email protected]>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.

Can you use SPDX for these?

No, we don't bother for DTS files where we are not also the upstream source of them as that just makes churn.

Signature · 8 lines
Tom
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#13 lore raw

PATCH v5 3/4 arm: add initial support for Amlogic Meson and ODROID-C2

In reply to Simon Glass
Quoted 4 lines · Simon Glass

arch/arm/Kconfig config ARCH_KEYSTONE · line 460

Quoted 2 lines
arch/arm/Kconfig +2 -0
+config ARCH_MESON
+       bool "Amlogic Meson"

Please add a help message describing what this is and what features it has.

Fixed in v7.

Quoted 7 lines

board/hardkernel/odroid-c2/odroid-c2.c line 48

Quoted 5 lines
board/hardkernel/odroid-c2/odroid-c2.c new file +5 -0
+       /* Reset PHY on GPIOZ_14 */
+       clrbits_le32(GXBB_GPIO_EN(3), BIT(14));
+       clrbits_le32(GXBB_GPIO_OUT(3), BIT(14));
+       mdelay(10);
+       setbits_le32(GXBB_GPIO_OUT(3), BIT(14));

Once you have a GPIO/pinctrl driver this could presumably be replaced.

Yeah, that's in my TODO list.

Thanks,
Beniamino

#14 lore raw

PATCH v5 4/4 arm: meson: implement calls to secure monitor

In reply to Beniamino Galvani

Implement calls to secure monitor to read the MAC address from e-fuse.

---
 arch/arm/include/asm/arch-meson/sm.h   | 12 +++++++
 arch/arm/mach-meson/Makefile           |  2 +-
 arch/arm/mach-meson/board.c            |  1 +
 arch/arm/mach-meson/sm.c               | 57 ++++++++++++++++++++++++++++++++++
 board/hardkernel/odroid-c2/odroid-c2.c | 16 ++++++++++
 5 files changed, 87 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/include/asm/arch-meson/sm.h
 create mode 100644 arch/arm/mach-meson/sm.c
arch/arm/include/asm/arch-meson/sm.h new file +12 -0
new file mode 100644
index 0000000..225438d
@@ -0,0 +1,12 @@
+/*
+ * (C) Copyright 2016 - Beniamino Galvani <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __MESON_SM_H__
+#define __MESON_SM_H__
+
+ssize_t meson_sm_read_efuse(uintptr_t offset, void *buffer, size_t size);
+
+#endif /* __MESON_SM_H__ */
arch/arm/mach-meson/Makefile +1 -1
index 44e3d63..bf49b8b 100644
@@ -4,4 +4,4 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-y += board.o
+obj-y += board.o sm.o
arch/arm/mach-meson/board.c +1 -0
index 782f86c..64fa3c1 100644
@@ -8,6 +8,7 @@
 #include <libfdt.h>
 #include <linux/err.h>
 #include <asm/arch/gxbb.h>
+#include <asm/arch/sm.h>
 #include <asm/armv8/mmu.h>
 #include <asm/unaligned.h>
 
arch/arm/mach-meson/sm.c new file +57 -0

57 lines not on this page · raw message

board/hardkernel/odroid-c2/odroid-c2.c +16 -0
index c258d4f..bd72100 100644
@@ -7,9 +7,15 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/gxbb.h>
+#include <asm/arch/sm.h>
 #include <dm/platdata.h>
 #include <phy.h>
 
+#define EFUSE_SN_OFFSET		20
+#define EFUSE_SN_SIZE		16
+#define EFUSE_MAC_OFFSET	52
+#define EFUSE_MAC_SIZE		6
+
 int board_init(void)
 {
 	return 0;
@@ -27,6 +33,9 @@ U_BOOT_DEVICE(meson_eth) = {
 
 int misc_init_r(void)
 {
+	u8 mac_addr[EFUSE_MAC_SIZE];
+	ssize_t len;
+
 	/* Select Ethernet function */
 	setbits_le32(GXBB_PINMUX(6), 0x3fff);
 
@@ -47,5 +56,12 @@ int misc_init_r(void)
 	mdelay(10);
 	setbits_le32(GXBB_GPIO_OUT(3), BIT(14));
 
+	if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
+		len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
+					  mac_addr, EFUSE_MAC_SIZE);
+		if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
+			eth_setenv_enetaddr("ethaddr", mac_addr);
+	}
+
 	return 0;
 }
Signature · 1 line
2.7.3