Add support for Espresso7420 board

---
 drivers/pinctrl/pinctrl-uclass.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

drivers/pinctrl/pinctrl-uclass.c +1 -0

index ccc5d30..fd04b26 100644
@@ -287,5 +287,6 @@ static int pinctrl_post_bind(struct udevice *dev)
 UCLASS_DRIVER(pinctrl) = {
 	.id = UCLASS_PINCTRL,
 	.post_bind = pinctrl_post_bind,
+	.flags = DM_UC_FLAG_SEQ_ALIAS,
 	.name = "pinctrl",
 };

Signature · 1 line

1.6.6.rc2

Thomas Abraham

author

2016-04-23 16:48 UTC #2 lore raw

PATCH v3 2/8 pinctrl: Add pinctrl driver support for Exynos7420 SoC

From: Thomas Abraham <[email protected]>

Add pinctrl driver support for Samsung's Exynos7420 SoC. The changes have been split into Exynos7420 specific and common Exynos specific portions so that this implementation is reusable on other Exynos SoCs as well.

The Exynos pinctrl driver supports only device tree based pin configuration. The bindings used are similar to the ones used in the linux kernel.

Cc Masahiro Yamada <[email protected]>

Cc Simon Glass <[email protected]>

Cc Minkyu Kang <[email protected]>

Acked-by Minkyu Kang <[email protected]>

---
 drivers/pinctrl/Kconfig                     |    1 +
 drivers/pinctrl/Makefile                    |    1 +
 drivers/pinctrl/exynos/Kconfig              |   10 ++
 drivers/pinctrl/exynos/Makefile             |    9 ++
 drivers/pinctrl/exynos/pinctrl-exynos.c     |  141 +++++++++++++++++++++++++++
 drivers/pinctrl/exynos/pinctrl-exynos.h     |   77 +++++++++++++++
 drivers/pinctrl/exynos/pinctrl-exynos7420.c |  120 +++++++++++++++++++++++
 7 files changed, 359 insertions(+), 0 deletions(-)
 create mode 100644 drivers/pinctrl/exynos/Kconfig
 create mode 100644 drivers/pinctrl/exynos/Makefile
 create mode 100644 drivers/pinctrl/exynos/pinctrl-exynos.c
 create mode 100644 drivers/pinctrl/exynos/pinctrl-exynos.h
 create mode 100644 drivers/pinctrl/exynos/pinctrl-exynos7420.c

drivers/pinctrl/Kconfig +1 -0

index 2a69bab..bdf8931 100644
@@ -145,5 +145,6 @@ endif
 
 source "drivers/pinctrl/nxp/Kconfig"
 source "drivers/pinctrl/uniphier/Kconfig"
+source "drivers/pinctrl/exynos/Kconfig"
 
 endmenu

drivers/pinctrl/Makefile +1 -0

index 37dc904..19beb04 100644
@@ -11,3 +11,4 @@ obj-$(CONFIG_PINCTRL_SANDBOX)	+= pinctrl-sandbox.o
 
 obj-$(CONFIG_PINCTRL_UNIPHIER)	+= uniphier/
 obj-$(CONFIG_PIC32_PINCTRL)	+= pinctrl_pic32.o
+obj-$(CONFIG_PINCTRL_EXYNOS)	+= exynos/

drivers/pinctrl/exynos/Kconfig new file +10 -0

new file mode 100644
index 0000000..84b6aaa
@@ -0,0 +1,10 @@
+config PINCTRL_EXYNOS
+	bool
+
+config PINCTRL_EXYNOS7420
+	bool "Samsung Exynos7420 pinctrl driver"
+	depends on ARCH_EXYNOS && PINCTRL_FULL
+	select PINCTRL_EXYNOS
+	help
+	  Support pin multiplexing and pin configuration control on
+	  Samsung's Exynos7420 SoC.

drivers/pinctrl/exynos/Makefile new file +9 -0

new file mode 100644
index 0000000..d9b941a
@@ -0,0 +1,9 @@
+#
+# Copyright (C) 2016 Samsung Electronics
+# Thomas Abraham <[email protected]>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-$(CONFIG_PINCTRL_EXYNOS)		+= pinctrl-exynos.o
+obj-$(CONFIG_PINCTRL_EXYNOS7420)	+= pinctrl-exynos7420.o

drivers/pinctrl/exynos/pinctrl-exynos.c new file +141 -0

141 lines not on this page · raw message

drivers/pinctrl/exynos/pinctrl-exynos.h new file +77 -0

77 lines not on this page · raw message

drivers/pinctrl/exynos/pinctrl-exynos7420.c new file +120 -0

120 lines not on this page · raw message

Signature · 1 line

1.6.6.rc2

Thomas Abraham

author

2016-04-23 16:48 UTC #3 lore raw

PATCH v3 3/8 clk: exynos: add clock driver for Exynos7420 Soc

From: Thomas Abraham <[email protected]>

Add a clock driver for Exynos7420 SoC. There are about 25 clock controller blocks in Exynos7420 out of which support for topc, top0 and peric1 blocks are added in this initial version of the driver.

Cc Minkyu Kang <[email protected]>

Cc Simon Glass <[email protected]>

---
 drivers/clk/Kconfig                        |    1 +
 drivers/clk/Makefile                       |    1 +
 drivers/clk/exynos/Kconfig                 |   18 ++
 drivers/clk/exynos/Makefile                |    9 +
 drivers/clk/exynos/clk-exynos7420.c        |  236 ++++++++++++++++++++++++++++
 drivers/clk/exynos/clk-pll.c               |   33 ++++
 drivers/clk/exynos/clk-pll.h               |    9 +
 include/dt-bindings/clock/exynos7420-clk.h |  207 ++++++++++++++++++++++++
 8 files changed, 514 insertions(+), 0 deletions(-)
 create mode 100644 drivers/clk/exynos/Kconfig
 create mode 100644 drivers/clk/exynos/Makefile
 create mode 100644 drivers/clk/exynos/clk-exynos7420.c
 create mode 100644 drivers/clk/exynos/clk-pll.c
 create mode 100644 drivers/clk/exynos/clk-pll.h
 create mode 100644 include/dt-bindings/clock/exynos7420-clk.h

drivers/clk/Kconfig +1 -0

index a98b74b..6eee8eb 100644
@@ -21,5 +21,6 @@ config SPL_CLK
 	  used as U-Boot proper.
 
 source "drivers/clk/uniphier/Kconfig"
+source "drivers/clk/exynos/Kconfig"
 
 endmenu

drivers/clk/Makefile +1 -0

index c51db15..81fe600 100644
@@ -11,3 +11,4 @@ obj-$(CONFIG_ROCKCHIP_RK3288) += clk_rk3288.o
 obj-$(CONFIG_SANDBOX) += clk_sandbox.o
 obj-$(CONFIG_MACH_PIC32) += clk_pic32.o
 obj-$(CONFIG_CLK_UNIPHIER) += uniphier/
+obj-$(CONFIG_CLK_EXYNOS) += exynos/

drivers/clk/exynos/Kconfig new file +18 -0

new file mode 100644
index 0000000..eb0efa9
@@ -0,0 +1,18 @@
+config CLK_EXYNOS
+	bool
+	select CLK
+	help
+	  This enables support for common clock driver API on Samsung
+	  Exynos SoCs.
+
+menu "Clock drivers for Exynos SoCs"
+	depends on CLK_EXYNOS
+
+config CLK_EXYNOS7420
+	bool "Clock driver for Samsung's Exynos7420 SoC"
+	default y
+	help
+	  This enables common clock driver support for platforms based
+	  on Samsung Exynos7420 SoC.
+
+endmenu

drivers/clk/exynos/Makefile new file +9 -0

new file mode 100644
index 0000000..1df10fe
@@ -0,0 +1,9 @@
+#
+# Copyright (C) 2016 Samsung Electronics
+# Thomas Abraham <[email protected]>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y				+= clk-pll.o
+obj-$(CONFIG_CLK_EXYNOS7420)	+= clk-exynos7420.o

drivers/clk/exynos/clk-exynos7420.c new file +236 -0

236 lines not on this page · raw message

drivers/clk/exynos/clk-pll.c new file +33 -0

new file mode 100644
index 0000000..27220c5
@@ -0,0 +1,33 @@
+/*
+ * Exynos PLL helper functions for clock drivers.
+ * Copyright (C) 2016 Samsung Electronics
+ * Thomas Abraham <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <div64.h>
+
+#define PLL145X_MDIV_SHIFT	16
+#define PLL145X_MDIV_MASK	0x3ff
+#define PLL145X_PDIV_SHIFT	8
+#define PLL145X_PDIV_MASK	0x3f
+#define PLL145X_SDIV_SHIFT	0
+#define PLL145X_SDIV_MASK	0x7
+
+unsigned long pll145x_get_rate(unsigned int *con1, unsigned long fin_freq)
+{
+	unsigned long pll_con1 = readl(con1);
+	unsigned long mdiv, sdiv, pdiv;
+	uint64_t fvco = fin_freq;
+
+	mdiv = (pll_con1 >> PLL145X_MDIV_SHIFT) & PLL145X_MDIV_MASK;
+	pdiv = (pll_con1 >> PLL145X_PDIV_SHIFT) & PLL145X_PDIV_MASK;
+	sdiv = (pll_con1 >> PLL145X_SDIV_SHIFT) & PLL145X_SDIV_MASK;
+
+	fvco *= mdiv;
+	do_div(fvco, (pdiv << sdiv));
+	return (unsigned long)fvco;
+}

drivers/clk/exynos/clk-pll.h new file +9 -0

new file mode 100644
index 0000000..631d035
@@ -0,0 +1,9 @@
+/*
+ * Exynos PLL helper functions for clock drivers.
+ * Copyright (C) 2016 Samsung Electronics
+ * Thomas Abraham <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+unsigned long pll145x_get_rate(unsigned int *con1, unsigned long fin_freq);

include/dt-bindings/clock/exynos7420-clk.h new file +207 -0

207 lines not on this page · raw message

Signature · 1 line

1.6.6.rc2

Simon Glass

2016-04-23 17:00 UTC #4 lore raw

PATCH v3 3/8 clk: exynos: add clock driver for Exynos7420 Soc

Quoted 9 lines · Thomas Abraham

From: Thomas Abraham <[email protected]>
Add a clock driver for Exynos7420 SoC. There are about 25 clock controller blocks in Exynos7420 out of which support for topc, top0 and peric1 blocks are added in this initial version of the driver.
Cc Minkyu Kang <[email protected]>
Cc Simon Glass <[email protected]>
Signed-off-by Thomas Abraham <[email protected]>

Quoted 16 lines

---
 drivers/clk/Kconfig                        |    1 +
 drivers/clk/Makefile                       |    1 +
 drivers/clk/exynos/Kconfig                 |   18 ++
 drivers/clk/exynos/Makefile                |    9 +
 drivers/clk/exynos/clk-exynos7420.c        |  236 ++++++++++++++++++++++++++++
 drivers/clk/exynos/clk-pll.c               |   33 ++++
 drivers/clk/exynos/clk-pll.h               |    9 +
 include/dt-bindings/clock/exynos7420-clk.h |  207 ++++++++++++++++++++++++
 8 files changed, 514 insertions(+), 0 deletions(-)
 create mode 100644 drivers/clk/exynos/Kconfig
 create mode 100644 drivers/clk/exynos/Makefile
 create mode 100644 drivers/clk/exynos/clk-exynos7420.c
 create mode 100644 drivers/clk/exynos/clk-pll.c
 create mode 100644 drivers/clk/exynos/clk-pll.h
 create mode 100644 include/dt-bindings/clock/exynos7420-clk.h

Thomas Abraham

author

2016-04-23 16:48 UTC #5 lore raw

PATCH v3 4/8 serial: s5p: get the port id number from the alias of the device node

From: Thomas Abraham <[email protected]>

The port id, if not specified in the device node, can be obtained from the alias of the device node listed in the aliases node.

Cc Minkyu Kang <[email protected]>

---
 drivers/serial/serial_s5p.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

drivers/serial/serial_s5p.c +2 -2

index feba467..8590dfd 100644
@@ -174,8 +174,8 @@ static int s5p_serial_ofdata_to_platdata(struct udevice *dev)
 		return -EINVAL;
 
 	plat->reg = (struct s5p_uart *)addr;
-	plat->port_id = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "id", -1);
-
+	plat->port_id = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+					"id", dev->seq);
 	return 0;
 }

Signature · 1 line

1.6.6.rc2

Simon Glass

2016-04-23 17:00 UTC #6 lore raw

PATCH v3 4/8 serial: s5p: get the port id number from the alias of the device node

Quoted 10 lines · Thomas Abraham

From: Thomas Abraham <[email protected]>
The port id, if not specified in the device node, can be obtained from the alias of the device node listed in the aliases node.
Cc Minkyu Kang <[email protected]>
Signed-off-by Thomas Abraham <[email protected]>
---
 drivers/serial/serial_s5p.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

Thomas Abraham

author

2016-04-23 16:48 UTC #7 lore raw

PATCH v3 5/8 serial: s5p: use clock api to get clock rate

From: Thomas Abraham <[email protected]>

On Exynos platforms that support clock driver API, allow the driver to use clock api get the SCLK clock rate.

Cc Minkyu Kang <[email protected]>

---
 drivers/serial/serial_s5p.c |   15 ++++++++++++++-
 1 files changed, 14 insertions(+), 1 deletions(-)

drivers/serial/serial_s5p.c +14 -1

index 8590dfd..cb55c5a 100644
@@ -17,6 +17,7 @@
 #include <asm/arch/clk.h>
 #include <asm/arch/uart.h>
 #include <serial.h>
+#include <clk.h>
 
 DECLARE_GLOBAL_DATA_PTR;

@@ -90,7 +91,19 @@ int s5p_serial_setbrg(struct udevice *dev, int baudrate)
 {
 	struct s5p_serial_platdata *plat = dev->platdata;
 	struct s5p_uart *const uart = plat->reg;
-	u32 uclk = get_uart_clk(plat->port_id);
+	u32 uclk;
+
+#ifdef CONFIG_CLK_EXYNOS
+	struct udevice *clk_dev;
+	u32 ret;
+
+	ret = clk_get_by_index(dev, 1, &clk_dev);
+	if (ret < 0)
+		return ret;
+	uclk = clk_get_periph_rate(clk_dev, ret);
+#else
+	uclk = get_uart_clk(plat->port_id);
+#endif
 
 	s5p_serial_baud(uart, uclk, baudrate);

Signature · 1 line

1.6.6.rc2

Thomas Abraham

author

2016-04-23 16:48 UTC #8 lore raw

PATCH v3 6/8 arm: exynos: realign the code to allow support for newer 64-bit platforms

From: Thomas Abraham <[email protected]>

The existing Exynos 32-bit platform support needs to be realigned in order to support newer 64-bit Exynos platforms. The driver model will be utlized for drivers on the 64-bit Exynos platforms and so some of the older platform support code would not be required for the newer 64-bit Exynos platforms.

Cc Minkyu Kang <[email protected]>

---
 arch/arm/Kconfig                         |    1 -
 arch/arm/mach-exynos/Kconfig             |   34 +++++++++++++++++++++++++++++-
 arch/arm/mach-exynos/Makefile            |    5 ++-
 arch/arm/mach-exynos/include/mach/cpu.h  |    2 +-
 arch/arm/mach-exynos/include/mach/gpio.h |    2 +-
 arch/arm/mach-exynos/soc.c               |    2 +
 configs/arndale_defconfig                |    1 +
 configs/odroid-xu3_defconfig             |    1 +
 configs/odroid_defconfig                 |    1 +
 configs/origen_defconfig                 |    1 +
 configs/peach-pi_defconfig               |    1 +
 configs/peach-pit_defconfig              |    1 +
 configs/s5pc210_universal_defconfig      |    1 +
 configs/smdk5250_defconfig               |    1 +
 configs/smdk5420_defconfig               |    1 +
 configs/smdkv310_defconfig               |    1 +
 configs/snow_defconfig                   |    1 +
 configs/spring_defconfig                 |    1 +
 configs/trats2_defconfig                 |    1 +
 configs/trats_defconfig                  |    1 +
 20 files changed, 54 insertions(+), 6 deletions(-)

arch/arm/Kconfig +0 -1

index d1c3157..0ad5fa9 100644
@@ -426,7 +426,6 @@ config TARGET_BCMNSP
 
 config ARCH_EXYNOS
 	bool "Samsung EXYNOS"
-	select CPU_V7
 	select DM
 	select DM_SPI_FLASH
 	select DM_SERIAL

arch/arm/mach-exynos/Kconfig +33 -1

index a6a7597..28a6a60 100644
@@ -1,9 +1,32 @@
 if ARCH_EXYNOS
 
 choice
-	prompt "EXYNOS board select"
+	prompt "EXYNOS architecture type select"
 	optional
 
+config ARCH_EXYNOS4
+	bool "Exynos4 SoC family"
+	select CPU_V7
+	help
+	  Samsung Exynos4 SoC family are based on ARM Cortex-A9 CPU. There
+	  are multiple SoCs in this family including Exynos4210, Exynos4412,
+	  and Exynos4212.
+
+config ARCH_EXYNOS5
+	bool "Exynos5 SoC family"
+	select CPU_V7
+	help
+	  Samsung Exynos5 SoC family are based on ARM Cortex-A15 CPU (and
+	  Cortex-A7 CPU in big.LITTLE configuration). There are multiple SoCs
+	  in this family including Exynos5250, Exynos5420 and Exynos5800.
+
+endchoice
+
+if ARCH_EXYNOS4
+
+choice
+	prompt "EXYNOS4 board select"
+
 config TARGET_SMDKV310
 	select SUPPORT_SPL
 	bool "Exynos4210 SMDKV310 board"

@@ -25,6 +48,14 @@ config TARGET_TRATS2
 config TARGET_ODROID
 	bool "Exynos4412 Odroid board"
 
+endchoice
+endif
+
+if ARCH_EXYNOS5
+
+choice
+	prompt "EXYNOS5 board select"
+
 config TARGET_ODROID_XU3
 	bool "Exynos5422 Odroid board"
 	select OF_CONTROL

@@ -68,6 +99,7 @@ config TARGET_PEACH_PIT
 	select OF_CONTROL
 
 endchoice
+endif
 
 config SYS_SOC
 	default "exynos"

arch/arm/mach-exynos/Makefile +3 -2

index 8542f89..f3c07b7 100644
@@ -5,7 +5,8 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-y	+= clock.o power.o soc.o system.o pinmux.o tzpc.o
+obj-y	+= soc.o
+obj-$(CONFIG_CPU_V7) += clock.o pinmux.o power.o system.o
 
 obj-$(CONFIG_EXYNOS5420)	+= sec_boot.o

@@ -13,6 +14,6 @@ ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_EXYNOS5)	+= clock_init_exynos5.o
 obj-$(CONFIG_EXYNOS5)	+= dmc_common.o dmc_init_ddr3.o
 obj-$(CONFIG_EXYNOS4210)+= dmc_init_exynos4.o clock_init_exynos4.o
-obj-y	+= spl_boot.o
+obj-y	+= spl_boot.o tzpc.o
 obj-y	+= lowlevel_init.o
 endif

arch/arm/mach-exynos/include/mach/cpu.h +1 -1

index 14a1692..f12e3d6 100644
@@ -270,7 +270,7 @@ IS_EXYNOS_TYPE(exynos5420, 0x5420)
 IS_EXYNOS_TYPE(exynos5422, 0x5422)
 
 #define SAMSUNG_BASE(device, base)				\
-static inline unsigned int __attribute__((no_instrument_function)) \
+static inline unsigned long __attribute__((no_instrument_function)) \
 	samsung_get_base_##device(void) \
 {								\
 	if (cpu_is_exynos4()) {				\

arch/arm/mach-exynos/include/mach/gpio.h +1 -1

index 7fc8e61..81363bd 100644
@@ -1349,7 +1349,7 @@ enum exynos5420_gpio_pin {
 };
 
 struct gpio_info {
-	unsigned int reg_addr;	/* Address of register for this part */
+	unsigned long reg_addr;	/* Address of register for this part */
 	unsigned int max_gpio;	/* Maximum GPIO in this part */
 };

arch/arm/mach-exynos/soc.c +2 -0

index 0f116b1..737a8dd 100644
@@ -11,7 +11,9 @@
 
 void reset_cpu(ulong addr)
 {
+#ifdef CONFIG_CPU_V7
 	writel(0x1, samsung_get_base_swreset());
+#endif
 }
 
 #ifndef CONFIG_SYS_DCACHE_OFF

configs/arndale_defconfig +1 -0

index b323e98..cfd02c8 100644
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_EXYNOS=y
+CONFIG_ARCH_EXYNOS5=y
 CONFIG_TARGET_ARNDALE=y
 CONFIG_DM_I2C=y
 CONFIG_DEFAULT_DEVICE_TREE="exynos5250-arndale"

configs/odroid-xu3_defconfig +1 -0

index bb0576a..49195a2 100644
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_EXYNOS=y
+CONFIG_ARCH_EXYNOS5=y
 CONFIG_TARGET_ODROID_XU3=y
 CONFIG_DM_I2C=y
 CONFIG_DEFAULT_DEVICE_TREE="exynos5422-odroidxu3"

configs/odroid_defconfig +1 -0

index a92bbe1..02536a7 100644
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_EXYNOS=y
+CONFIG_ARCH_EXYNOS4=y
 CONFIG_TARGET_ODROID=y
 CONFIG_DM_I2C=y
 CONFIG_DEFAULT_DEVICE_TREE="exynos4412-odroid"

configs/origen_defconfig +1 -0

index de4a816..1f73ada 100644
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_EXYNOS=y
+CONFIG_ARCH_EXYNOS4=y
 CONFIG_TARGET_ORIGEN=y
 CONFIG_DEFAULT_DEVICE_TREE="exynos4210-origen"
 CONFIG_SPL=y

configs/peach-pi_defconfig +1 -0

index 23b9762..6498639 100644
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_EXYNOS=y
+CONFIG_ARCH_EXYNOS5=y
 CONFIG_TARGET_PEACH_PI=y
 CONFIG_DM_I2C=y
 CONFIG_DEFAULT_DEVICE_TREE="exynos5800-peach-pi"

configs/peach-pit_defconfig +1 -0

index adde56f..57160a0 100644
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_EXYNOS=y
+CONFIG_ARCH_EXYNOS5=y
 CONFIG_TARGET_PEACH_PIT=y
 CONFIG_DM_I2C=y
 CONFIG_DEFAULT_DEVICE_TREE="exynos5420-peach-pit"

configs/s5pc210_universal_defconfig +1 -0

index d91b433..2cd013c 100644
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_EXYNOS=y
+CONFIG_ARCH_EXYNOS4=y
 CONFIG_TARGET_S5PC210_UNIVERSAL=y
 CONFIG_DEFAULT_DEVICE_TREE="exynos4210-universal_c210"
 CONFIG_SYS_PROMPT="Universal # "

configs/smdk5250_defconfig +1 -0

index b3d16ab..2ccffc1 100644
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_EXYNOS=y
+CONFIG_ARCH_EXYNOS5=y
 CONFIG_TARGET_SMDK5250=y
 CONFIG_DM_I2C=y
 CONFIG_DEFAULT_DEVICE_TREE="exynos5250-smdk5250"

configs/smdk5420_defconfig +1 -0

index a84d159..a418933 100644
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_EXYNOS=y
+CONFIG_ARCH_EXYNOS5=y
 CONFIG_TARGET_SMDK5420=y
 CONFIG_DM_I2C=y
 CONFIG_DEFAULT_DEVICE_TREE="exynos5420-smdk5420"

configs/smdkv310_defconfig +1 -0

index 851fc5c..c0ba861 100644
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_EXYNOS=y
+CONFIG_ARCH_EXYNOS4=y
 CONFIG_TARGET_SMDKV310=y
 CONFIG_DEFAULT_DEVICE_TREE="exynos4210-smdkv310"
 CONFIG_SPL=y

configs/snow_defconfig +1 -0

index 5dbd18a..e2630c6 100644
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_EXYNOS=y
+CONFIG_ARCH_EXYNOS5=y
 CONFIG_TARGET_SNOW=y
 CONFIG_DM_I2C=y
 CONFIG_DEFAULT_DEVICE_TREE="exynos5250-snow"

configs/spring_defconfig +1 -0

index 352bd1a..44e3809 100644
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_EXYNOS=y
+CONFIG_ARCH_EXYNOS5=y
 CONFIG_TARGET_SPRING=y
 CONFIG_DM_I2C=y
 CONFIG_DEFAULT_DEVICE_TREE="exynos5250-spring"

configs/trats2_defconfig +1 -0

index 14bdc6a..f5acf62 100644
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_EXYNOS=y
+CONFIG_ARCH_EXYNOS4=y
 CONFIG_TARGET_TRATS2=y
 CONFIG_DEFAULT_DEVICE_TREE="exynos4412-trats2"
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set

configs/trats_defconfig +1 -0

index c3b82bb..8094d0d 100644
@@ -1,5 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_EXYNOS=y
+CONFIG_ARCH_EXYNOS4=y
 CONFIG_TARGET_TRATS=y
 CONFIG_DEFAULT_DEVICE_TREE="exynos4210-trats"
 CONFIG_FIT=y

Signature · 1 line

1.6.6.rc2

Simon Glass

2016-04-23 17:00 UTC #9 lore raw

PATCH v3 6/8 arm: exynos: realign the code to allow support for newer 64-bit platforms

Quoted 24 lines · Thomas Abraham

From: Thomas Abraham <[email protected]>
The existing Exynos 32-bit platform support needs to be realigned in order to support newer 64-bit Exynos platforms. The driver model will be utlized for drivers on the 64-bit Exynos platforms and so some of the older platform support code would not be required for the newer 64-bit Exynos platforms.
Cc Minkyu Kang <[email protected]>
Signed-off-by Thomas Abraham <[email protected]>
---
 arch/arm/Kconfig                         |    1 -
 arch/arm/mach-exynos/Kconfig             |   34 +++++++++++++++++++++++++++++-
 arch/arm/mach-exynos/Makefile            |    5 ++-
 arch/arm/mach-exynos/include/mach/cpu.h  |    2 +-
 arch/arm/mach-exynos/include/mach/gpio.h |    2 +-
 arch/arm/mach-exynos/soc.c               |    2 +
 configs/arndale_defconfig                |    1 +
 configs/odroid-xu3_defconfig             |    1 +
 configs/odroid_defconfig                 |    1 +
 configs/origen_defconfig                 |    1 +
 configs/peach-pi_defconfig               |    1 +
 configs/peach-pit_defconfig              |    1 +
 configs/s5pc210_universal_defconfig      |    1 +

Quoted 8 lines

 configs/smdk5250_defconfig               |    1 +
 configs/smdk5420_defconfig               |    1 +
 configs/smdkv310_defconfig               |    1 +
 configs/snow_defconfig                   |    1 +
 configs/spring_defconfig                 |    1 +
 configs/trats2_defconfig                 |    1 +
 configs/trats_defconfig                  |    1 +
 20 files changed, 54 insertions(+), 6 deletions(-)

Thomas Abraham

author

2016-04-23 16:48 UTC #10 lore raw

PATCH v3 7/8 arm: exynos: add support for Exynos7420 SoC

From: Thomas Abraham <[email protected]>

Add support for Exynos7420 SoC. The Exynos7420 SoC has four Cortex-A57 and four Cortex-A53 CPUs and includes various peripheral controllers.

---
 arch/arm/dts/exynos7420.dtsi        |   83 +++++++++++++++++++++++++
 arch/arm/mach-exynos/Kconfig        |    8 +++
 arch/arm/mach-exynos/Makefile       |    1 +
 arch/arm/mach-exynos/mmu-arm64.c    |   35 +++++++++++
 arch/arm/mach-exynos/soc.c          |    8 +++
 include/configs/espresso7420.h      |   34 +++++++++++
 include/configs/exynos7420-common.h |  113 +++++++++++++++++++++++++++++++++++
 7 files changed, 282 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/dts/exynos7420.dtsi
 create mode 100644 arch/arm/mach-exynos/mmu-arm64.c
 create mode 100644 include/configs/espresso7420.h
 create mode 100644 include/configs/exynos7420-common.h

arch/arm/dts/exynos7420.dtsi new file +83 -0

new file mode 100644
index 0000000..b398021
@@ -0,0 +1,83 @@
+/*
+ * Samsung Exynos7420 SoC device tree source
+ *
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+#include "skeleton.dtsi"
+#include <dt-bindings/clock/exynos7420-clk.h>
+/ {
+	compatible = "samsung,exynos7420";
+
+	fin_pll: xxti {
+		compatible = "fixed-clock";
+		clock-output-names = "fin_pll";
+		u-boot,dm-pre-reloc;
+		#clock-cells = <0>;
+	};
+
+	clock_topc: clock-controller at 10570000 {
+		compatible = "samsung,exynos7-clock-topc";
+		reg = <0x10570000 0x10000>;
+		u-boot,dm-pre-reloc;
+		#clock-cells = <1>;
+		clocks = <&fin_pll>;
+		clock-names = "fin_pll";
+	};
+
+	clock_top0: clock-controller at 105d0000 {
+		compatible = "samsung,exynos7-clock-top0";
+		reg = <0x105d0000 0xb000>;
+		u-boot,dm-pre-reloc;
+		#clock-cells = <1>;
+		clocks = <&fin_pll>, <&clock_topc DOUT_SCLK_BUS0_PLL>,
+			 <&clock_topc DOUT_SCLK_BUS1_PLL>,
+			 <&clock_topc DOUT_SCLK_CC_PLL>,
+			 <&clock_topc DOUT_SCLK_MFC_PLL>;
+		clock-names = "fin_pll", "dout_sclk_bus0_pll",
+			      "dout_sclk_bus1_pll", "dout_sclk_cc_pll",
+			      "dout_sclk_mfc_pll";
+	};
+
+	clock_peric1: clock-controller at 14c80000 {
+		compatible = "samsung,exynos7-clock-peric1";
+		reg = <0x14c80000 0xd00>;
+		u-boot,dm-pre-reloc;
+		#clock-cells = <1>;
+		clocks = <&fin_pll>, <&clock_top0 DOUT_ACLK_PERIC1>,
+			 <&clock_top0 CLK_SCLK_UART1>,
+			 <&clock_top0 CLK_SCLK_UART2>,
+			 <&clock_top0 CLK_SCLK_UART3>;
+		clock-names = "fin_pll", "dout_aclk_peric1_66",
+			      "sclk_uart1", "sclk_uart2", "sclk_uart3";
+	};
+
+	pinctrl at 13470000 {
+		compatible = "samsung,exynos7420-pinctrl";
+		reg = <0x13470000 0x1000>;
+		u-boot,dm-pre-reloc;
+
+		serial2_bus: serial2-bus {
+			samsung,pins = "gpd1-4", "gpd1-5";
+			samsung,pin-function = <2>;
+			samsung,pin-pud = <3>;
+			samsung,pin-drv = <0>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	serial at 14C30000 {
+		compatible = "samsung,exynos4210-uart";
+		reg = <0x14C30000 0x100>;
+		u-boot,dm-pre-reloc;
+		clocks = <&clock_peric1 PCLK_UART2>,
+			 <&clock_peric1 SCLK_UART2>;
+		clock-names = "uart", "clk_uart_baud0";
+		pinctrl-names = "default";
+		pinctrl-0 = <&serial2_bus>;
+	};
+};

arch/arm/mach-exynos/Kconfig +8 -0

index 28a6a60..0a6cb33 100644
@@ -20,6 +20,14 @@ config ARCH_EXYNOS5
 	  Cortex-A7 CPU in big.LITTLE configuration). There are multiple SoCs
 	  in this family including Exynos5250, Exynos5420 and Exynos5800.
 
+config ARCH_EXYNOS7
+	bool "Exynos7 SoC family"
+	select ARM64
+	help
+	  Samsung Exynos7 SoC family are based on ARM Cortex-A57 CPU or
+	  Cortex-A53 CPU (and some in a big.LITTLE configuration). There are
+	  multiple SoCs in this family including Exynos7420.
+
 endchoice
 
 if ARCH_EXYNOS4

arch/arm/mach-exynos/Makefile +1 -0

index f3c07b7..0cc6c32 100644
@@ -7,6 +7,7 @@
 
 obj-y	+= soc.o
 obj-$(CONFIG_CPU_V7) += clock.o pinmux.o power.o system.o
+obj-$(CONFIG_ARM64)	+= mmu-arm64.o
 
 obj-$(CONFIG_EXYNOS5420)	+= sec_boot.o

arch/arm/mach-exynos/mmu-arm64.c new file +35 -0

new file mode 100644
index 0000000..ba6d99d
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) 2016 Samsung Electronics
+ * Thomas Abraham <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/armv8/mmu.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_EXYNOS7420
+static struct mm_region exynos7420_mem_map[] = {
+	{
+		.base	= 0x10000000UL,
+		.size	= 0x10000000UL,
+		.attrs	= PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+				PTE_BLOCK_NON_SHARE |
+				PTE_BLOCK_PXN | PTE_BLOCK_UXN,
+	}, {
+		.base	= 0x40000000UL,
+		.size	= 0x80000000UL,
+		.attrs	= PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+				PTE_BLOCK_INNER_SHARE,
+	}, {
+		/* List terminator */
+		.base	= 0,
+		.size	= 0,
+		.attrs	= 0,
+	},
+};
+
+struct mm_region *mem_map = exynos7420_mem_map;
+#endif

arch/arm/mach-exynos/soc.c +8 -0

index 737a8dd..f9c7468 100644
@@ -23,3 +23,11 @@ void enable_caches(void)
 	dcache_enable();
 }
 #endif
+
+#ifdef CONFIG_ARM64
+void lowlevel_init(void)
+{
+	armv8_switch_to_el2();
+	armv8_switch_to_el1();
+}
+#endif

include/configs/espresso7420.h new file +34 -0

new file mode 100644
index 0000000..c6a756d
@@ -0,0 +1,34 @@
+/*
+ * Configuration settings for the SAMSUNG ESPRESSO7420 board.
+ * Copyright (C) 2016 Samsung Electronics
+ * Thomas Abraham <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_ESPRESSO7420_H
+#define __CONFIG_ESPRESSO7420_H
+
+#include <configs/exynos7420-common.h>
+
+#define CONFIG_BOARD_COMMON
+
+#define CONFIG_ESPRESSO7420
+#define CONFIG_ENV_IS_NOWHERE
+
+#define CONFIG_SYS_SDRAM_BASE		0x40000000
+#define CONFIG_SYS_TEXT_BASE		0x43E00000
+#define CONFIG_SPL_STACK		CONFIG_IRAM_END
+#define CONFIG_SYS_INIT_SP_ADDR		CONFIG_IRAM_END
+
+/* select serial console configuration */
+#define CONFIG_DEFAULT_CONSOLE	"console=ttySAC1,115200n8\0"
+
+#define CONFIG_IDENT_STRING	" for ESPRESSO7420"
+#define CONFIG_DEFAULT_CONSOLE	"console=ttySAC1,115200n8\0"
+
+/* DRAM Memory Banks */
+#define CONFIG_NR_DRAM_BANKS	8
+#define SDRAM_BANK_SIZE		(256UL << 20UL)	/* 256 MB */
+
+#endif	/* __CONFIG_ESPRESSO7420_H */

include/configs/exynos7420-common.h new file +113 -0

113 lines not on this page · raw message

Signature · 1 line

1.6.6.rc2

Thomas Abraham

author

2016-04-23 16:48 UTC #11 lore raw

PATCH v3 8/8 board: samsung: add initial Espresso7420 board support

From: Thomas Abraham <[email protected]>

Espresso7420 is a development/evaluation board for Exynos7420 SoC. It includes multiple onboard compoments (EMMC/Codec) and various interconnects (USB/HDMI).

---
 arch/arm/dts/Makefile                     |    1 +
 arch/arm/dts/exynos7420-espresso7420.dts  |   24 ++++++++++++++++++++++++
 arch/arm/mach-exynos/Kconfig              |   19 +++++++++++++++++++
 board/samsung/common/board.c              |   10 ++++++++--
 board/samsung/espresso7420/Kconfig        |   16 ++++++++++++++++
 board/samsung/espresso7420/MAINTAINERS    |    5 +++++
 board/samsung/espresso7420/Makefile       |   10 ++++++++++
 board/samsung/espresso7420/espresso7420.c |   16 ++++++++++++++++
 configs/espresso7420_defconfig            |    9 +++++++++
 9 files changed, 108 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/dts/exynos7420-espresso7420.dts
 create mode 100644 board/samsung/espresso7420/Kconfig
 create mode 100644 board/samsung/espresso7420/MAINTAINERS
 create mode 100644 board/samsung/espresso7420/Makefile
 create mode 100644 board/samsung/espresso7420/espresso7420.c
 create mode 100644 configs/espresso7420_defconfig

arch/arm/dts/Makefile +1 -0

index aa31fd9..a08e45f 100644
@@ -19,6 +19,7 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
 	exynos5420-peach-pit.dtb \
 	exynos5800-peach-pi.dtb \
 	exynos5422-odroidxu3.dtb
+dtb-$(CONFIG_EXYNOS7420) += exynos7420-espresso7420.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3288-firefly.dtb \
 	rk3288-jerry.dtb \

arch/arm/dts/exynos7420-espresso7420.dts new file +24 -0

new file mode 100644
index 0000000..f17a848
@@ -0,0 +1,24 @@
+/*
+ * Samsung Espresso7420 board device tree source
+ *
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include "exynos7420.dtsi"
+/ {
+	model = "Samsung Espresso7420 board based on Exynos7420";
+	compatible = "samsung,espresso7420", "samsung,exynos7420";
+
+	aliases {
+		serial2 = "/serial at 14C30000";
+		console = "/serial at 14C30000";
+		pinctrl0 = "/pinctrl at 13470000";
+	};
+};
+
+&fin_pll {
+	clock-frequency = <24000000>;
+};

arch/arm/mach-exynos/Kconfig +19 -0

index 0a6cb33..c25fcf3 100644
@@ -109,6 +109,24 @@ config TARGET_PEACH_PIT
 endchoice
 endif
 
+if ARCH_EXYNOS7
+
+choice
+	prompt "EXYNOS7 board select"
+
+config  TARGET_ESPRESSO7420
+	bool "ESPRESSO7420 board"
+	select ARM64
+	select SUPPORT_SPL
+	select OF_CONTROL
+	select SPL_DISABLE_OF_CONTROL
+	select PINCTRL
+	select PINCTRL_EXYNOS7420
+	select CLK_EXYNOS
+
+endchoice
+endif
+
 config SYS_SOC
 	default "exynos"

@@ -121,5 +139,6 @@ source "board/samsung/odroid/Kconfig"
 source "board/samsung/arndale/Kconfig"
 source "board/samsung/smdk5250/Kconfig"
 source "board/samsung/smdk5420/Kconfig"
+source "board/samsung/espresso7420/Kconfig"
 
 endif

board/samsung/common/board.c +8 -2

index 1334c22..7995174 100644
@@ -27,6 +27,8 @@
 #include <usb.h>
 #include <dwc3-uboot.h>
 #include <samsung/misc.h>
+#include <dm/pinctrl.h>
+#include <dm.h>
 
 DECLARE_GLOBAL_DATA_PTR;

@@ -97,7 +99,7 @@ int board_init(void)
 int dram_init(void)
 {
 	unsigned int i;
-	u32 addr;
+	unsigned long addr;
 
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 		addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);

@@ -109,7 +111,7 @@ int dram_init(void)
 void dram_init_banksize(void)
 {
 	unsigned int i;
-	u32 addr, size;
+	unsigned long addr, size;
 
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 		addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);

@@ -122,6 +124,7 @@ void dram_init_banksize(void)
 
 static int board_uart_init(void)
 {
+#ifndef CONFIG_PINCTRL_EXYNOS
 	int err, uart_id, ret = 0;
 
 	for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {

@@ -133,6 +136,9 @@ static int board_uart_init(void)
 		}
 	}
 	return ret;
+#else
+	return 0;
+#endif
 }
 
 #ifdef CONFIG_BOARD_EARLY_INIT_F

board/samsung/espresso7420/Kconfig new file +16 -0

new file mode 100644
index 0000000..62251c5
@@ -0,0 +1,16 @@
+if TARGET_ESPRESSO7420
+
+config SYS_BOARD
+	default "espresso7420"
+	help
+	  Espresso7420 is a development/evaluation board for Exynos7420 SoC.
+	  It includes multiple onboard compoments (EMMC/Codec) and various
+	  interconnects (USB/HDMI).
+
+config SYS_VENDOR
+	default "samsung"
+
+config SYS_CONFIG_NAME
+	default "espresso7420"
+
+endif

board/samsung/espresso7420/MAINTAINERS new file +5 -0

new file mode 100644
index 0000000..aaebc4c
@@ -0,0 +1,5 @@
+ESPRESSO7420 Board
+M:	Thomas Abraham <[email protected]>
+S:	Maintained
+F:	board/samsung/espresso7420/
+F:	include/configs/espresso7420.h

board/samsung/espresso7420/Makefile new file +10 -0

new file mode 100644
index 0000000..d514dc2
@@ -0,0 +1,10 @@
+#
+# Copyright (C) 2016 Samsung Electronics
+# Thomas Abraham <[email protected]>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+ifndef CONFIG_SPL_BUILD
+obj-y	+= espresso7420.o
+endif

board/samsung/espresso7420/espresso7420.c new file +16 -0

new file mode 100644
index 0000000..04a83bc
@@ -0,0 +1,16 @@
+/*
+ * Espresso7420 board file
+ * Copyright (C) 2016 Samsung Electronics
+ * Thomas Abraham <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int exynos_init(void)
+{
+	return 0;
+}

configs/espresso7420_defconfig new file +9 -0

new file mode 100644
index 0000000..0fe2759
@@ -0,0 +1,9 @@
+CONFIG_ARM=y
+CONFIG_ARCH_EXYNOS=y
+CONFIG_ARCH_EXYNOS7=y
+CONFIG_TARGET_ESPRESSO7420=y
+CONFIG_DEFAULT_DEVICE_TREE="exynos7420-espresso7420"
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_PROMPT="ESPRESSO7420 # "
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_SETEXPR is not set

Signature · 1 line

1.6.6.rc2

Tom Rini

2016-04-25 20:58 UTC #12 lore raw

v3 cover Add support for Espresso7420 board

Quoted 10 lines · Thomas Abraham

Changes since v2:
- changes based on comments from Simon Glass and Minkyu Kang.
This patch series add support for Espresso7420 board. This board is the development/evaluation platform for Exynos7420 SoC. The SoC is composed of quad Cortex-A57 block, a quad Cortex-A53 block and various other peripherals. The board includes multiple components such as the EMMC/Codec and support multiple interconnect interfaces including HDMI and USB.

Quoted 6 lines

The first two patches add Exynos7420 pinctrl driver support which was initially posted seperatly but now included in this series. Thanks to Simon Glass and Minkyu Kang for their review. The rest of the patches add Exynos7420 clock driver support, minor changes in the S5P serial driver, Exynos7420 SoC support and Espresso7420 board support.

Things look good here to me and I expect this to come in via the samsung tree. I'll like it up to you and Minkyu to decide if it's now or next merge window. Thanks!

Signature · 8 lines

Tom
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Alim Akhtar

reviewer

2016-04-26 06:16 UTC #13 lore raw

v3 cover Add support for Espresso7420 board

Hi Thomas,

Quoted 17 lines · Thomas Abraham

Changes since v2:
- changes based on comments from Simon Glass and Minkyu Kang.
This patch series add support for Espresso7420 board. This board is the development/evaluation platform for Exynos7420 SoC. The SoC is composed of quad Cortex-A57 block, a quad Cortex-A53 block and various other peripherals. The board includes multiple components such as the EMMC/Codec and support multiple interconnect interfaces including HDMI and USB.
The first two patches add Exynos7420 pinctrl driver support which was initially posted seperatly but now included in this series. Thanks to Simon Glass and Minkyu Kang for their review. The rest of the patches add Exynos7420 clock driver support, minor changes in the S5P serial driver, Exynos7420 SoC support and Espresso7420 board support.

Quoted 11 lines

Thomas Abraham (8):
pinctrl: add the DM_UC_FLAG_SEQ_ALIAS flag for numbering the devices
pinctrl: Add pinctrl driver support for Exynos7420 SoC
clk: exynos: add clock driver for Exynos7420 Soc
serial: s5p: get the port id number from the alias of the device node
serial: s5p: use clock api to get clock rate
arm: exynos: realign the code to allow support for newer 64-bit
platforms
arm: exynos: add support for Exynos7420 SoC
board: samsung: add initial Espresso7420 board support

Tested this version on espresso7420 board,
feel free to add

Tested-by Alim Akhtar <[email protected]>

Quoted 75 lines

  arch/arm/Kconfig                            |    1 -
  arch/arm/dts/Makefile                       |    1 +
  arch/arm/dts/exynos7420-espresso7420.dts    |   24 +++
  arch/arm/dts/exynos7420.dtsi                |   83 ++++++++++
  arch/arm/mach-exynos/Kconfig                |   61 +++++++-
  arch/arm/mach-exynos/Makefile               |    6 +-
  arch/arm/mach-exynos/include/mach/cpu.h     |    2 +-
  arch/arm/mach-exynos/include/mach/gpio.h    |    2 +-
  arch/arm/mach-exynos/mmu-arm64.c            |   35 ++++
  arch/arm/mach-exynos/soc.c                  |   10 +
  board/samsung/common/board.c                |   10 +-
  board/samsung/espresso7420/Kconfig          |   16 ++
  board/samsung/espresso7420/MAINTAINERS      |    5 +
  board/samsung/espresso7420/Makefile         |   10 +
  board/samsung/espresso7420/espresso7420.c   |   16 ++
  configs/arndale_defconfig                   |    1 +
  configs/espresso7420_defconfig              |    9 +
  configs/odroid-xu3_defconfig                |    1 +
  configs/odroid_defconfig                    |    1 +
  configs/origen_defconfig                    |    1 +
  configs/peach-pi_defconfig                  |    1 +
  configs/peach-pit_defconfig                 |    1 +
  configs/s5pc210_universal_defconfig         |    1 +
  configs/smdk5250_defconfig                  |    1 +
  configs/smdk5420_defconfig                  |    1 +
  configs/smdkv310_defconfig                  |    1 +
  configs/snow_defconfig                      |    1 +
  configs/spring_defconfig                    |    1 +
  configs/trats2_defconfig                    |    1 +
  configs/trats_defconfig                     |    1 +
  drivers/clk/Kconfig                         |    1 +
  drivers/clk/Makefile                        |    1 +
  drivers/clk/exynos/Kconfig                  |   18 ++
  drivers/clk/exynos/Makefile                 |    9 +
  drivers/clk/exynos/clk-exynos7420.c         |  236 +++++++++++++++++++++++++++
  drivers/clk/exynos/clk-pll.c                |   33 ++++
  drivers/clk/exynos/clk-pll.h                |    9 +
  drivers/pinctrl/Kconfig                     |    1 +
  drivers/pinctrl/Makefile                    |    1 +
  drivers/pinctrl/exynos/Kconfig              |   10 +
  drivers/pinctrl/exynos/Makefile             |    9 +
  drivers/pinctrl/exynos/pinctrl-exynos.c     |  141 ++++++++++++++++
  drivers/pinctrl/exynos/pinctrl-exynos.h     |   77 +++++++++
  drivers/pinctrl/exynos/pinctrl-exynos7420.c |  120 ++++++++++++++
  drivers/pinctrl/pinctrl-uclass.c            |    1 +
  drivers/serial/serial_s5p.c                 |   19 ++-
  include/configs/espresso7420.h              |   34 ++++
  include/configs/exynos7420-common.h         |  113 +++++++++++++
  include/dt-bindings/clock/exynos7420-clk.h  |  207 +++++++++++++++++++++++
  49 files changed, 1334 insertions(+), 11 deletions(-)

create mode 100644 arch/arm/dts/exynos7420-espresso7420.dts create mode 100644 arch/arm/dts/exynos7420.dtsi create mode 100644 arch/arm/mach-exynos/mmu-arm64.c create mode 100644 board/samsung/espresso7420/Kconfig create mode 100644 board/samsung/espresso7420/MAINTAINERS create mode 100644 board/samsung/espresso7420/Makefile create mode 100644 board/samsung/espresso7420/espresso7420.c create mode 100644 configs/espresso7420_defconfig create mode 100644 drivers/clk/exynos/Kconfig
create mode 100644 drivers/clk/exynos/Makefile create mode 100644 drivers/clk/exynos/clk-exynos7420.c create mode 100644 drivers/clk/exynos/clk-pll.c create mode 100644 drivers/clk/exynos/clk-pll.h create mode 100644 drivers/pinctrl/exynos/Kconfig create mode 100644 drivers/pinctrl/exynos/Makefile create mode 100644 drivers/pinctrl/exynos/pinctrl-exynos.c create mode 100644 drivers/pinctrl/exynos/pinctrl-exynos.h create mode 100644 drivers/pinctrl/exynos/pinctrl-exynos7420.c create mode 100644 include/configs/espresso7420.h create mode 100644 include/configs/exynos7420-common.h create mode 100644 include/dt-bindings/clock/exynos7420-clk.h

Minkyu Kang

2016-05-26 01:30 UTC #14 lore raw

v3 cover Add support for Espresso7420 board