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pci: host: new driver for Marvell Armada 7K/8K PCIe controller

PATCH Superseded Thomas Petazzoni 2 participants 6 messages Apr 26, 2016

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#0 lore raw

v3 cover pci: host: new driver for Marvell Armada 7K/8K PCIe controller

Hello,

Here is the third iteration of the PCIe host controller driver needed for the ARM64 Marvell Armada 7K/8K platform.

Changes since v2:

- Added Rob Herring's Acked-by on the Device Tree binding patch.

- Reworked the PCIe host driver following the suggestion of Bjorn
Helgaas: creation of armada8k_add_pcie_port() and armada8k_pcie_establish_link() in order to follow the convention of other Designware based drivers.

Thanks!

Thomas

Thomas Petazzoni (2):
dt-bindings: pci: add DT binding for Marvell Armada 7K/8K PCIe
controller
pci: host: new driver for Marvell Armada 7K/8K PCIe controller

 .../devicetree/bindings/pci/pci-armada8k.txt       |  38 +++
 drivers/pci/host/Kconfig                           |  11 +
 drivers/pci/host/Makefile                          |   1 +
 drivers/pci/host/pcie-armada8k.c                   | 276 +++++++++++++++++++++
 4 files changed, 326 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pci/pci-armada8k.txt
 create mode 100644 drivers/pci/host/pcie-armada8k.c
Signature · 1 line
2.6.4
#1 lore raw

PATCH v3 1/2 dt-bindings: pci: add DT binding for Marvell Armada 7K/8K PCIe controller

This commit adds the Device Tree binding documentation that allows to describe the PCIe controller found in Marvell Armada 7K/8K SoCs.

---
 .../devicetree/bindings/pci/pci-armada8k.txt       | 38 ++++++++++++++++++++++
 1 file changed, 38 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pci/pci-armada8k.txt
Documentation/devicetree/bindings/pci/pci-armada8k.txt new file +38 -0
new file mode 100644
index 0000000..598533a
@@ -0,0 +1,38 @@
+* Marvell Armada 7K/8K PCIe interface
+
+This PCIe host controller is based on the Synopsis Designware PCIe IP
+and thus inherits all the common properties defined in designware-pcie.txt.
+
+Required properties:
+- compatible: "marvell,armada8k-pcie"
+- reg: must contain two register regions
+   - the control register region
+   - the config space region
+- reg-names:
+   - "ctrl" for the control register region
+   - "config" for the config space region
+- interrupts: Interrupt specifier for the PCIe controler
+- clocks: reference to the PCIe controller clock
+
+Example:
+
+	pcie at f2600000 {
+		compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
+		reg = <0 0xf2600000 0 0x10000>, <0 0xf6f00000 0 0x80000>;
+		reg-names = "ctrl", "config";
+		#address-cells = <3>;
+		#size-cells = <2>;
+		#interrupt-cells = <1>;
+		device_type = "pci";
+		dma-coherent;
+
+		bus-range = <0 0xff>;
+		ranges = <0x81000000 0 0xf9000000 0  0xf9000000 0 0x10000	/* downstream I/O */
+			  0x82000000 0 0xf6000000 0  0xf6000000 0 0xf00000>;	/* non-prefetchable memory */
+		interrupt-map-mask = <0 0 0 0>;
+		interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+		num-lanes = <1>;
+		clocks = <&cpm_syscon0 1 13>;
+		status = "disabled";
+	};
Signature · 1 line
2.6.4
#2 lore raw

PATCH v3 2/2 pci: host: new driver for Marvell Armada 7K/8K PCIe controller

In reply to Thomas Petazzoni

The Marvell Armada 7K/8K SoCs integrate a PCIe controller from Synopsys. This commit adds a new driver that provides the small glue needed to use the existing Designware driver to make it work on Marvell Armada 7K/8K SoCs.

The MSI support will be enabled at a later point.

---
 drivers/pci/host/Kconfig         |  11 ++
 drivers/pci/host/Makefile        |   1 +
 drivers/pci/host/pcie-armada8k.c | 276 +++++++++++++++++++++++++++++++++++++++
 3 files changed, 288 insertions(+)
 create mode 100644 drivers/pci/host/pcie-armada8k.c
drivers/pci/host/Kconfig +11 -0
index 7a0780d..a3b6f24 100644
@@ -231,4 +231,15 @@ config PCI_HOST_THUNDER_ECAM
 	help
 	  Say Y here if you want ECAM support for CN88XX-Pass-1.x Cavium Thunder SoCs.
 
+config PCIE_ARMADA_8K
+	bool "Marvell Armada-8K PCIe controller"
+	depends on ARCH_MVEBU
+	select PCIE_DW
+	select PCIEPORTBUS
+	help
+	  Say Y here if you want to enable PCIe controller support on
+	  Armada-8K SoCs. The PCIe controller on Armada-8K is based on
+	  Designware hardware and therefore the driver re-uses the
+	  Designware core functions to implement the driver.
+
 endmenu
drivers/pci/host/Makefile +1 -0
index d85b5fa..a6f85e3 100644
@@ -28,3 +28,4 @@ obj-$(CONFIG_PCI_HISI) += pcie-hisi.o
 obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o
 obj-$(CONFIG_PCI_HOST_THUNDER_ECAM) += pci-thunder-ecam.o
 obj-$(CONFIG_PCI_HOST_THUNDER_PEM) += pci-thunder-pem.o
+obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o
drivers/pci/host/pcie-armada8k.c new file +276 -0

276 lines not on this page · raw message

Signature · 1 line
2.6.4
#3 lore raw

v3 cover pci: host: new driver for Marvell Armada 7K/8K PCIe controller

In reply to Thomas Petazzoni
Quoted 23 lines · Thomas Petazzoni

Hello,

Here is the third iteration of the PCIe host controller driver needed for the ARM64 Marvell Armada 7K/8K platform.

Changes since v2:

- Added Rob Herring's Acked-by on the Device Tree binding patch.

- Reworked the PCIe host driver following the suggestion of Bjorn
Helgaas: creation of armada8k_add_pcie_port() and armada8k_pcie_establish_link() in order to follow the convention of other Designware based drivers.

Thanks!

Thomas

Thomas Petazzoni (2):
dt-bindings: pci: add DT binding for Marvell Armada 7K/8K PCIe
controller
pci: host: new driver for Marvell Armada 7K/8K PCIe controller

Quoted 7 lines
 .../devicetree/bindings/pci/pci-armada8k.txt       |  38 +++
 drivers/pci/host/Kconfig                           |  11 +
 drivers/pci/host/Makefile                          |   1 +
 drivers/pci/host/pcie-armada8k.c                   | 276 +++++++++++++++++++++
 4 files changed, 326 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pci/pci-armada8k.txt
 create mode 100644 drivers/pci/host/pcie-armada8k.c

Thanks, Thomas, I applied these to pci/host-armada for v4.7.

I added the tweaks below to use dev_dbg() instead of pr_debug(), use dw_pcie_wait_for_link() instead of another hand-coded timeout loop, and fix a typo and remove unused constants.

Bjorn

drivers/pci/host/pcie-armada8k.c +6 -20
index 7302de2..811ddf8 100644
@@ -10,8 +10,6 @@
  * warranty of any kind, whether express or implied.
  */
 
-#define pr_fmt(fmt) "armada-8k-pcie: " fmt
-
 #include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/interrupt.h>
@@ -39,8 +37,6 @@ struct armada8k_pcie {
 #define PCIE_APP_LTSSM_EN		BIT(2)
 #define PCIE_DEVICE_TYPE_SHIFT		4
 #define PCIE_DEVICE_TYPE_MASK		0xF
-#define PCIE_DEVICE_TYPE_EP		0x0 /* Endpoint */
-#define PCIE_DEVICE_TYPE_LEP		0x1 /* Legacy endpoint */
 #define PCIE_DEVICE_TYPE_RC		0x4 /* Root complex */
 
 #define PCIE_GLOBAL_STATUS_REG		0x8
@@ -69,14 +65,12 @@ struct armada8k_pcie {
 #define AX_USER_DOMAIN_MASK		0x3
 #define AX_USER_DOMAIN_SHIFT		4
 
-
-
 #define to_armada8k_pcie(x)	container_of(x, struct armada8k_pcie, pp)
 
 static int armada8k_pcie_link_up(struct pcie_port *pp)
 {
-	u32 reg;
 	struct armada8k_pcie *pcie = to_armada8k_pcie(pp);
+	u32 reg;
 	u32 mask = PCIE_GLB_STS_RDLH_LINK_UP | PCIE_GLB_STS_PHY_LINK_UP;
 
 	reg = readl(pcie->base + PCIE_GLOBAL_STATUS_REG);
@@ -84,7 +78,7 @@ static int armada8k_pcie_link_up(struct pcie_port *pp)
 	if ((reg & mask) == mask)
 		return 1;
 
-	pr_debug("No link detected (Global-Status: 0x%08x).\n", reg);
+	dev_dbg(pp->dev, "No link detected (Global-Status: 0x%08x).\n", reg);
 	return 0;
 }
 
@@ -92,10 +86,9 @@ static void armada8k_pcie_establish_link(struct pcie_port *pp)
 {
 	struct armada8k_pcie *pcie = to_armada8k_pcie(pp);
 	void __iomem *base = pcie->base;
-	int timeout = 1000;
 	u32 reg;
 
-	if (!armada8k_pcie_link_up(pp)) {
+	if (!dw_pcie_link_up(pp)) {
 		/* Disable LTSSM state machine to enable configuration */
 		reg = readl(base + PCIE_GLOBAL_CONTROL_REG);
 		reg &= ~(PCIE_APP_LTSSM_EN);
@@ -129,7 +122,7 @@ static void armada8k_pcie_establish_link(struct pcie_port *pp)
 	       PCIE_INT_C_ASSERT_MASK | PCIE_INT_D_ASSERT_MASK;
 	writel(reg, base + PCIE_GLOBAL_INT_MASK1_REG);
 
-	if (!armada8k_pcie_link_up(pp)) {
+	if (!dw_pcie_link_up(pp)) {
 		/* Configuration done. Start LTSSM */
 		reg = readl(base + PCIE_GLOBAL_CONTROL_REG);
 		reg |= PCIE_APP_LTSSM_EN;
@@ -137,14 +130,7 @@ static void armada8k_pcie_establish_link(struct pcie_port *pp)
 	}
 
 	/* Wait until the link becomes active again */
-	while (timeout) {
-		if (armada8k_pcie_link_up(pp))
-			break;
-		msleep(1);
-		timeout--;
-	}
-
-	if (timeout == 0)
+	if (dw_pcie_wait_for_link(pp))
 		dev_err(pp->dev, "Link not up after reconfiguration\n");
 }
 
@@ -163,7 +149,7 @@ static irqreturn_t armada8k_pcie_irq_handler(int irq, void *arg)
 
 	/*
 	 * Interrupts are directly handled by the device driver of the
-	 * PCI device. However, there are also latched into the PCIe
+	 * PCI device.  However, they are also latched into the PCIe
 	 * controller, so we simply discard them.
 	 */
 	val = readl(base + PCIE_GLOBAL_INT_CAUSE1_REG);
#4 lore raw

v3 cover pci: host: new driver for Marvell Armada 7K/8K PCIe controller

Hello,

Quoted 4 lines · Bjorn Helgaas
Quoted 2 lines
 create mode 100644 Documentation/devicetree/bindings/pci/pci-armada8k.txt
 create mode 100644 drivers/pci/host/pcie-armada8k.c

Thanks, Thomas, I applied these to pci/host-armada for v4.7.

Thanks!

Quoted 3 lines

I added the tweaks below to use dev_dbg() instead of pr_debug(), use dw_pcie_wait_for_link() instead of another hand-coded timeout loop, and fix a typo and remove unused constants.

Looks all good, thanks for applying! Just one tiny question below.

drivers/pci/host/pcie-armada8k.c static irqreturn_t armada8k_pcie_irq_handler(int irq, void *arg) · line 152

Quoted 4 lines
drivers/pci/host/pcie-armada8k.c +1 -1
 	/*
 	 * Interrupts are directly handled by the device driver of the
-	 * PCI device. However, there are also latched into the PCIe
+	 * PCI device.  However, they are also latched into the PCIe

Any reason to have two spaces after the dot here?

Thanks again!

Thomas

Signature · 3 lines
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
#5 lore raw

v3 cover pci: host: new driver for Marvell Armada 7K/8K PCIe controller

Quoted 15 lines · Thomas Petazzoni

Hello,

Quoted 4 lines · Bjorn Helgaas
Quoted 2 lines
 create mode 100644 Documentation/devicetree/bindings/pci/pci-armada8k.txt
 create mode 100644 drivers/pci/host/pcie-armada8k.c

Thanks, Thomas, I applied these to pci/host-armada for v4.7.

Thanks!

Quoted 3 lines

I added the tweaks below to use dev_dbg() instead of pr_debug(), use dw_pcie_wait_for_link() instead of another hand-coded timeout loop, and fix a typo and remove unused constants.

Quoted 8 lines

Looks all good, thanks for applying! Just one tiny question below.

drivers/pci/host/pcie-armada8k.c static irqreturn_t armada8k_pcie_irq_handler(int irq, void *arg) · line 152

Quoted 4 lines
drivers/pci/host/pcie-armada8k.c +1 -1
 	/*
 	 * Interrupts are directly handled by the device driver of the
-	 * PCI device. However, there are also latched into the PCIe
+	 * PCI device.  However, they are also latched into the PCIe

Any reason to have two spaces after the dot here?

Only habit because my eighth-grade typing teacher in 1979 did it that way, and (I think) vim does it that way by default. Poor reasons, both, and definitely trumped by consistency with the rest of the file, which does use a single space in both other instances. I removed the extra space :)

Bjorn