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irqchip: Support Aspeed IRQ controller

PATCH New Joel Stanley 5 participants 7 messages May 9, 2016

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Joel Stanley

author maintainer
#0 lore raw

cover irqchip: Support Aspeed IRQ controller

Hello All,

This adds support for the IRQ controller found in the Aspeed ast2400 and ast2500 BMC SoCs.

It's been tested on the ast2400 in an OpenPower Palmetto system, and on the ast2500-edk developer kit.

Cheers,

Joel

Benjamin Herrenschmidt (1):
irqchip: Add irq controller for Aspeed

Joel Stanley (1):
doc/devicetree: Add Aspeed VIC bindings

 .../interrupt-controller/aspeed,ast2400-vic.txt    |  24 +++
 drivers/irqchip/Makefile                           |   1 +
 drivers/irqchip/irq-aspeed-vic.c                   | 238 +++++++++++++++++++++
 3 files changed, 263 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.txt
 create mode 100644 drivers/irqchip/irq-aspeed-vic.c
Signature · 1 line
2.8.1
author maintainer
#1 lore raw

PATCH 1/2 doc/devicetree: Add Aspeed VIC bindings

---
 .../interrupt-controller/aspeed,ast2400-vic.txt    | 24 ++++++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.txt
Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.txt new file +24 -0
new file mode 100644
index 000000000000..10ed0c20ee6f
@@ -0,0 +1,24 @@
+Aspeed Vectored Interrupt Controller
+
+These bindings are for the Aspeed AST2400 interrupt controller register layout.
+The SoC has an legacy register layout, but this driver does not support that
+mode of operation.
+
+Required properties:
+
+- compatible : should be "aspeed,ast2400-vic".
+
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+  interrupt source. The value shall be 1.
+- valid-sources : bitmask of valid irq sources
+
+Example:
+
+ vic: interrupt-controller {
+      compatible = "aspeed,ast2400-new-vic";
+      interrupt-controller;
+      #interrupt-cells = <1>;
+      valid-sources = < 0xffffffff 0x0007ffff>;
+      reg = <0x1e6c0080 0x80>;
+ };
Signature · 1 line
2.8.1
#2 lore raw

PATCH 1/2 doc/devicetree: Add Aspeed VIC bindings

Hi Joel,

Quoted 9 lines · Joel Stanley
Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.txt new file +9 -0
+Aspeed Vectored Interrupt Controller
+
+These bindings are for the Aspeed AST2400 interrupt controller register layout.
+The SoC has an legacy register layout, but this driver does not support that
+mode of operation.
+
+Required properties:
+
+- compatible : should be "aspeed,ast2400-vic".

Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.txt line 19

Quoted 10 lines
Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.txt new file +10 -0
+
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+  interrupt source. The value shall be 1.
+- valid-sources : bitmask of valid irq sources
+
+Example:
+
+ vic: interrupt-controller {
+      compatible = "aspeed,ast2400-new-vic";

That doesn't match the compatible string documented above.

Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.txt line 24

Quoted 5 lines
Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.txt new file +5 -0
+      interrupt-controller;
+      #interrupt-cells = <1>;
+      valid-sources = < 0xffffffff 0x0007ffff>;
+      reg = <0x1e6c0080 0x80>;
+ };

baruch

Signature · 3 lines
     http://baruch.siach.name/blog/                  ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -
#3 lore raw

PATCH 1/2 doc/devicetree: Add Aspeed VIC bindings

In reply to Joel Stanley

Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.txt line 19

Quoted 13 lines · On Monday 09 May 2016 22:03:58 Joel Stanley wrote:
Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.txt new file +12 -0
+
+- compatible : should be "aspeed,ast2400-vic".
+
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+  interrupt source. The value shall be 1.
+- valid-sources : bitmask of valid irq sources
+
+Example:
+
+ vic: interrupt-controller {
+      compatible = "aspeed,ast2400-new-vic";

The example doesn't match the binding regarding the compatible string, otherwise looks ok to me.

Arnd

#4 lore raw

PATCH 1/2 doc/devicetree: Add Aspeed VIC bindings

In reply to Joel Stanley
Quoted 16 lines · Joel Stanley
---
 .../interrupt-controller/aspeed,ast2400-vic.txt    | 24 ++++++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.txt
Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.txt new file +4 -0
new file mode 100644
index 000000000000..10ed0c20ee6f
@@ -0,0 +1,24 @@
+Aspeed Vectored Interrupt Controller
+
+These bindings are for the Aspeed AST2400 interrupt controller register layout.
+The SoC has an legacy register layout, but this driver does not support that

Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.txt line 14

Quoted 10 lines
Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.txt new file +10 -0
+mode of operation.
+
+Required properties:
+
+- compatible : should be "aspeed,ast2400-vic".
+
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+  interrupt source. The value shall be 1.
+- valid-sources : bitmask of valid irq sources

Generally we steer clear of this kind of bitmap encoding in DT.

Is this actually necessary? What does htis gain us?

Why can we not just register with the full set of possible interrupts?

Thanks,
Mark.

Quoted 18 lines
Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2400-vic.txt new file +10 -0
+
+Example:
+
+ vic: interrupt-controller {
+      compatible = "aspeed,ast2400-new-vic";
+      interrupt-controller;
+      #interrupt-cells = <1>;
+      valid-sources = < 0xffffffff 0x0007ffff>;
+      reg = <0x1e6c0080 0x80>;
+ };
Signature · 6 lines
2.8.1

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#5 lore raw

PATCH 1/2 doc/devicetree: Add Aspeed VIC bindings

Quoted 7 lines · Mark Rutland

?
Generally we steer clear of this kind of bitmap encoding in DT.

Is this actually necessary? What does htis gain us?

Why can we not just register with the full set of possible interrupts?

Trying to remember why I did that ... I think it has to do with supporting multiple SoCs that have different possible sources...

There might also be a case of some sources routed to the internal coldfire microcontroller or the LPC bus instead of the ARM but I'm not 100% certain.

Cheers,
Ben.

author maintainer
#6 lore raw

PATCH 2/2 irqchip: Add irq controller for Aspeed

In reply to Joel Stanley

From: Benjamin Herrenschmidt <[email protected]>

---
 drivers/irqchip/Makefile         |   1 +
 drivers/irqchip/irq-aspeed-vic.c | 238 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 239 insertions(+)
 create mode 100644 drivers/irqchip/irq-aspeed-vic.c
drivers/irqchip/Makefile +1 -0
index b03cfcbbac6b..ec82e6e15a38 100644
@@ -65,3 +65,4 @@ obj-$(CONFIG_INGENIC_IRQ)		+= irq-ingenic.o
 obj-$(CONFIG_IMX_GPCV2)			+= irq-imx-gpcv2.o
 obj-$(CONFIG_PIC32_EVIC)		+= irq-pic32-evic.o
 obj-$(CONFIG_MVEBU_ODMI)		+= irq-mvebu-odmi.o
+obj-$(CONFIG_ARCH_ASPEED)		+= irq-aspeed-vic.o
drivers/irqchip/irq-aspeed-vic.c new file +238 -0

238 lines not on this page · raw message

Signature · 1 line
2.8.1