ARM: dts: Fix igepv5 audiopwon-gpio
PATCH 1/1 ARM: dts: Fix igepv5 audiopwon-gpio
Playing audio works on omap5-uevm, but produces an "Unhandled fault:
imprecise external abort (0x1406) at 0x00000000" error on igepv5.
Looks like the twl6040 audpwron GPIO pin is different for these boards. Let's fix the issue by configuring the audpwron in the board specific dts file.
--- arch/arm/boot/dts/omap5-board-common.dtsi | 3 ++- arch/arm/boot/dts/omap5-igep0050.dts | 10 ++++++++++ arch/arm/boot/dts/omap5-uevm.dts | 10 ++++++++++ 3 files changed, 22 insertions(+), 1 deletion(-)
arch/arm/boot/dts/omap5-board-common.dtsi +2 -1
@@ -642,7 +642,8 @@ pinctrl-0 = <&twl6040_pins>; interrupts = <GIC_SPI 119 IRQ_TYPE_NONE>; /* IRQ_SYS_2N cascaded to gic */ - ti,audpwron-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>; /* gpio line 141 */ + + /* audpwron gpio defined in the board specific dts */ vio-supply = <&smps7_reg>; v2v1-supply = <&smps9_reg>;
arch/arm/boot/dts/omap5-igep0050.dts +10 -0
@@ -58,3 +58,13 @@ <&gpio7 3 0>; /* 195, SDA */ }; +&twl6040 { + ti,audpwron-gpio = <&gpio5 16 GPIO_ACTIVE_HIGH>; /* gpio line 144 */ +}; + +&twl6040_pins { + pinctrl-single,pins = < + OMAP5_IOPAD(0x1c4, PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_144 */ + OMAP5_IOPAD(0x1ca, PIN_OUTPUT | MUX_MODE6) /* perslimbus2_clock.gpio5_145 */ + >; +};
arch/arm/boot/dts/omap5-uevm.dts +10 -0
@@ -51,3 +51,13 @@ <&gpio9 1 GPIO_ACTIVE_HIGH>, /* TCA6424A P00, LS OE */ <&gpio7 1 GPIO_ACTIVE_HIGH>; /* GPIO 193, HPD */ }; + +&twl6040 { + ti,audpwron-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>; /* gpio line 141 */ +}; + +&twl6040_pins { + pinctrl-single,pins = < + OMAP5_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_141 */ + >; +};
Signature · 1 line
2.8.1
PATCH 1/1 ARM: dts: Fix igepv5 audiopwon-gpio
Quoted 2 lines · Tony Lindgren
Playing audio works on omap5-uevm, but produces an "Unhandled fault:
imprecise external abort (0x1406) at0x00000000" error on igepv5.
I assume this is coming from the McPDM driver... If the clock is missing from the twl6040 the IP is not accessible.
I do have a driver upstream to represent the twl6040 clock to be used by the McPDM, but did not had time to do the work for integrating that into the clock tree. Since it is external clock and we need i2c commands to configure things in twl6040, I'm still not sure how pm_runtime would like this...
Quoted 3 lines
Looks like the twl6040 audpwron GPIO pin is different for these boards. Let's fix the issue by configuring the audpwron in the board specific dts file.
Quoted 62 lines
Cc Agust? Fontquerni <[email protected]>Cc Eduard Gavin <[email protected]>Cc Enric Balletbo i Serra <[email protected]>Cc Peter Ujfalusi <[email protected]>Signed-off-by Tony Lindgren <[email protected]>--- arch/arm/boot/dts/omap5-board-common.dtsi | 3 ++- arch/arm/boot/dts/omap5-igep0050.dts | 10 ++++++++++ arch/arm/boot/dts/omap5-uevm.dts | 10 ++++++++++ 3 files changed, 22 insertions(+), 1 deletion(-)arch/arm/boot/dts/omap5-board-common.dtsi +2
-1@@ -642,7 +642,8 @@ pinctrl-0 = <&twl6040_pins>; interrupts = <GIC_SPI 119 IRQ_TYPE_NONE>; /* IRQ_SYS_2N cascaded to gic */ - ti,audpwron-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>; /* gpio line 141 */ + + /* audpwron gpio defined in the board specific dts */ vio-supply = <&smps7_reg>; v2v1-supply = <&smps9_reg>;arch/arm/boot/dts/omap5-igep0050.dts +10
-0@@ -58,3 +58,13 @@ <&gpio7 3 0>; /* 195, SDA */ }; +&twl6040 { + ti,audpwron-gpio = <&gpio5 16 GPIO_ACTIVE_HIGH>; /* gpio line 144 */ +}; + +&twl6040_pins { + pinctrl-single,pins = < + OMAP5_IOPAD(0x1c4, PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_144 */ + OMAP5_IOPAD(0x1ca, PIN_OUTPUT | MUX_MODE6) /* perslimbus2_clock.gpio5_145 */ + >; +};arch/arm/boot/dts/omap5-uevm.dts +10
-0@@ -51,3 +51,13 @@ <&gpio9 1 GPIO_ACTIVE_HIGH>, /* TCA6424A P00, LS OE */ <&gpio7 1 GPIO_ACTIVE_HIGH>; /* GPIO 193, HPD */ }; + +&twl6040 { + ti,audpwron-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>; /* gpio line 141 */ +}; + +&twl6040_pins { + pinctrl-single,pins = < + OMAP5_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_141 */ + >; +};
Signature · 1 line
P?ter
PATCH 1/1 ARM: dts: Fix igepv5 audiopwon-gpio
In reply to Tony LindgrenQuoted 37 lines · Tony Lindgren
Playing audio works on omap5-uevm, but produces an "Unhandled fault:
imprecise external abort (0x1406) at0x00000000" error on igepv5.Looks like the twl6040 audpwron GPIO pin is different for these boards. Let's fix the issue by configuring the audpwron in the board specific dts file.
Cc Agust? Fontquerni <[email protected]>Cc Eduard Gavin <[email protected]>Cc Enric Balletbo i Serra <[email protected]>Cc Peter Ujfalusi <[email protected]>Signed-off-by Tony Lindgren <[email protected]>--- arch/arm/boot/dts/omap5-board-common.dtsi | 3 ++- arch/arm/boot/dts/omap5-igep0050.dts | 10 ++++++++++ arch/arm/boot/dts/omap5-uevm.dts | 10 ++++++++++ 3 files changed, 22 insertions(+), 1 deletion(-)arch/arm/boot/dts/omap5-board-common.dtsi +2
-1@@ -642,7 +642,8 @@ pinctrl-0 = <&twl6040_pins>; interrupts = <GIC_SPI 119 IRQ_TYPE_NONE>; /* IRQ_SYS_2N cascaded to gic */ - ti,audpwron-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>; /* gpio line 141 */ + + /* audpwron gpio defined in the board specific dts */ vio-supply = <&smps7_reg>; v2v1-supply = <&smps9_reg>;arch/arm/boot/dts/omap5-igep0050.dts +0
-0
arch/arm/boot/dts/omap5-igep0050.dts line 62
Quoted 5 lines
arch/arm/boot/dts/omap5-igep0050.dts +2
-0@@ -58,3 +58,13 @@ <&gpio7 3 0>; /* 195, SDA */ }; +&twl6040 { + ti,audpwron-gpio = <&gpio5 16 GPIO_ACTIVE_HIGH>; /* gpio line 144 */
BTW: how do you know that gpio144 is used as audpwron GPIO on igepv5?
arch/arm/boot/dts/omap5-igep0050.dts line 68
Quoted 6 lines
arch/arm/boot/dts/omap5-igep0050.dts +6
-0+}; + +&twl6040_pins { + pinctrl-single,pins = < + OMAP5_IOPAD(0x1c4, PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_144 */ + OMAP5_IOPAD(0x1ca, PIN_OUTPUT | MUX_MODE6) /* perslimbus2_clock.gpio5_145 */
What does the gpio145 is used for?
Quoted 21 lines
arch/arm/boot/dts/omap5-igep0050.dts +2
-0+ >; +};arch/arm/boot/dts/omap5-uevm.dts +10
-0@@ -51,3 +51,13 @@ <&gpio9 1 GPIO_ACTIVE_HIGH>, /* TCA6424A P00, LS OE */ <&gpio7 1 GPIO_ACTIVE_HIGH>; /* GPIO 193, HPD */ }; + +&twl6040 { + ti,audpwron-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>; /* gpio line 141 */ +}; + +&twl6040_pins { + pinctrl-single,pins = < + OMAP5_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_141 */ + >; +};
Signature · 1 line
P?ter
PATCH 1/1 ARM: dts: Fix igepv5 audiopwon-gpio
Quoted 11 lines · Peter Ujfalusi
Quoted 10 lines · Tony Lindgren
Playing audio works on omap5-uevm, but produces an "Unhandled fault:
imprecise external abort (0x1406) at0x00000000" error on igepv5.Looks like the twl6040 audpwron GPIO pin is different for these boards. Let's fix the issue by configuring the audpwron in the board specific dts file.
Cc Agust? Fontquerni <[email protected]>Cc Eduard Gavin <[email protected]>Cc Enric Balletbo i Serra <[email protected]>
Hey, can you change the email address for this one
Thanks!
Quoted 67 lines
Quoted 27 lines
Cc Peter Ujfalusi <[email protected]>Signed-off-by Tony Lindgren <[email protected]>--- arch/arm/boot/dts/omap5-board-common.dtsi | 3 ++- arch/arm/boot/dts/omap5-igep0050.dts | 10 ++++++++++ arch/arm/boot/dts/omap5-uevm.dts | 10 ++++++++++ 3 files changed, 22 insertions(+), 1 deletion(-)arch/arm/boot/dts/omap5-board-common.dtsi +2
-1@@ -642,7 +642,8 @@ pinctrl-0 = <&twl6040_pins>; interrupts = <GIC_SPI 119 IRQ_TYPE_NONE>; /* IRQ_SYS_2N cascaded to gic */ - ti,audpwron-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>; /* gpio line 141 */ + + /* audpwron gpio defined in the board specific dts */ vio-supply = <&smps7_reg>; v2v1-supply = <&smps9_reg>;arch/arm/boot/dts/omap5-igep0050.dts +0
-0arch/arm/boot/dts/omap5-igep0050.dts line 62
Quoted 5 lines
arch/arm/boot/dts/omap5-igep0050.dts +2
-0@@ -58,3 +58,13 @@ <&gpio7 3 0>; /* 195, SDA */ }; +&twl6040 { + ti,audpwron-gpio = <&gpio5 16 GPIO_ACTIVE_HIGH>; /* gpio line 144 */BTW: how do you know that gpio144 is used as audpwron GPIO on igepv5?
arch/arm/boot/dts/omap5-igep0050.dts line 68
Quoted 6 lines
arch/arm/boot/dts/omap5-igep0050.dts +6
-0+}; + +&twl6040_pins { + pinctrl-single,pins = < + OMAP5_IOPAD(0x1c4, PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_144 */ + OMAP5_IOPAD(0x1ca, PIN_OUTPUT | MUX_MODE6) /* perslimbus2_clock.gpio5_145 */What does the gpio145 is used for?
Quoted 21 lines
arch/arm/boot/dts/omap5-igep0050.dts +2
-0+ >; +};arch/arm/boot/dts/omap5-uevm.dts +10
-0@@ -51,3 +51,13 @@ <&gpio9 1 GPIO_ACTIVE_HIGH>, /* TCA6424A P00, LS OE */ <&gpio7 1 GPIO_ACTIVE_HIGH>; /* GPIO 193, HPD */ }; + +&twl6040 { + ti,audpwron-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>; /* gpio line 141 */ +}; + +&twl6040_pins { + pinctrl-single,pins = < + OMAP5_IOPAD(0x1be, PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_141 */ + >; +};
PATCH 1/1 ARM: dts: Fix igepv5 audiopwon-gpio
Quoted 11 lines · Enric Balletbo i Serra
Quoted 8 lines · Peter Ujfalusi
Quoted 7 lines · Tony Lindgren
Playing audio works on omap5-uevm, but produces an "Unhandled fault:
imprecise external abort (0x1406) at0x00000000" error on igepv5.Looks like the twl6040 audpwron GPIO pin is different for these boards. Let's fix the issue by configuring the audpwron in the board specific dts file.
Quoted 8 lines
Quoted 3 lines
Quoted 3 lines
Cc Agust? Fontquerni <[email protected]>Cc Eduard Gavin <[email protected]>Cc Enric Balletbo i Serra <[email protected]>Hey, can you change the email address for this one
Cc Enric Balletbo i Serra <[email protected]>
OK. Maybe you guys should send a patch for MAINTAINERS entry for this board so it's easier to figure out who to send the emails to?
Regards,
Tony
PATCH 1/1 ARM: dts: Fix igepv5 audiopwon-gpio
In reply to Peter UjfalusiQuoted 41 lines · Peter Ujfalusi
Quoted 40 lines · Tony Lindgren
Playing audio works on omap5-uevm, but produces an "Unhandled fault:
imprecise external abort (0x1406) at0x00000000" error on igepv5.Looks like the twl6040 audpwron GPIO pin is different for these boards. Let's fix the issue by configuring the audpwron in the board specific dts file.
Cc Agust? Fontquerni <[email protected]>Cc Eduard Gavin <[email protected]>Cc Enric Balletbo i Serra <[email protected]>Cc Peter Ujfalusi <[email protected]>Signed-off-by Tony Lindgren <[email protected]>--- arch/arm/boot/dts/omap5-board-common.dtsi | 3 ++- arch/arm/boot/dts/omap5-igep0050.dts | 10 ++++++++++ arch/arm/boot/dts/omap5-uevm.dts | 10 ++++++++++ 3 files changed, 22 insertions(+), 1 deletion(-)arch/arm/boot/dts/omap5-board-common.dtsi +2
-1@@ -642,7 +642,8 @@ pinctrl-0 = <&twl6040_pins>; interrupts = <GIC_SPI 119 IRQ_TYPE_NONE>; /* IRQ_SYS_2N cascaded to gic */ - ti,audpwron-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>; /* gpio line 141 */ + + /* audpwron gpio defined in the board specific dts */ vio-supply = <&smps7_reg>; v2v1-supply = <&smps9_reg>;arch/arm/boot/dts/omap5-igep0050.dts +0
-0@@ -58,3 +58,13 @@ <&gpio7 3 0>; /* 195, SDA */ };
Quoted 6 lines
arch/arm/boot/dts/omap5-igep0050.dts line 62
Quoted 2 lines
arch/arm/boot/dts/omap5-igep0050.dts +2
-0+&twl6040 { + ti,audpwron-gpio = <&gpio5 16 GPIO_ACTIVE_HIGH>; /* gpio line 144 */BTW: how do you know that gpio144 is used as audpwron GPIO on igepv5?
From looking at the ISEE git tree. But it would be best for the ISEE guys
to review the patch.
Quoted 8 lines
arch/arm/boot/dts/omap5-igep0050.dts line 68
Quoted 6 lines
arch/arm/boot/dts/omap5-igep0050.dts +6
-0+}; + +&twl6040_pins { + pinctrl-single,pins = < + OMAP5_IOPAD(0x1c4, PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_144 */ + OMAP5_IOPAD(0x1ca, PIN_OUTPUT | MUX_MODE6) /* perslimbus2_clock.gpio5_145 */What does the gpio145 is used for?
No idea without seeing the schematics, also from ISEE git tree so should be reviewed.
Regards,
Tony