dmaengine: add Qualcomm Technologies HIDMA driver
Subsystems (4)
v18 cover dmaengine: add Qualcomm Technologies HIDMA driver
The Qualcomm Technologies HIDMA device has been designed to support virtualization technology. The driver has been divided into two to follow the hardware design.
1. HIDMA Management driver
2. HIDMA Channel driver
Each HIDMA HW consists of multiple channels. These channels share some set of common parameters. These parameters are initialized by the management driver during power up. Same management driver is used for monitoring the execution of the channels. Management driver can change the performance behavior dynamically such as bandwidth allocation and prioritization in the future.
The management driver is executed in host context and is the main management entity for all channels provided by the device.
------------------------
What's new
------------------------
- Get rid of hidma_ll_resume function
- Rename hidma_ll_pause to hidma_ll_disable
- Remove tx_status_list and attach the err_code and err_info to the TRE
- Create a hidma_handle_tre_completion function to make error path and success path common.
- More style corrections
Sinan Kaya (3):
dmaengine: qcom_hidma: implement lower level hardware interface
dmaengine: qcom_hidma: add debugfs hooks
dmaengine: qcom_hidma: add support for object hierarchy
Documentation/ABI/testing/sysfs-platform-hidma | 9 + drivers/dma/qcom/Makefile | 2 + drivers/dma/qcom/hidma.c | 52 +- drivers/dma/qcom/hidma.h | 40 +- drivers/dma/qcom/hidma_dbg.c | 217 ++++++ drivers/dma/qcom/hidma_ll.c | 872 +++++++++++++++++++++++++ drivers/dma/qcom/hidma_mgmt.c | 113 +++- 7 files changed, 1274 insertions(+), 31 deletions(-) create mode 100644 Documentation/ABI/testing/sysfs-platform-hidma create mode 100644 drivers/dma/qcom/hidma_dbg.c create mode 100644 drivers/dma/qcom/hidma_ll.c
Signature · 1 line
1.8.2.1
PATCH v18 1/3 dmaengine: qcom_hidma: implement lower level hardware interface
This patch implements the hardware hooks for the HIDMA channel driver.
The main functions of interest are:
- hidma_ll_init
- hidma_ll_request
- hidma_ll_queue_request
- hidma_ll_hw_start
OS layer calls the hidma_ll_init function during probe to set up the hardware. At this moment, the number of supported descriptors are also given. On each request, a descriptor is allocated from the free pool and filled in with the transfer parameters. Multiple requests can be queued into the hardware via the OS interface. When client is ready for requests to be executed, start method is called.
Completions are delivered via callbacks via tasklet.
--- drivers/dma/qcom/Makefile | 2 + drivers/dma/qcom/hidma.c | 8 +- drivers/dma/qcom/hidma.h | 38 +- drivers/dma/qcom/hidma_ll.c | 872 ++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 895 insertions(+), 25 deletions(-) create mode 100644 drivers/dma/qcom/hidma_ll.c
drivers/dma/qcom/Makefile +2 -0
@@ -1,3 +1,5 @@ obj-$(CONFIG_QCOM_BAM_DMA) += bam_dma.o obj-$(CONFIG_QCOM_HIDMA_MGMT) += hdma_mgmt.o hdma_mgmt-objs := hidma_mgmt.o hidma_mgmt_sys.o +obj-$(CONFIG_QCOM_HIDMA) += hdma.o +hdma-objs := hidma_ll.o hidma.o
drivers/dma/qcom/hidma.c +4 -4
@@ -423,7 +423,7 @@ static int hidma_terminate_channel(struct dma_chan *chan)spin_unlock_irqrestore (&mchan->lock, irqflags);/* this suspends the existing transfer */ - rc =hidma_ll_pause (dmadev->lldev); + rc =hidma_ll_disable (dmadev->lldev);if (rc) {dev_err (dmadev->ddev.dev,"channel did not pause\n" ); goto out;
@@ -446,7 +446,7 @@ static int hidma_terminate_channel(struct dma_chan *chan)list_move (&mdesc->node, &mchan->free); } - rc =hidma_ll_resume (dmadev->lldev); + rc =hidma_ll_enable (dmadev->lldev); out:pm_runtime_mark_last_busy (dmadev->ddev.dev);pm_runtime_put_autosuspend (dmadev->ddev.dev);
@@ -507,7 +507,7 @@ static int hidma_pause(struct dma_chan *chan) dmadev =to_hidma_dev (mchan->chan.device);if (!mchan->paused) {pm_runtime_get_sync (dmadev->ddev.dev); -if (hidma_ll_pause (dmadev->lldev)) +if (hidma_ll_disable (dmadev->lldev))dev_warn (dmadev->ddev.dev,"channel did not stop\n" ); mchan->paused = true;pm_runtime_mark_last_busy (dmadev->ddev.dev);
@@ -526,7 +526,7 @@ static int hidma_resume(struct dma_chan *chan) dmadev =to_hidma_dev (mchan->chan.device);if (mchan->paused) {pm_runtime_get_sync (dmadev->ddev.dev); - rc =hidma_ll_resume (dmadev->lldev); + rc =hidma_ll_enable (dmadev->lldev);if (!rc) mchan->paused = false;else
drivers/dma/qcom/hidma.h +17 -21
@@ -1,7 +1,7 @@/* * Qualcomm Technologies HIDMA data structures * -* Copyright (c) 2014, The Linux Foundation. All rights reserved. +* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and
@@ -20,32 +20,29 @@#include <linux/interrupt.h> #include <linux/dmaengine.h> -#define TRE_SIZE 32/* each TRE is 32 bytes */ -#define TRE_CFG_IDX 0 -#define TRE_LEN_IDX 1 -#define TRE_SRC_LOW_IDX 2 -#define TRE_SRC_HI_IDX 3 -#define TRE_DEST_LOW_IDX 4 -#define TRE_DEST_HI_IDX 5 - -struct hidma_tx_status { -u8 err_info;/* error record in this transfer */ -u8 err_code;/* completion code */ -}; +#define HIDMA_TRE_SIZE 32/* each TRE is 32 bytes */ +#define HIDMA_TRE_CFG_IDX 0 +#define HIDMA_TRE_LEN_IDX 1 +#define HIDMA_TRE_SRC_LOW_IDX 2 +#define HIDMA_TRE_SRC_HI_IDX 3 +#define HIDMA_TRE_DEST_LOW_IDX 4 +#define HIDMA_TRE_DEST_HI_IDX 5struct hidma_tre {atomic_t allocated;/* if this channel is allocated */ bool queued;/* flag whether this is pending */ u16 status;/* status */ -u32 chidx;/* index of the tre */ +u32 idx;/* index of the tre */ u32 dma_sig;/* signature of the tre */ const char *dev_name;/* name of the device */ void (*callback)(void *data);/* requester callback */ void *data;/* Data associated with this channel*/ struct hidma_lldev *lldev;/* lldma device pointer */ -u32 tre_local[TRE_SIZE /sizeof (u32) +1 ];/* TRE local copy */ +u32 tre_local[HIDMA_TRE_SIZE /sizeof (u32) +1 ];/* TRE local copy */ u32 tre_index;/* the offset where this was written*/ u32 int_flags;/* interrupt flags */ +u8 err_info;/* error record in this transfer */ +u8 err_code;/* completion code */ };struct hidma_lldev {
@@ -61,22 +58,21 @@ struct hidma_lldev {void __iomem *evca;/* Event Channel address */ struct hidma_tre **pending_tre_list;/* Pointers to pending TREs */ -struct hidma_tx_status - *tx_status_list;/* Pointers to pending TREs status*/ s32 pending_tre_count;/* Number of TREs pending */ void *tre_ring;/* TRE ring */ -dma_addr_t tre_ring_handle;/* TRE ring to be shared with HW */ +dma_addr_t tre_dma;/* TRE ring to be shared with HW */ u32 tre_ring_size;/* Byte size of the ring */ u32 tre_processed_off;/* last processed TRE */ void *evre_ring;/* EVRE ring */ -dma_addr_t evre_ring_handle;/* EVRE ring to be shared with HW */ +dma_addr_t evre_dma;/* EVRE ring to be shared with HW */ u32 evre_ring_size;/* Byte size of the ring */ u32 evre_processed_off;/* last processed EVRE */ u32 tre_write_offset;/* TRE write location */ struct tasklet_struct task;/* task delivering notifications */ +struct tasklet_struct rst_task;/* task to reset HW */ DECLARE_KFIFO_PTR (handoff_fifo, struct hidma_tre *); /* pending TREs FIFO */ };
@@ -145,8 +141,8 @@ enum dma_status hidma_ll_status(struct hidma_lldev *llhndl, u32 tre_ch);bool hidma_ll_isenabled (struct hidma_lldev *llhndl);void hidma_ll_queue_request (struct hidma_lldev *llhndl,u32 tre_ch);void hidma_ll_start (struct hidma_lldev *llhndl); -int hidma_ll_pause (struct hidma_lldev *llhndl); -int hidma_ll_resume (struct hidma_lldev *llhndl); +int hidma_ll_disable (struct hidma_lldev *lldev); +int hidma_ll_enable (struct hidma_lldev *llhndl);void hidma_ll_set_transfer_params (struct hidma_lldev *llhndl,u32 tre_ch,dma_addr_t src,dma_addr_t dest,u32 len,u32 flags);int hidma_ll_setup (struct hidma_lldev *lldev);
drivers/dma/qcom/hidma_ll.c new file +872 -0
872 lines not on this page · raw message
Signature · 1 line
1.8.2.1
PATCH v18 2/3 dmaengine: qcom_hidma: add debugfs hooks
In reply to Sinan KayaAdd debugfs hooks for debugging the execution behavior of the DMA channel. The debugfs hooks get initialized by the probe function and uninitialized by the remove function.
A stats file is created in debugfs. The stats file will show the information about each HIDMA channel as well as each asynchronous job queued and completed at a given time.
--- drivers/dma/qcom/Makefile | 2 +- drivers/dma/qcom/hidma.c | 5 +- drivers/dma/qcom/hidma.h | 2 + drivers/dma/qcom/hidma_dbg.c | 217 +++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 224 insertions(+), 2 deletions(-) create mode 100644 drivers/dma/qcom/hidma_dbg.c
drivers/dma/qcom/Makefile +1 -1
@@ -2,4 +2,4 @@ obj-$(CONFIG_QCOM_BAM_DMA) += bam_dma.o obj-$(CONFIG_QCOM_HIDMA_MGMT) += hdma_mgmt.o hdma_mgmt-objs := hidma_mgmt.o hidma_mgmt_sys.o obj-$(CONFIG_QCOM_HIDMA) += hdma.o -hdma-objs := hidma_ll.o hidma.o +hdma-objs := hidma_ll.o hidma.o hidma_dbg.o
drivers/dma/qcom/hidma.c +4 -1
@@ -1,7 +1,7 @@/* * Qualcomm Technologies HIDMA DMA engine interface * -* Copyright (c) 2015, The Linux Foundation. All rights reserved. +* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and
@@ -681,6 +681,7 @@ static int hidma_probe(struct platform_device *pdev) dmadev->irq = chirq;tasklet_init (&dmadev->task, hidma_issue_task, (unsigned long )dmadev); +hidma_debug_init (dmadev);dev_info (&pdev->dev,"HI-DMA engine driver registration complete\n" );platform_set_drvdata (pdev, dmadev);pm_runtime_mark_last_busy (dmadev->ddev.dev);
@@ -689,6 +690,7 @@ static int hidma_probe(struct platform_device *pdev)return 0 ; uninit: +hidma_debug_uninit (dmadev);hidma_ll_uninit (dmadev->lldev); dmafree:if (dmadev)
@@ -706,6 +708,7 @@ static int hidma_remove(struct platform_device *pdev)pm_runtime_get_sync (dmadev->ddev.dev);dma_async_device_unregister (&dmadev->ddev);devm_free_irq (dmadev->ddev.dev, dmadev->irq, dmadev->lldev); +hidma_debug_uninit (dmadev);hidma_ll_uninit (dmadev->lldev);hidma_free (dmadev);
drivers/dma/qcom/hidma.h +2 -0
@@ -153,4 +153,6 @@ int hidma_ll_uninit(struct hidma_lldev *llhndl);irqreturn_t hidma_ll_inthandler (int irq,void *arg);void hidma_cleanup_pending_tre (struct hidma_lldev *llhndl,u8 err_info,u8 err_code); +int hidma_debug_init (struct hidma_dev *dmadev); +void hidma_debug_uninit (struct hidma_dev *dmadev);#endif
drivers/dma/qcom/hidma_dbg.c new file +217 -0
217 lines not on this page · raw message
Signature · 1 line
1.8.2.1
PATCH v18 3/3 dmaengine: qcom_hidma: add support for object hierarchy
In reply to Sinan KayaIn order to create a relationship model between the channels and the management object, we are adding support for object hierarchy to the drivers. This patch simplifies the userspace application development. We will not have to traverse different firmware paths based on device tree or ACPI based kernels.
No matter what flavor of kernel is used, objects will be represented as platform devices.
The new layout is as follows:
hidmam_10: hidma-mgmt@0x5A000000 {
compatible = "qcom,hidma-mgmt-1.0";
...
hidma_10: hidma@0x5a010000 {
compatible = "qcom,hidma-1.0";
...
}
}The hidma_mgmt_init detects each instance of the hidma-mgmt-1.0 objects in device tree and calls into the channel driver to create platform devices for each child of the management object.
--- Documentation/ABI/testing/sysfs-platform-hidma | 9 ++ drivers/dma/qcom/hidma.c | 39 ++++++++- drivers/dma/qcom/hidma_mgmt.c | 113 ++++++++++++++++++++++++- 3 files changed, 156 insertions(+), 5 deletions(-) create mode 100644 Documentation/ABI/testing/sysfs-platform-hidma
Documentation/ABI/testing/sysfs-platform-hidma new file +9 -0
@@ -0,0 +1,9 @@ +What: /sys/devices/platform/hidma-*/chid + /sys/devices/platform/QCOM8061:*/chid +Date: Dec 2015 +KernelVersion: 4.4 +Contact: "Sinan Kaya <[email protected]>" +Description: + Contains the ID of the channel within the HIDMA instance. + It is used to associate a given HIDMA channel with the + priority and weight calls in the management interface.
drivers/dma/qcom/hidma.c +38 -1
@@ -549,6 +549,43 @@ static irqreturn_t hidma_chirq_handler(int chirq, void *arg)return hidma_ll_inthandler (chirq, lldev); } +static ssize_t hidma_show_values (struct device *dev, +struct device_attribute *attr,char *buf) +{ +struct platform_device *pdev =to_platform_device (dev); +struct hidma_dev *mdev =platform_get_drvdata (pdev); + + buf[0 ] =0 ; + +if (strcmp (attr->attr.name,"chid" ) ==0 ) +sprintf (buf,"%d\n" , mdev->chidx); + +return strlen (buf); +} + +static int hidma_create_sysfs_entry (struct hidma_dev *dev,char *name, +int mode) +{ +struct device_attribute *attrs; +char *name_copy; + + attrs =devm_kmalloc (dev->ddev.dev,sizeof (struct device_attribute ), +GFP_KERNEL ); +if (!attrs) +return -ENOMEM ; + + name_copy =devm_kstrdup (dev->ddev.dev, name,GFP_KERNEL ); +if (!name_copy) +return -ENOMEM ; + + attrs->attr.name = name_copy; + attrs->attr.mode = mode; + attrs->show = hidma_show_values; +sysfs_attr_init (&attrs->attr); + +return device_create_file (dev->ddev.dev, attrs); +} +static int hidma_probe (struct platform_device *pdev) {struct hidma_dev *dmadev;
@@ -682,6 +719,7 @@ static int hidma_probe(struct platform_device *pdev) dmadev->irq = chirq;tasklet_init (&dmadev->task, hidma_issue_task, (unsigned long )dmadev);hidma_debug_init (dmadev); +hidma_create_sysfs_entry (dmadev,"chid" ,S_IRUGO );dev_info (&pdev->dev,"HI-DMA engine driver registration complete\n" );platform_set_drvdata (pdev, dmadev);pm_runtime_mark_last_busy (dmadev->ddev.dev);
@@ -730,7 +768,6 @@ static const struct of_device_id hidma_match[] = { {.compatible = "qcom,hidma-1.0",}, {}, }; -MODULE_DEVICE_TABLE (of, hidma_match);static struct platform_driver hidma_driver = {
drivers/dma/qcom/hidma_mgmt.c +109 -4
134 lines not on this page · raw message
Signature · 1 line
1.8.2.1
Vinod Koul
Appliedv18 cover dmaengine: add Qualcomm Technologies HIDMA driver
In reply to Sinan KayaQuoted 19 lines · Sinan Kaya
The Qualcomm Technologies HIDMA device has been designed to support virtualization technology. The driver has been divided into two to follow the hardware design.
1. HIDMA Management driver
2. HIDMA Channel driverEach HIDMA HW consists of multiple channels. These channels share some set of common parameters. These parameters are initialized by the management driver during power up. Same management driver is used for monitoring the execution of the channels. Management driver can change the performance behavior dynamically such as bandwidth allocation and prioritization in the future.
The management driver is executed in host context and is the main management entity for all channels provided by the device.
Quoted 9 lines
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What's new
------------------------
- Get rid ofhidma_ll_resumefunction
- Renamehidma_ll_pausetohidma_ll_disable
- Removetx_status_listand attach theerr_codeanderr_infoto the TRE
- Create ahidma_handle_tre_completionfunction to make error path and success path common.
- More style corrections
Applied, thanks
Signature · 1 line
~Vinod