MIPS: Loongson1C: Add board support
Subsystems (2)
PATCH 3/4 MIPS: Loongson1C: Add board support
Adds basic platform devices for Loongson1C, including serial port and ethernet.
Signed-off-by Yang Ling <[email protected]>
--- arch/mips/Kconfig | 13 +++++ arch/mips/include/asm/mach-loongson32/irq.h | 41 ++++++++++++++- arch/mips/include/asm/mach-loongson32/loongson1.h | 5 ++ arch/mips/include/asm/mach-loongson32/regs-clk.h | 34 +++++++++++++ arch/mips/include/asm/mach-loongson32/regs-mux.h | 61 +++++++++++++++++++++++ arch/mips/loongson32/Kconfig | 15 ++++++ arch/mips/loongson32/Makefile | 6 +++ arch/mips/loongson32/Platform | 1 + arch/mips/loongson32/common/irq.c | 55 ++++++++++++++++++-- arch/mips/loongson32/common/platform.c | 19 +++++++ arch/mips/loongson32/common/setup.c | 4 ++ arch/mips/loongson32/ls1c/Makefile | 5 ++ arch/mips/loongson32/ls1c/board.c | 28 +++++++++++ 13 files changed, 283 insertions(+), 4 deletions(-) create mode 100644 arch/mips/loongson32/ls1c/Makefile create mode 100644 arch/mips/loongson32/ls1c/board.c
arch/mips/Kconfig +13 -0
@@ -1384,6 +1384,16 @@ config CPU_LOONGSON1B The Loongson 1B is a 32-bit SoC, which implements the MIPS32 release 2 instruction set. +config CPU_LOONGSON1C + bool "Loongson 1C" + depends on SYS_HAS_CPU_LOONGSON1C + select CPU_LOONGSON1 + select ARCH_WANT_OPTIONAL_GPIOLIB + select LEDS_GPIO_REGISTER + help + The Loongson 1C is a 32-bit SoC, which implements the MIPS32 + release 2 instruction set. + config CPU_MIPS32_R1 bool "MIPS32 Release 1" depends on SYS_HAS_CPU_MIPS32_R1
@@ -1827,6 +1837,9 @@ config SYS_HAS_CPU_LOONGSON2F config SYS_HAS_CPU_LOONGSON1B bool +config SYS_HAS_CPU_LOONGSON1C + bool + config SYS_HAS_CPU_MIPS32_R1 bool
arch/mips/include/asm/mach-loongson32/irq.h +40 -1
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arch/mips/include/asm/mach-loongson32/loongson1.h +5 -0
@@ -12,7 +12,11 @@#ifndef __ASM_MACH_LOONGSON32_LOONGSON1_H#define __ASM_MACH_LOONGSON32_LOONGSON1_H +#if defined(CONFIG_LOONGSON1_LS1B )#define DEFAULT_MEMSIZE 256/* If no memsize provided */ +#elif defined(CONFIG_LOONGSON1_LS1C ) +#define DEFAULT_MEMSIZE 32 +#endif /* Loongson 1 Register Bases */ #define LS1X_MUX_BASE 0x1fd00420
@@ -20,6 +24,7 @@#define LS1X_GPIO0_BASE 0x1fd010c0#define LS1X_GPIO1_BASE 0x1fd010c4#define LS1X_DMAC_BASE 0x1fd01160 +#define LS1X_CBUS_BASE 0x1fd011c0#define LS1X_EHCI_BASE 0x1fe00000#define LS1X_OHCI_BASE 0x1fe08000#define LS1X_GMAC0_BASE 0x1fe10000
arch/mips/include/asm/mach-loongson32/regs-clk.h +34 -0
@@ -18,6 +18,7 @@#define LS1X_CLK_PLL_FREQ LS1X_CLK_REG(0x0)#define LS1X_CLK_PLL_DIV LS1X_CLK_REG(0x4) +#if defined(CONFIG_LOONGSON1_LS1B )/* Clock PLL Divisor Register Bits */ #define DIV_DC_EN BIT(31)#define DIV_DC_RST BIT(30)
@@ -48,4 +49,37 @@#define BYPASS_DDR_WIDTH 1#define BYPASS_CPU_WIDTH 1 +#elif defined(CONFIG_LOONGSON1_LS1C ) +/* PLL/SDRAM Frequency configuration register Bits */ +#define PLL_VALID BIT(31) +#define FRAC_N GENMASK(23, 16) +#define RST_TIME GENMASK(3, 2) +#define SDRAM_DIV GENMASK(1, 0) + +/* CPU/CAMERA/DC Frequency configuration register Bits */ +#define DIV_DC_EN BIT(31) +#define DIV_DC GENMASK(30, 24) +#define DIV_CAM_EN BIT(23) +#define DIV_CAM GENMASK(22, 16) +#define DIV_CPU_EN BIT(15) +#define DIV_CPU GENMASK(14, 8) +#define DIV_DC_SEL_EN BIT(5) +#define DIV_DC_SEL BIT(4) +#define DIV_CAM_SEL_EN BIT(3) +#define DIV_CAM_SEL BIT(2) +#define DIV_CPU_SEL_EN BIT(1) +#define DIV_CPU_SEL BIT(0) + +#define DIV_DC_SHIFT 24 +#define DIV_CAM_SHIFT 16 +#define DIV_CPU_SHIFT 8 +#define DIV_DDR_SHIFT 0 + +#define DIV_DC_WIDTH 7 +#define DIV_CAM_WIDTH 7 +#define DIV_CPU_WIDTH 7 +#define DIV_DDR_WIDTH 2 + +#endif +#endif /* __ASM_MACH_LOONGSON32_REGS_CLK_H */
arch/mips/include/asm/mach-loongson32/regs-mux.h +61 -0
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arch/mips/loongson32/Kconfig +15 -0
@@ -19,6 +19,21 @@ config LOONGSON1_LS1B select USE_GENERIC_EARLY_PRINTK_8250 select COMMON_CLK +config LOONGSON1_LS1C + bool "Loongson LS1C board" + select CEVT_R4K if !MIPS_EXTERNAL_TIMER + select CSRC_R4K if !MIPS_EXTERNAL_TIMER + select SYS_HAS_CPU_LOONGSON1C + select DMA_NONCOHERENT + select BOOT_ELF32 + select IRQ_MIPS_CPU + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_SUPPORTS_HIGHMEM + select SYS_SUPPORTS_MIPS16 + select SYS_HAS_EARLY_PRINTK + select USE_GENERIC_EARLY_PRINTK_8250 + select COMMON_CLK endchoice menuconfig CEVT_CSRC_LS1X
arch/mips/loongson32/Makefile +6 -0
@@ -9,3 +9,9 @@ obj-$(CONFIG_MACH_LOONGSON32) += common/ # obj-$(CONFIG_LOONGSON1_LS1B) += ls1b/ + +# +# Loongson LS1C board +# + +obj-$(CONFIG_LOONGSON1_LS1C) += ls1c/
arch/mips/loongson32/Platform +1 -0
@@ -5,3 +5,4 @@ cflags-$(CONFIG_CPU_LOONGSON1) += \ platform-$(CONFIG_MACH_LOONGSON32) += loongson32/ cflags-$(CONFIG_MACH_LOONGSON32) += -I$(srctree)/arch/mips/include/asm/mach-loongson32 load-$(CONFIG_LOONGSON1_LS1B) += 0xffffffff80100000 +load-$(CONFIG_LOONGSON1_LS1C) += 0xffffffff80100000
arch/mips/loongson32/common/irq.c +52 -3
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arch/mips/loongson32/common/platform.c +19 -0
@@ -17,6 +17,7 @@#include <linux/stmmac.h> #include <linux/usb/ehci_pdriver.h> +#include <platform.h> #include <loongson1.h> #include <cpufreq.h> #include <dma.h>
@@ -132,6 +133,7 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv) val =__raw_readl (LS1X_MUX_CTRL1 ); +#if defined(CONFIG_LOONGSON1_LS1B ) plat_dat =dev_get_platdata (&pdev->dev);if (plat_dat->bus_id) { __raw_writel(__raw_readl(LS1X_MUX_CTRL0) | GMAC1_USE_UART1 |
@@ -165,6 +167,17 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv) val &= ~GMAC0_SHUT; }__raw_writel (val,LS1X_MUX_CTRL1 ); +#elif defined(CONFIG_LOONGSON1_LS1C) + plat_dat =dev_get_platdata (&pdev->dev); + + val &= ~PHY_INTF_SELI ; +if (plat_dat->interface ==PHY_INTERFACE_MODE_RMII ) + val |=0x4 <<PHY_INTF_SELI_SHIFT ; +__raw_writel (val,LS1X_MUX_CTRL1 ); + + val =__raw_readl (LS1X_MUX_CTRL0 ); +__raw_writel (val & (~GMAC_SHUT ),LS1X_MUX_CTRL0 ); +#endif return 0 ; }
@@ -172,7 +185,11 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)static struct plat_stmmacenet_data ls1x_eth0_pdata = { .bus_id =0 , .phy_addr =-1 , +#if defined(CONFIG_LOONGSON1_LS1B) .interface =PHY_INTERFACE_MODE_MII , +#elif defined(CONFIG_LOONGSON1_LS1C) + .interface =PHY_INTERFACE_MODE_RMII , +#endif .mdio_bus_data = &ls1x_mdio_bus_data, .dma_cfg = &ls1x_eth_dma_cfg, .has_gmac =1 ,
@@ -203,6 +220,7 @@ struct platform_device ls1x_eth0_pdev = { }, }; +#ifdef CONFIG_LOONGSON1_LS1B static struct plat_stmmacenet_data ls1x_eth1_pdata = { .bus_id =1 , .phy_addr = -1,
@@ -236,6 +254,7 @@ struct platform_device ls1x_eth1_pdev = { .platform_data = &ls1x_eth1_pdata, }, }; +#endif /* CONFIG_LOONGSON1_LS1B */ /* GPIO */ static struct resource ls1x_gpio0_resources[] = {
arch/mips/loongson32/common/setup.c +4 -0
@@ -22,7 +22,11 @@ const char *get_system_type(void)switch (processor_id &PRID_REV_MASK ) {case PRID_REV_LOONGSON1B : +#if defined(CONFIG_LOONGSON1_LS1B )return "LOONGSON LS1B" ; +#elif defined(CONFIG_LOONGSON1_LS1C ) +return "LOONGSON LS1C" ; +#endif default :return "LOONGSON (unknown)" ; }
arch/mips/loongson32/ls1c/Makefile new file +5 -0
@@ -0,0 +1,5 @@ +# +# Makefile for loongson1B based machines. +# + +obj-y += board.o
arch/mips/loongson32/ls1c/board.c new file +28 -0
@@ -0,0 +1,28 @@ +/* +* Copyright (c) 2016 Ling Yang <[email protected]> +* +* This program is free software; you can redistribute it and/or modify it +* under the terms of the GNU General Public License as published by the +* Free Software Foundation; either version 2 of the License, or (at your +* option) any later version. +*/ + +#include <platform.h> + +static struct platform_device *ls1c_platform_devices[]__initdata = { + &ls1x_uart_pdev, + &ls1x_eth0_pdev, +}; + +static int __init ls1c_platform_init (void ) +{ +int err; + +ls1x_serial_set_uartclk (&ls1x_uart_pdev); + + err =platform_add_devices (ls1c_platform_devices, +ARRAY_SIZE (ls1c_platform_devices)); +return err; +} + +arch_initcall (ls1c_platform_init);
Signature · 5 lines
1.9.1 Rebase changes base on the following patch. https://patchwork.linux-mips.org/patch/13039/