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Between 2015.10 and 2016.01, SPI flash changed erase size, and saveenv stopped working

U-Boot Pavel Machek 3 participants 11 messages May 29, 2016 – Jun 4, 2016 Memory technology devices (MTD)

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Pavel Machek

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#0 lore raw

Hi!

On board with Altera Cyclone 5:

=> version

U-Boot 2016.01-05658-g81689ec (May 29 2016 - 22:25:45 +0200) arm-linux-gnueabi-gcc (GCC) 4.8.2
GNU ld (GNU Binutils) 2.24
Saving Environment to SPI Flash...
spi_flash_std_probe: slave=0bf367d0, cs=0
SF: Detected N25Q512 with page size 256 Bytes, erase size 64 KiB, total 64 MiB
offset 0x40000 is protected and cannot be erased

...

=> version

U-Boot 2015.10-04078-g3b6d086 (May 29 2016 - 22:33:36 +0200) arm-linux-gnueabi-gcc (GCC) 4.8.2
GNU ld (GNU Binutils) 2.24
SF: Detected N25Q512 with page size 256 Bytes, erase size 4 KiB, total 64 MiB

Does anyone else see the problem? Any ideas?

Best regards,
Pavel

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#1 lore raw

Hi Pavel,

Quoted 19 lines · Pavel Machek

Hi!

On board with Altera Cyclone 5:

=> version

U-Boot 2016.01-05658-g81689ec (May 29 2016 - 22:25:45 +0200) arm-linux-gnueabi-gcc (GCC) 4.8.2
GNU ld (GNU Binutils) 2.24
Saving Environment to SPI Flash...
spi_flash_std_probe: slave=0bf367d0, cs=0
SF: Detected N25Q512 with page size 256 Bytes, erase size 64 KiB, total 64 MiB
offset 0x40000 is protected and cannot be erased

...

=> version

Quoted 8 lines

U-Boot 2015.10-04078-g3b6d086 (May 29 2016 - 22:33:36 +0200) arm-linux-gnueabi-gcc (GCC) 4.8.2
GNU ld (GNU Binutils) 2.24
SF: Detected N25Q512 with page size 256 Bytes, erase size 4 KiB, total 64 MiB

Does anyone else see the problem? Any ideas?

I think you have run into the S-bit / cache issue with version the 2016 U-Boot version. This was fixed with these patches:

mtd: cqspi: Simplify indirect write code
mtd: cqspi: Simplify indirect read code

Please use the v2016.05 release.

Thanks,
Stefan

author
#2 lore raw
Quoted 31 lines · Stefan Roese

Hi Pavel,

Quoted 19 lines · Pavel Machek

Hi!

On board with Altera Cyclone 5:

=> version

U-Boot 2016.01-05658-g81689ec (May 29 2016 - 22:25:45 +0200) arm-linux-gnueabi-gcc (GCC) 4.8.2
GNU ld (GNU Binutils) 2.24
Saving Environment to SPI Flash...
spi_flash_std_probe: slave=0bf367d0, cs=0
SF: Detected N25Q512 with page size 256 Bytes, erase size 64 KiB, total 64 MiB
offset 0x40000 is protected and cannot be erased

...

=> version

Quoted 8 lines

U-Boot 2015.10-04078-g3b6d086 (May 29 2016 - 22:33:36 +0200) arm-linux-gnueabi-gcc (GCC) 4.8.2
GNU ld (GNU Binutils) 2.24
SF: Detected N25Q512 with page size 256 Bytes, erase size 4 KiB, total 64 MiB

Does anyone else see the problem? Any ideas?

Quoted 7 lines

I think you have run into the S-bit / cache issue with version the 2016 U-Boot version. This was fixed with these patches:

mtd: cqspi: Simplify indirect write code
mtd: cqspi: Simplify indirect read code

Please use the v2016.05 release.

Sorry if I was unclear, but it is also broken in v2016.03, v2016.05 and v2016.07. I hoped narowing down range where it broke would help.

Best regards,
Pavel

Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
author
#3 lore raw
In reply to Stefan Roese
Quoted 30 lines · Stefan Roese

Hi Pavel,

Quoted 27 lines · Pavel Machek

Hi!

On board with Altera Cyclone 5:

=> version

U-Boot 2016.01-05658-g81689ec (May 29 2016 - 22:25:45 +0200) arm-linux-gnueabi-gcc (GCC) 4.8.2
GNU ld (GNU Binutils) 2.24
Saving Environment to SPI Flash...
spi_flash_std_probe: slave=0bf367d0, cs=0
SF: Detected N25Q512 with page size 256 Bytes, erase size 64 KiB, total 64 MiB
offset 0x40000 is protected and cannot be erased

...

=> version

U-Boot 2015.10-04078-g3b6d086 (May 29 2016 - 22:33:36 +0200) arm-linux-gnueabi-gcc (GCC) 4.8.2
GNU ld (GNU Binutils) 2.24
SF: Detected N25Q512 with page size 256 Bytes, erase size 4 KiB, total 64 MiB

Does anyone else see the problem? Any ideas?

Commit c3c016cf75360c2a0d0a065b64b438aaf7720576 is a part of the problem:

offset 0x40000 is protected and cannot be erased
=> sf help
No SPI flash selected. Please run `sf probe'
=> sf probe
...
SF: Detected N25Q512 with page size 256 Bytes, erase size 4 KiB, total 64 MiB
cadence_spi_set_speed: speed=1000000
=> sf protect unlock 0x40000 0x20000
cadence_spi_xfer: len=1 [bytes]
cadence_spi_xfer: len=1 [bytes]
=> saveenv
Saving Environment to SPI Flash...

Best regards,
Pavel

Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
author
#4 lore raw

Hi!

Quoted 15 lines

Commit c3c016cf75360c2a0d0a065b64b438aaf7720576 is a part of the problem:

offset 0x40000 is protected and cannot be erased
=> sf help
No SPI flash selected. Please run `sf probe'
=> sf probe
...
SF: Detected N25Q512 with page size 256 Bytes, erase size 4 KiB, total 64 MiB
cadence_spi_set_speed: speed=1000000
=> sf protect unlock 0x40000 0x20000
cadence_spi_xfer: len=1 [bytes]
cadence_spi_xfer: len=1 [bytes]
=> saveenv
Saving Environment to SPI Flash...

Disabling flash locking like this seems to do the trick:

drivers/mtd/spi/spi_flash.c +3 -1
index 907067b..b75e66a 100644
@@ -1131,14 +1131,16 @@ int spi_flash_scan(struct spi_flash *flash)
 
 	/* lock hooks are flash specific - assign them based on idcode0 */
 	switch (idcode[0]) {
+#if 0
 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
 	case SPI_FLASH_CFI_MFR_STMICRO:
 	case SPI_FLASH_CFI_MFR_SST:
 		flash->flash_lock = stm_lock;
 		flash->flash_unlock = stm_unlock;
 		flash->flash_is_locked = stm_is_locked;
-#endif
 		break;
+#endif
+#endif
 	default:
 		debug("SF: Lock ops not supported for %02x flash\n", idcode[0]);
 	}

and if someone is watching, the #endif should be moved. switch (...) { break; } is strange kind of C.

Best regards,
Pavel

Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
#5 lore raw
In reply to Pavel Machek
Quoted 15 lines · Pavel Machek

Commit c3c016cf75360c2a0d0a065b64b438aaf7720576 is a part of the problem:

offset 0x40000 is protected and cannot be erased
=> sf help
No SPI flash selected. Please run `sf probe'
=> sf probe
...
SF: Detected N25Q512 with page size 256 Bytes, erase size 4 KiB, total 64 MiB
cadence_spi_set_speed: speed=1000000
=> sf protect unlock 0x40000 0x20000
cadence_spi_xfer: len=1 [bytes]
cadence_spi_xfer: len=1 [bytes]
=> saveenv
Saving Environment to SPI Flash...

Does this quick hack help? I am wondering if yous SPI flash power up with the SR field protected:

drivers/mtd/spi/spi_flash.c +1 -5
@@ -1021,11 +1021,7 @@ int spi_flash_scan(struct spi_flash *flash)
                return -EPROTONOSUPPORT;
        }
 
-       /* Flash powers up read-only, so clear BP# bits */
-       if (idcode[0] == SPI_FLASH_CFI_MFR_ATMEL ||
-           idcode[0] == SPI_FLASH_CFI_MFR_MACRONIX ||
-           idcode[0] == SPI_FLASH_CFI_MFR_SST)
-               write_sr(flash, 0);
+       write_sr(flash, 0);
 
        /* Assign spi data */
        flash->name = params->name;
author
#6 lore raw
Quoted 18 lines · Fabio Estevam
Quoted 15 lines · Pavel Machek

Commit c3c016cf75360c2a0d0a065b64b438aaf7720576 is a part of the problem:

offset 0x40000 is protected and cannot be erased
=> sf help
No SPI flash selected. Please run `sf probe'
=> sf probe
...
SF: Detected N25Q512 with page size 256 Bytes, erase size 4 KiB, total 64 MiB
cadence_spi_set_speed: speed=1000000
=> sf protect unlock 0x40000 0x20000
cadence_spi_xfer: len=1 [bytes]
cadence_spi_xfer: len=1 [bytes]
=> saveenv
Saving Environment to SPI Flash...

Quoted 2 lines

Does this quick hack help? I am wondering if yous SPI flash power up with the SR field protected:

Yes, it helps. Thanks! I can now write to the enviornment.

But it still does not look like locking is working quite correctly:

Best regards,
Pavel

=> sf protect lock 0xe0000 0x10000
=> saveenv
Saving Environment to SPI Flash...
read_ops: at e1000, len f000
read: 61440 remains
read: 28672 remains
Erasing SPI flash...SF: erase 20 e 0 0 (e0000)
SF: erase 20 e 10 0 (e1000)
SF: erase 20 e 20 0 (e2000)
SF: erase 20 e 30 0 (e3000)
SF: erase 20 e 40 0 (e4000)
SF: erase 20 e 50 0 (e5000)
SF: erase 20 e 60 0 (e6000)
SF: erase 20 e 70 0 (e7000)
SF: erase 20 e 80 0 (e8000)
SF: erase 20 e 90 0 (e9000)
SF: erase 20 e a0 0 (ea000)
SF: erase 20 e b0 0 (eb000)
SF: erase 20 e c0 0 (ec000)
SF: erase 20 e d0 0 (ed000)
SF: erase 20 e e0 0 (ee000)
SF: erase 20 e f0 0 (ef000)
Writing to SPI flash...SF: 0x0bf4dd50 => cmd = { 0x02 0x0e0000 } chunk_len = 256
SF: 0x0bf4de50 => cmd = { 0x02 0x0e0100 } chunk_len = 256
SF: 0x0bf4df50 => cmd = { 0x02 0x0e0200 } chunk_len = 256
SF: 0x0bf4e050 => cmd = { 0x02 0x0e0300 } chunk_len = 256
SF: 0x0bf4e150 => cmd = { 0x02 0x0e0400 } chunk_len = 256
SF: 0x0bf4e250 => cmd = { 0x02 0x0e0500 } chunk_len = 256

Quoted 15 lines
drivers/mtd/spi/spi_flash.c +1 -5
@@ -1021,11 +1021,7 @@ int spi_flash_scan(struct spi_flash *flash)
                return -EPROTONOSUPPORT;
        }
 
-       /* Flash powers up read-only, so clear BP# bits */
-       if (idcode[0] == SPI_FLASH_CFI_MFR_ATMEL ||
-           idcode[0] == SPI_FLASH_CFI_MFR_MACRONIX ||
-           idcode[0] == SPI_FLASH_CFI_MFR_SST)
-               write_sr(flash, 0);
+       write_sr(flash, 0);
 
        /* Assign spi data */
        flash->name = params->name;
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(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
#7 lore raw
Quoted 1 line · Pavel Machek

Yes, it helps. Thanks! I can now write to the enviornment.

Ok, good. What happens if you revert the hack and boot a fresh 2016.05 U-boot?

Are you able to write/save to the env?

I want to understand if your flash always come up with the SR bits protected or not.

author
#8 lore raw

[U-Boot] socfpga 2016.07-rc0: have to disable parts of flash probing and limit read size to get SPL to work

In reply to Fabio Estevam

Hi!

There's one more "funny" thing I see with SPI: SPL fails to boot if I let it do full probing, or if I allow it to do reads in big chunks (that may be explained by watchdog, I'll investigate it some more).

This makes SPL work for me, but I guess I'd like to understand why.

Ideas welcome.

Best regards,
Pavel

drivers/mtd/spi/spi_flash.c +7 -1
@@ -515,6 +520,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 #endif
 		remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) *
 				(bank_sel + 1)) - offset;
+		remain_len = 32768;
 		if (len < remain_len)
 			read_len = len;
 		else

@@ -1176,23 +1178,28 @@ int spi_flash_scan(struct spi_flash *flash)
 	/* Now erase size becomes valid sector size */
 	flash->sector_size = flash->erase_size;
 
+#ifndef CONFIG_SPL_BUILD
 	/* Look for the fastest read cmd */
 	cmd = fls(params->e_rd_cmd & spi->mode_rx);
 	if (cmd) {
 		cmd = spi_read_cmds_array[cmd - 1];
 		flash->read_cmd = cmd;
 	} else {
+#endif
 		/* Go for default supported read cmd */
 		flash->read_cmd = CMD_READ_ARRAY_FAST;
+#ifndef CONFIG_SPL_BUILD		
 	}
-
 	/* Not require to look for fastest only two write cmds yet */
 	if (params->flags & WR_QPP && spi->mode & SPI_TX_QUAD)
 		flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
 	else
+#endif
 		/* Go for default supported write cmd */
 		flash->write_cmd = CMD_PAGE_PROGRAM;
 
+	/* Why are we even probing writes? SPL should not write anywhere... */
+
 	/* Set the quad enable bit - only for quad commands */
 	if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) ||
 	    (flash->read_cmd == CMD_READ_QUAD_IO_FAST) ||
Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
author
#9 lore raw
In reply to Fabio Estevam
Quoted 18 lines · Fabio Estevam
Quoted 15 lines · Pavel Machek

Commit c3c016cf75360c2a0d0a065b64b438aaf7720576 is a part of the problem:

offset 0x40000 is protected and cannot be erased
=> sf help
No SPI flash selected. Please run `sf probe'
=> sf probe
...
SF: Detected N25Q512 with page size 256 Bytes, erase size 4 KiB, total 64 MiB
cadence_spi_set_speed: speed=1000000
=> sf protect unlock 0x40000 0x20000
cadence_spi_xfer: len=1 [bytes]
cadence_spi_xfer: len=1 [bytes]
=> saveenv
Saving Environment to SPI Flash...

Quoted 2 lines

Does this quick hack help? I am wondering if yous SPI flash power up with the SR field protected:

This may be stupid but... is it possible that changes made by write_sr() persist over powerdown?

Best regards,
Pavel

Quoted 15 lines
drivers/mtd/spi/spi_flash.c +1 -5
@@ -1021,11 +1021,7 @@ int spi_flash_scan(struct spi_flash *flash)
                return -EPROTONOSUPPORT;
        }
 
-       /* Flash powers up read-only, so clear BP# bits */
-       if (idcode[0] == SPI_FLASH_CFI_MFR_ATMEL ||
-           idcode[0] == SPI_FLASH_CFI_MFR_MACRONIX ||
-           idcode[0] == SPI_FLASH_CFI_MFR_SST)
-               write_sr(flash, 0);
+       write_sr(flash, 0);
 
        /* Assign spi data */
        flash->name = params->name;
Signature · 2 lines
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
#10 lore raw
Quoted 5 lines · Pavel Machek
Quoted 2 lines

Does this quick hack help? I am wondering if yous SPI flash power up with the SR field protected:

This may be stupid but... is it possible that changes made by write_sr() persist over powerdown?

Yes, they do.