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sunxi spi fixes

PATCH Superseded Michal Suchanek 6 participants 34 messages May 24, 2016 – Jun 6, 2016

Subsystems (2)

v1 of 3 Superseded Latest is v3 →

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#0 lore raw

cover sunxi spi fixes

Hello,

This series addresses some issues with sunxi SPI drivers.

The last patch adding DMA support is not completed. It addresses some issues with the previous version of the patch and it works in practice but some issues still remain.

Thanks

Michal

Emilio L?pez (1):
RFC spi: sun4i: add DMA support

Michal Suchanek (4):
spi: sunxi: fix transfer timeout
spi: sun4i: fix FIFO limit
spi: sunxi: expose maximum transfer size limit
spi: sunxi: set maximum and minimum speed of SPI master

 drivers/spi/spi-sun4i.c | 186 +++++++++++++++++++++++++++++++++++++++++++++---
 drivers/spi/spi-sun6i.c |  20 +++++-
 2 files changed, 194 insertions(+), 12 deletions(-)
Signature · 1 line
2.8.1
#1 lore raw

PATCH 1/5 spi: sunxi: fix transfer timeout

The trasfer timeout is fixed at 1000 ms. Reading a 4Mbyte flash over 1MHz SPI bus takes way longer than that. Calculate the timeout from the actual time the transfer is supposed to take and multiply by 2 for good measure.

---

v2:
- fix build error
- use unsigned instead of int in max_t
- use tfr->speed_hz instead of sspi->max_speed_hz

---
 drivers/spi/spi-sun4i.c | 11 ++++++++++-
 drivers/spi/spi-sun6i.c | 11 ++++++++++-
 2 files changed, 20 insertions(+), 2 deletions(-)
drivers/spi/spi-sun4i.c +10 -1
index 1ddd9e2..fe63bbd 100644
@@ -173,6 +173,7 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
 {
 	struct sun4i_spi *sspi = spi_master_get_devdata(master);
 	unsigned int mclk_rate, div, timeout;
+	unsigned int start, end, tx_time;
 	unsigned int tx_len = 0;
 	int ret = 0;
 	u32 reg;
@@ -279,9 +280,17 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
 	reg = sun4i_spi_read(sspi, SUN4I_CTL_REG);
 	sun4i_spi_write(sspi, SUN4I_CTL_REG, reg | SUN4I_CTL_XCH);
 
+	tx_time = max_t(unsigned, tfr->len * 8 * 2 / (tfr->speed_hz / 1000),
+			100);
+	start = jiffies;
 	timeout = wait_for_completion_timeout(&sspi->done,
-					      msecs_to_jiffies(1000));
+					      msecs_to_jiffies(tx_time));
+	end = jiffies;
 	if (!timeout) {
+		dev_warn(&master->dev,
+			 "%s: timeout transferring %u bytes@%iHz for %i(%i)ms",
+			 dev_name(&spi->dev), tfr->len, tfr->speed_hz,
+			 jiffies_to_msecs(end - start), tx_time);
 		ret = -ETIMEDOUT;
 		goto out;
 	}
drivers/spi/spi-sun6i.c +10 -1
index 42e2c4b..8be5c5c 100644
@@ -162,6 +162,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
 	unsigned int mclk_rate, div, timeout;
 	unsigned int tx_len = 0;
 	int ret = 0;
+	unsigned int start, end, tx_time;
 	u32 reg;
 
 	/* We don't support transfer larger than the FIFO */
@@ -269,9 +270,17 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
 	reg = sun6i_spi_read(sspi, SUN6I_TFR_CTL_REG);
 	sun6i_spi_write(sspi, SUN6I_TFR_CTL_REG, reg | SUN6I_TFR_CTL_XCH);
 
+	tx_time = max_t(unsigned, tfr->len * 8 * 2 / (tfr->speed_hz / 1000),
+			100);
+	start = jiffies;
 	timeout = wait_for_completion_timeout(&sspi->done,
-					      msecs_to_jiffies(1000));
+					      msecs_to_jiffies(tx_time));
+	end = jiffies;
 	if (!timeout) {
+		dev_warn(&master->dev,
+			 "%s: timeout transferring %u bytes@%iHz for %i(%i)ms",
+			 dev_name(&spi->dev), tfr->len, tfr->speed_hz,
+			 jiffies_to_msecs(end - start), tx_time);
 		ret = -ETIMEDOUT;
 		goto out;
 	}
Signature · 1 line
2.8.1
#2 lore raw

Re: [linux-sunxi] [PATCH 1/5] spi: sunxi: fix transfer timeout

Hi Michal,

Quoted 30 lines · Michal Suchanek

The trasfer timeout is fixed at 1000 ms. Reading a 4Mbyte flash over 1MHz SPI bus takes way longer than that. Calculate the timeout from the actual time the transfer is supposed to take and multiply by 2 for good measure.

---

v2:
- fix build error
- use unsigned instead of int in max_t
- use tfr->speed_hz instead of sspi->max_speed_hz

---
 drivers/spi/spi-sun4i.c | 11 ++++++++++-
 drivers/spi/spi-sun6i.c | 11 ++++++++++-
 2 files changed, 20 insertions(+), 2 deletions(-)
drivers/spi/spi-sun4i.c +1 -0
index 1ddd9e2..fe63bbd 100644
@@ -173,6 +173,7 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
 {
        struct sun4i_spi *sspi = spi_master_get_devdata(master);
        unsigned int mclk_rate, div, timeout;
+       unsigned int start, end, tx_time;
        unsigned int tx_len = 0;
        int ret = 0;
        u32 reg;

drivers/spi/spi-sun4i.c static int sun4i_spi_transfer_one(struct spi_master *master, · line 283

Quoted 4 lines
drivers/spi/spi-sun4i.c +1 -0
@@ -279,9 +280,17 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
        reg = sun4i_spi_read(sspi, SUN4I_CTL_REG);
        sun4i_spi_write(sspi, SUN4I_CTL_REG, reg | SUN4I_CTL_XCH);
 
+       tx_time = max_t(unsigned, tfr->len * 8 * 2 / (tfr->speed_hz / 1000),

You should probably use "unsigned int" instead of just "unsigned" here.

drivers/spi/spi-sun4i.c static int sun4i_spi_transfer_one(struct spi_master *master, · line 293

Quoted 11 lines
drivers/spi/spi-sun4i.c +8 -1
+                       100);
+       start = jiffies;
        timeout = wait_for_completion_timeout(&sspi->done,
-                                             msecs_to_jiffies(1000));
+                                             msecs_to_jiffies(tx_time));
+       end = jiffies;
        if (!timeout) {
+               dev_warn(&master->dev,
+                        "%s: timeout transferring %u bytes@%iHz for %i(%i)ms",
+                        dev_name(&spi->dev), tfr->len, tfr->speed_hz,
+                        jiffies_to_msecs(end - start), tx_time);

Should the debug changes be in a separate patch?

Quoted 16 lines
drivers/spi/spi-sun4i.c +0 -0
                ret = -ETIMEDOUT;
                goto out;
        }
drivers/spi/spi-sun6i.c +1 -0
index 42e2c4b..8be5c5c 100644
@@ -162,6 +162,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
        unsigned int mclk_rate, div, timeout;
        unsigned int tx_len = 0;
        int ret = 0;
+       unsigned int start, end, tx_time;
        u32 reg;
 
        /* We don't support transfer larger than the FIFO */

drivers/spi/spi-sun6i.c static int sun6i_spi_transfer_one(struct spi_master *master, · line 273

Quoted 4 lines
drivers/spi/spi-sun6i.c +1 -0
@@ -269,9 +270,17 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
        reg = sun6i_spi_read(sspi, SUN6I_TFR_CTL_REG);
        sun6i_spi_write(sspi, SUN6I_TFR_CTL_REG, reg | SUN6I_TFR_CTL_XCH);
 
+       tx_time = max_t(unsigned, tfr->len * 8 * 2 / (tfr->speed_hz / 1000),

Ditto, "unsigned int" instead of "unsigned"?

drivers/spi/spi-sun6i.c static int sun6i_spi_transfer_one(struct spi_master *master, · line 283

Quoted 11 lines
drivers/spi/spi-sun6i.c +8 -1
+                       100);
+       start = jiffies;
        timeout = wait_for_completion_timeout(&sspi->done,
-                                             msecs_to_jiffies(1000));
+                                             msecs_to_jiffies(tx_time));
+       end = jiffies;
        if (!timeout) {
+               dev_warn(&master->dev,
+                        "%s: timeout transferring %u bytes@%iHz for %i(%i)ms",
+                        dev_name(&spi->dev), tfr->len, tfr->speed_hz,
+                        jiffies_to_msecs(end - start), tx_time);

Ditto, separate patch?

Also, should the changes for the drivers be in two separate patches also?

Thanks,

Signature · 4 lines
Julian Calaby

Email: julian.calaby at gmail.com
Profile: http://www.google.com/profiles/julian.calaby/
#3 lore raw

Re: [linux-sunxi] [PATCH 1/5] spi: sunxi: fix transfer timeout

Quoted 36 lines · Julian Calaby

Hi Michal,

Quoted 33 lines · Michal Suchanek

The trasfer timeout is fixed at 1000 ms. Reading a 4Mbyte flash over 1MHz SPI bus takes way longer than that. Calculate the timeout from the actual time the transfer is supposed to take and multiply by 2 for good measure.

---

v2:
- fix build error
- use unsigned instead of int in max_t
- use tfr->speed_hz instead of sspi->max_speed_hz

---
 drivers/spi/spi-sun4i.c | 11 ++++++++++-
 drivers/spi/spi-sun6i.c | 11 ++++++++++-
 2 files changed, 20 insertions(+), 2 deletions(-)
drivers/spi/spi-sun4i.c +1 -0
index 1ddd9e2..fe63bbd 100644
@@ -173,6 +173,7 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
 {
        struct sun4i_spi *sspi = spi_master_get_devdata(master);
        unsigned int mclk_rate, div, timeout;
+       unsigned int start, end, tx_time;
        unsigned int tx_len = 0;
        int ret = 0;
        u32 reg;
@@ -279,9 +280,17 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
        reg = sun4i_spi_read(sspi, SUN4I_CTL_REG);
        sun4i_spi_write(sspi, SUN4I_CTL_REG, reg | SUN4I_CTL_XCH);
 
Quoted 5 lines

drivers/spi/spi-sun4i.c static int sun4i_spi_transfer_one(struct spi_master *master, · line 283

Quoted 1 line
drivers/spi/spi-sun4i.c +1 -0
+       tx_time = max_t(unsigned, tfr->len * 8 * 2 / (tfr->speed_hz / 1000),

You should probably use "unsigned int" instead of just "unsigned" here.

Quoted 1 line
drivers/spi/spi-sun4i.c +1 -0
+                       100);

Or just 100U constant and avoid max_t altogether.

Quoted 11 lines

drivers/spi/spi-sun4i.c static int sun4i_spi_transfer_one(struct spi_master *master, · line 293

Quoted 10 lines
drivers/spi/spi-sun4i.c +7 -1
+       start = jiffies;
        timeout = wait_for_completion_timeout(&sspi->done,
-                                             msecs_to_jiffies(1000));
+                                             msecs_to_jiffies(tx_time));
+       end = jiffies;
        if (!timeout) {
+               dev_warn(&master->dev,
+                        "%s: timeout transferring %u bytes@%iHz for %i(%i)ms",
+                        dev_name(&spi->dev), tfr->len, tfr->speed_hz,
+                        jiffies_to_msecs(end - start), tx_time);
Quoted 1 line

Should the debug changes be in a separate patch?

Is this so big of a change that it needs to be split?

Quoted 36 lines
Quoted 17 lines
drivers/spi/spi-sun4i.c +0 -0
                ret = -ETIMEDOUT;
                goto out;
        }
drivers/spi/spi-sun6i.c +1 -0
index 42e2c4b..8be5c5c 100644
@@ -162,6 +162,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
        unsigned int mclk_rate, div, timeout;
        unsigned int tx_len = 0;
        int ret = 0;
+       unsigned int start, end, tx_time;
        u32 reg;
 
        /* We don't support transfer larger than the FIFO */

drivers/spi/spi-sun6i.c static int sun6i_spi_transfer_one(struct spi_master *master, · line 273

Quoted 4 lines
drivers/spi/spi-sun6i.c +1 -0
@@ -269,9 +270,17 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
        reg = sun6i_spi_read(sspi, SUN6I_TFR_CTL_REG);
        sun6i_spi_write(sspi, SUN6I_TFR_CTL_REG, reg | SUN6I_TFR_CTL_XCH);
 
+       tx_time = max_t(unsigned, tfr->len * 8 * 2 / (tfr->speed_hz / 1000),

Ditto, "unsigned int" instead of "unsigned"?

drivers/spi/spi-sun6i.c static int sun6i_spi_transfer_one(struct spi_master *master, · line 283

Quoted 11 lines
drivers/spi/spi-sun6i.c +8 -1
+                       100);
+       start = jiffies;
        timeout = wait_for_completion_timeout(&sspi->done,
-                                             msecs_to_jiffies(1000));
+                                             msecs_to_jiffies(tx_time));
+       end = jiffies;
        if (!timeout) {
+               dev_warn(&master->dev,
+                        "%s: timeout transferring %u bytes@%iHz for %i(%i)ms",
+                        dev_name(&spi->dev), tfr->len, tfr->speed_hz,
+                        jiffies_to_msecs(end - start), tx_time);
Quoted 3 lines

Ditto, separate patch?

Also, should the changes for the drivers be in two separate patches also?

That's basically the same driver with different constants so I guess not.

Thanks

Michal

#4 lore raw

Re: [linux-sunxi] [PATCH 1/5] spi: sunxi: fix transfer timeout

Hi Michal,

Quoted 56 lines · Michal Suchanek
Quoted 36 lines · Julian Calaby

Hi Michal,

Quoted 33 lines · Michal Suchanek

The trasfer timeout is fixed at 1000 ms. Reading a 4Mbyte flash over 1MHz SPI bus takes way longer than that. Calculate the timeout from the actual time the transfer is supposed to take and multiply by 2 for good measure.

---

v2:
- fix build error
- use unsigned instead of int in max_t
- use tfr->speed_hz instead of sspi->max_speed_hz

---
 drivers/spi/spi-sun4i.c | 11 ++++++++++-
 drivers/spi/spi-sun6i.c | 11 ++++++++++-
 2 files changed, 20 insertions(+), 2 deletions(-)
drivers/spi/spi-sun4i.c +1 -0
index 1ddd9e2..fe63bbd 100644
@@ -173,6 +173,7 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
 {
        struct sun4i_spi *sspi = spi_master_get_devdata(master);
        unsigned int mclk_rate, div, timeout;
+       unsigned int start, end, tx_time;
        unsigned int tx_len = 0;
        int ret = 0;
        u32 reg;
@@ -279,9 +280,17 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
        reg = sun4i_spi_read(sspi, SUN4I_CTL_REG);
        sun4i_spi_write(sspi, SUN4I_CTL_REG, reg | SUN4I_CTL_XCH);
 
Quoted 5 lines

drivers/spi/spi-sun4i.c static int sun4i_spi_transfer_one(struct spi_master *master, · line 283

Quoted 1 line
drivers/spi/spi-sun4i.c +1 -0
+       tx_time = max_t(unsigned, tfr->len * 8 * 2 / (tfr->speed_hz / 1000),

You should probably use "unsigned int" instead of just "unsigned" here.

Quoted 1 line
drivers/spi/spi-sun4i.c +1 -0
+                       100);

Or just 100U constant and avoid max_t altogether.

Quoted 11 lines
Quoted 10 lines
drivers/spi/spi-sun4i.c +7 -1
+       start = jiffies;
        timeout = wait_for_completion_timeout(&sspi->done,
-                                             msecs_to_jiffies(1000));
+                                             msecs_to_jiffies(tx_time));
+       end = jiffies;
        if (!timeout) {
+               dev_warn(&master->dev,
+                        "%s: timeout transferring %u bytes@%iHz for %i(%i)ms",
+                        dev_name(&spi->dev), tfr->len, tfr->speed_hz,
+                        jiffies_to_msecs(end - start), tx_time);
Quoted 3 lines
Quoted 1 line

Should the debug changes be in a separate patch?

Is this so big of a change that it needs to be split?

Some people get touchy about changes not being mentioned in the commit log. Technically this is two changes: fixing the timeout and adding the timeout debugging, however they're related, so maybe just mention that you've added this debugging in the commit log.

Quoted 37 lines
Quoted 37 lines
Quoted 18 lines
drivers/spi/spi-sun4i.c +0 -0
                ret = -ETIMEDOUT;
                goto out;
        }
drivers/spi/spi-sun6i.c +1 -0
index 42e2c4b..8be5c5c 100644
@@ -162,6 +162,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
        unsigned int mclk_rate, div, timeout;
        unsigned int tx_len = 0;
        int ret = 0;
+       unsigned int start, end, tx_time;
        u32 reg;
 
        /* We don't support transfer larger than the FIFO */

drivers/spi/spi-sun6i.c static int sun6i_spi_transfer_one(struct spi_master *master, · line 273

Quoted 4 lines
drivers/spi/spi-sun6i.c +1 -0
@@ -269,9 +270,17 @@ static int sun6i_spi_transfer_one(struct spi_master *master,
        reg = sun6i_spi_read(sspi, SUN6I_TFR_CTL_REG);
        sun6i_spi_write(sspi, SUN6I_TFR_CTL_REG, reg | SUN6I_TFR_CTL_XCH);
 
+       tx_time = max_t(unsigned, tfr->len * 8 * 2 / (tfr->speed_hz / 1000),

Ditto, "unsigned int" instead of "unsigned"?

Quoted 11 lines
drivers/spi/spi-sun6i.c +8 -1
+                       100);
+       start = jiffies;
        timeout = wait_for_completion_timeout(&sspi->done,
-                                             msecs_to_jiffies(1000));
+                                             msecs_to_jiffies(tx_time));
+       end = jiffies;
        if (!timeout) {
+               dev_warn(&master->dev,
+                        "%s: timeout transferring %u bytes@%iHz for %i(%i)ms",
+                        dev_name(&spi->dev), tfr->len, tfr->speed_hz,
+                        jiffies_to_msecs(end - start), tx_time);
Quoted 5 lines
Quoted 3 lines

Ditto, separate patch?

Also, should the changes for the drivers be in two separate patches also?

That's basically the same driver with different constants so I guess not.

Fair enough, I withdraw my comment then.

Thanks,

Signature · 4 lines
Julian Calaby

Email: julian.calaby at gmail.com
Profile: http://www.google.com/profiles/julian.calaby/
maintainer
#5 lore raw

Re: [linux-sunxi] [PATCH 1/5] spi: sunxi: fix transfer timeout

Quoted 7 lines · Julian Calaby
Quoted 3 lines · Michal Suchanek
Quoted 1 line

Also, should the changes for the drivers be in two separate patches also?

That's basically the same driver with different constants so I guess not.

Fair enough, I withdraw my comment then.

If it's the same driver with different constants it should really
actually be the same driver - I did ask this when the drivers were
originally merged...
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#6 lore raw

Re: [linux-sunxi] [PATCH 1/5] spi: sunxi: fix transfer timeout

Hello

Quoted 5 lines · Mark Brown
Quoted 3 lines · Julian Calaby
Quoted 1 line · Michal Suchanek
Quoted 1 line

Also, should the changes for the drivers be in two separate patches also?

Quoted 7 lines
Quoted 3 lines
Quoted 1 line

That's basically the same driver with different constants so I guess not.

Fair enough, I withdraw my comment then.

If it's the same driver with different constants it should really actually be the same driver - I did ask this when the drivers were originally merged...

There are some slight differences and the constants really are different for each driver.

You would need a register remap adaptation layer and a few qirks for each revision of the driver.

It's certainly possible to merge them but I am not sure if that gives easier to maintain code.

On the other hand, comparing the drivers there is different comment anout clock calculation arithmetic and the code is the same :S

Thanks

Michal

spi-sun6i.c 2016-05-31 13:26:58.123580382 +0200 renamed from spi-sun4i.c 2016-05-31 13:19:27.076510421 +0200 +22 -23
@@ -19,65 +19,72 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
+#include <linux/reset.h>
 
 #include <linux/spi/spi.h>
 
-#define SUNXI_FIFO_DEPTH            64
+#define SUNXI_FIFO_DEPTH            128
 
-#define SUNXI_RXDATA_REG            0x00
+#define SUNXI_TXDATA_REG            0x200
 
-#define SUNXI_TXDATA_REG            0x04
+#define SUNXI_RXDATA_REG            0x300
 
 #define SUNXI_TFR_CTL_REG            0x08
-#define SUNXI_TFR_CTL_ENABLE            BIT(0)
-#define SUNXI_TFR_CTL_MASTER            BIT(1)
-#define SUNXI_TFR_CTL_CPHA            BIT(2)
-#define SUNXI_TFR_CTL_CPOL            BIT(3)
-#define SUNXI_TFR_CTL_CS_ACTIVE_LOW        BIT(4)
-#define SUNXI_TFR_CTL_LMTF            BIT(6)
-#define SUNXI_TFR_CTL_TF_RST            BIT(8)
-#define SUNXI_TFR_CTL_RF_RST            BIT(9)
-#define SUNXI_TFR_CTL_XCH            BIT(10)
-#define SUNXI_TFR_CTL_CS_MASK            0x3000
-#define SUNXI_TFR_CTL_CS(cs)            (((cs) << 12) & SUNXI_TFR_CTL_CS_MASK)
-#define SUNXI_TFR_CTL_DHB            BIT(15)
-#define SUNXI_TFR_CTL_CS_MANUAL            BIT(16)
-#define SUNXI_TFR_CTL_CS_LEVEL            BIT(17)
-#define SUNXI_TFR_CTL_TP            BIT(18)
+#define SUNXI_TFR_CTL_CPHA            BIT(0)
+#define SUNXI_TFR_CTL_CPOL            BIT(1)
+#define SUNXI_TFR_CTL_SPOL            BIT(2)
+#define SUNXI_TFR_CTL_CS_MASK            0x30
+#define SUNXI_TFR_CTL_CS(cs)            (((cs) << 4) & SUNXI_TFR_CTL_CS_MASK)
+#define SUNXI_TFR_CTL_CS_MANUAL            BIT(6)
+#define SUNXI_TFR_CTL_CS_LEVEL            BIT(7)
+#define SUNXI_TFR_CTL_DHB            BIT(8)
+#define SUNXI_TFR_CTL_FBS            BIT(12)
+#define SUNXI_TFR_CTL_XCH            BIT(31)
 
-#define SUNXI_INT_CTL_REG            0x0c
-#define SUNXI_INT_CTL_TC            BIT(16)
+#define SUNXI_INT_CTL_REG            0x10
+#define SUNXI_INT_CTL_RF_OVF            BIT(8)
+#define SUNXI_INT_CTL_TC            BIT(12)
 
-#define SUNXI_INT_STA_REG            0x10
+#define SUNXI_INT_STA_REG            0x14
 
-#define SUNXI_DMA_CTL_REG            0x14
+#define SUNXI_FIFO_CTL_REG            0x18
+#define SUNXI_FIFO_CTL_RF_RST            BIT(15)
+#define SUNXI_FIFO_CTL_TF_RST            BIT(31)
 
-#define SUNXI_CLK_CTL_REG            0x1c
+#define SUNXI_CLK_CTL_REG            0x24
 #define SUNXI_CLK_CTL_CDR2_MASK            0xff
 #define SUNXI_CLK_CTL_CDR2(div)            (((div) &

SUNXI_CLK_CTL_CDR2_MASK) << 0)
#define SUNXI_CLK_CTL_CDR1_MASK 0xf
#define SUNXI_CLK_CTL_CDR1(div) (((div) &
SUNXI_CLK_CTL_CDR1_MASK) << 8)
#define SUNXI_CLK_CTL_DRS BIT(12)

-#define SUNXI_BURST_CNT_REG 0x20
+#define SUNXI_BURST_CNT_REG 0x30
#define SUNXI_BURST_CNT(cnt) ((cnt) & 0xffffff)

-#define SUNXI_XMIT_CNT_REG 0x24
+#define SUNXI_XMIT_CNT_REG 0x34
#define SUNXI_XMIT_CNT(cnt) ((cnt) & 0xffffff)

-#define SUNXI_FIFO_STA_REG 0x28
+#define SUNXI_FIFO_STA_REG 0x1c

 #define SUNXI_FIFO_STA_RF_CNT_MASK        0x7f
 #define SUNXI_FIFO_STA_RF_CNT_BITS        0
 #define SUNXI_FIFO_STA_TF_CNT_MASK        0x7f
 #define SUNXI_FIFO_STA_TF_CNT_BITS        16

-#define SUNXI_WAIT_REG 0x18
+#define SUNXI_BURST_CTL_CNT_REG 0x38
+#define SUNXI_BURST_CTL_CNT_STC(cnt) ((cnt) & 0xffffff)
+
+#define SUNXI_GBL_CTL_REG 0x04
+#define SUNXI_GBL_CTL_BUS_ENABLE BIT(0)
+#define SUNXI_GBL_CTL_MASTER BIT(1)
+#define SUNXI_GBL_CTL_TP BIT(7)
+#define SUNXI_GBL_CTL_RST BIT(31)

 struct sunxi_spi {
     struct spi_master    *master;
     void __iomem        *base_addr;
     struct clk        *hclk;
     struct clk        *mclk;

+ struct reset_control *rstc;

     struct completion    done;

@@ -136,37 +143,18 @@

     u32 reg;

     reg = sunxi_spi_read(sspi, SUNXI_TFR_CTL_REG);
-
     reg &= ~SUNXI_TFR_CTL_CS_MASK;
     reg |= SUNXI_TFR_CTL_CS(spi->chip_select);

- /* We want to control the chip select manually */
- reg |= SUNXI_TFR_CTL_CS_MANUAL;
-

     if (enable)
         reg |= SUNXI_TFR_CTL_CS_LEVEL;
     else
         reg &= ~SUNXI_TFR_CTL_CS_LEVEL;

- /*

-     * Even though this looks irrelevant since we are supposed to
-     * be controlling the chip select manually, this bit also
-     * controls the levels of the chip select for inactive
-     * devices.
-     *
-     * If we don't set it, the chip select level will go low by
-     * default when the device is idle, which is not really
-     * expected in the common case where the chip select is active
-     * low.
-     */

- if (spi->mode & SPI_CS_HIGH)
- reg &= ~SUNXI_TFR_CTL_CS_ACTIVE_LOW;
- else
- reg |= SUNXI_TFR_CTL_CS_ACTIVE_LOW;
-

     sunxi_spi_write(sspi, SUNXI_TFR_CTL_REG, reg);

}

+
static int sunxi_spi_transfer_one(struct spi_master *master,
struct spi_device *spi,
struct spi_transfer *tfr)
@@ -189,17 +177,16 @@

     /* Clear pending interrupts */
     sunxi_spi_write(sspi, SUNXI_INT_STA_REG, ~0);

-
- reg = sunxi_spi_read(sspi, SUNXI_TFR_CTL_REG);
-

     /* Reset FIFOs */

- sunxi_spi_write(sspi, SUNXI_TFR_CTL_REG,
- reg | SUNXI_TFR_CTL_RF_RST | SUNXI_TFR_CTL_TF_RST);
+ sunxi_spi_write(sspi, SUNXI_FIFO_CTL_REG,
+ SUNXI_FIFO_CTL_RF_RST | SUNXI_FIFO_CTL_TF_RST);

/*
* Setup the transfer control register: Chip Select,
* polarities, etc.
*/
+ reg = sunxi_spi_read(sspi, SUNXI_TFR_CTL_REG);
+

     if (spi->mode & SPI_CPOL)
         reg |= SUNXI_TFR_CTL_CPOL;
     else
@@ -211,10 +198,9 @@
         reg &= ~SUNXI_TFR_CTL_CPHA;

     if (spi->mode & SPI_LSB_FIRST)
-        reg |= SUNXI_TFR_CTL_LMTF;
+        reg |= SUNXI_TFR_CTL_FBS;

else
- reg &= ~SUNXI_TFR_CTL_LMTF;
-
+ reg &= ~SUNXI_TFR_CTL_FBS;

/*
* If it's a TX only transfer, we don't want to fill the RX
@@ -225,6 +211,9 @@

     else
         reg |= SUNXI_TFR_CTL_DHB;

+ /* We want to control the chip select manually */
+ reg |= SUNXI_TFR_CTL_CS_MANUAL;
+

     sunxi_spi_write(sspi, SUNXI_TFR_CTL_REG, reg);

     /* Ensure that we have a parent clock fast enough */

@@ -239,7 +228,7 @@
*
* We have two choices there. Either we can use the clock
* divide rate 1, which is calculated thanks to this formula:
- * SPI_CLK = MOD_CLK / (2 ^ (cdr + 1))
+ * SPI_CLK = MOD_CLK / (2 ^ cdr)
* Or we can use CDR2, which is calculated with the formula:
* SPI_CLK = MOD_CLK / (2 * (cdr + 1))
* Wether we use the former or the latter is set through the
@@ -268,6 +257,8 @@

     /* Setup the counters */
     sunxi_spi_write(sspi, SUNXI_BURST_CNT_REG, SUNXI_BURST_CNT(tfr->len));
     sunxi_spi_write(sspi, SUNXI_XMIT_CNT_REG, SUNXI_XMIT_CNT(tx_len));

+ sunxi_spi_write(sspi, SUNXI_BURST_CTL_CNT_REG,
+ SUNXI_BURST_CTL_CNT_STC(tx_len));

     /* Fill the TX FIFO */
     sunxi_spi_fill_fifo(sspi, SUNXI_FIFO_DEPTH);
@@ -327,11 +318,19 @@
         goto err;
     }

- sunxi_spi_write(sspi, SUNXI_TFR_CTL_REG,
- SUNXI_TFR_CTL_ENABLE | SUNXI_TFR_CTL_MASTER | SUNXI_TFR_CTL_TP);
+ ret = reset_control_deassert(sspi->rstc);
+ if (ret) {
+ dev_err(dev, "Couldn't deassert the device from reset\n");
+ goto err2;
+ }
+
+ sunxi_spi_write(sspi, SUNXI_GBL_CTL_REG,
+ SUNXI_GBL_CTL_BUS_ENABLE | SUNXI_GBL_CTL_MASTER |
SUNXI_GBL_CTL_TP);

     return 0;

+err2:
+ clk_disable_unprepare(sspi->mclk);
err:

     clk_disable_unprepare(sspi->hclk);
 out:
@@ -343,6 +342,7 @@
     struct spi_master *master = dev_get_drvdata(dev);
     struct sunxi_spi *sspi = spi_master_get_devdata(master);
+    reset_control_assert(sspi->rstc);
     clk_disable_unprepare(sspi->mclk);
     clk_disable_unprepare(sspi->hclk);

@@ -411,6 +411,13 @@

     init_completion(&sspi->done);

+ sspi->rstc = devm_reset_control_get(&pdev->dev, NULL);
+ if (IS_ERR(sspi->rstc)) {

+        dev_err(&pdev->dev, "Couldn't get reset controller\n");
+        ret = PTR_ERR(sspi->rstc);
+        goto err_free_master;

+ }
+
/*
* This wake-up/shutdown pattern is to be able to have the
* device woken up, even if runtime_pm is disabled
@@ -449,7 +456,7 @@
}

static const struct of_device_id sunxi_spi_match[] = {
- { .compatible = "allwinner,sun4i-a10-spi", },
+ { .compatible = "allwinner,sun6i-a31-spi", },

     {}

};
MODULE_DEVICE_TABLE(of, sunxi_spi_match);
@@ -472,5 +479,5 @@

MODULE_AUTHOR("Pan Nan <[email protected]>"); MODULE_AUTHOR("Maxime Ripard <[email protected]>");
-MODULE_DESCRIPTION("Allwinner A1X/A20 SPI controller driver"); +MODULE_DESCRIPTION("Allwinner A31 SPI controller driver");
MODULE_LICENSE("GPL");

#7 lore raw

Re: [linux-sunxi] [PATCH 1/5] spi: sunxi: fix transfer timeout

In reply to Mark Brown

Hi Mark,

Quoted 5 lines · Mark Brown
Quoted 3 lines · Julian Calaby
Quoted 1 line · Michal Suchanek
Quoted 1 line

Also, should the changes for the drivers be in two separate patches also?

Quoted 7 lines
Quoted 3 lines
Quoted 1 line

That's basically the same driver with different constants so I guess not.

Fair enough, I withdraw my comment then.

If it's the same driver with different constants it should really actually be the same driver - I did ask this when the drivers were originally merged...

I think we already had this discussion a few times :)

The thing is that the SPI framework now deals pretty well with the SPI controllers, and you basically only have the probe function and how to start a transfer. Which is nice.

However, the sun4i and sun6i SPI controllers have very significant register layout differences: the registers offset are different, some registers in the sun4i have been split in several in the sun6i. So while I concur that they look alike, merging the two in a single driver would complicate a lot the code, while we would not be able to share most of the code, so I am really not sure it's worth it.

Where the issue really lies is that they've been both written at the same time, and share the same flaws, especially in their probe method. But that's not really related to the controller itself, but more because the code has been close to copy/pasted.

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#8 lore raw

Re: [PATCH 1/5] spi: sunxi: fix transfer timeout

In reply to Michal Suchanek
Quoted 11 lines · Michal Suchanek

The trasfer timeout is fixed at 1000 ms. Reading a 4Mbyte flash over 1MHz SPI bus takes way longer than that. Calculate the timeout from the actual time the transfer is supposed to take and multiply by 2 for good measure.

---

v2:
- fix build error
- use unsigned instead of int in max_t

And this generates warnings in checkpatch. Please make sure that you run it before submitting any patches.

Thanks!
Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#9 lore raw

PATCH 2/5 spi: sun4i: fix FIFO limit

In reply to Michal Suchanek

When testing SPI without DMA I noticed that filling the FIFO on the spi controller causes timeout.

Always leave room for one byte in the FIFO.

---
v2:
use EMSGSIZE instead of EINVAL

---
 drivers/spi/spi-sun4i.c | 8 ++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)
drivers/spi/spi-sun4i.c +6 -2
index fe63bbd..04f1b77 100644
@@ -180,7 +180,9 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
 
 	/* We don't support transfer larger than the FIFO */
 	if (tfr->len > SUN4I_FIFO_DEPTH)
-		return -EINVAL;
+		return -EMSGSIZE;
+	if (tfr->tx_buf && tfr->len >= SUN4I_FIFO_DEPTH)
+		return -EMSGSIZE;
 
 	reinit_completion(&sspi->done);
 	sspi->tx_buf = tfr->tx_buf;
@@ -271,7 +273,9 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
 	sun4i_spi_write(sspi, SUN4I_XMIT_CNT_REG, SUN4I_XMIT_CNT(tx_len));
 
 	/* Fill the TX FIFO */
-	sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH);
+	/* Filling the FIFO fully causes timeout for some reason
+	 * at least on spi2 on A10s */
+	sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH - 1);
 
 	/* Enable the interrupts */
 	sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, SUN4I_INT_CTL_TC);
#10 lore raw

Re: [PATCH 2/5] spi: sun4i: fix FIFO limit

Hi,

Quoted 6 lines · Michal Suchanek

When testing SPI without DMA I noticed that filling the FIFO on the spi controller causes timeout.

Always leave room for one byte in the FIFO.

Sending it to stable would be great (with a fixes tag too).

Quoted 13 lines

---
v2:
use EMSGSIZE instead of EINVAL

---
 drivers/spi/spi-sun4i.c | 8 ++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)
drivers/spi/spi-sun4i.c +0 -0
index fe63bbd..04f1b77 100644

drivers/spi/spi-sun4i.c static int sun4i_spi_transfer_one(struct spi_master *master, · line 183

Quoted 5 lines
drivers/spi/spi-sun4i.c +1 -1
@@ -180,7 +180,9 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
 
 	/* We don't support transfer larger than the FIFO */
 	if (tfr->len > SUN4I_FIFO_DEPTH)
-		return -EINVAL;
+		return -EMSGSIZE;

One new line here.

drivers/spi/spi-sun4i.c static int sun4i_spi_transfer_one(struct spi_master *master, · line 277

Quoted 12 lines
drivers/spi/spi-sun4i.c +4 -1
+	if (tfr->tx_buf && tfr->len >= SUN4I_FIFO_DEPTH)
+		return -EMSGSIZE;
 
 	reinit_completion(&sspi->done);
 	sspi->tx_buf = tfr->tx_buf;
@@ -271,7 +273,9 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
 	sun4i_spi_write(sspi, SUN4I_XMIT_CNT_REG, SUN4I_XMIT_CNT(tx_len));
 
 	/* Fill the TX FIFO */
-	sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH);
+	/* Filling the FIFO fully causes timeout for some reason
+	 * at least on spi2 on A10s */

This is not the proper comment style and generate a warning with checkpatch, please fix that (and merge the comment with the previous comment).

Thanks!
Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#11 lore raw

PATCH 3/5 spi: sunxi: expose maximum transfer size limit

In reply to Michal Suchanek

The sun4i spi hardware can trasfer at most 63 bytes of data without DMA support so report the limitation. Same on sun6i.

---
 drivers/spi/spi-sun4i.c | 6 ++++++
 drivers/spi/spi-sun6i.c | 6 ++++++
 2 files changed, 12 insertions(+)
drivers/spi/spi-sun4i.c +6 -0
index 04f1b77..bf52b09 100644
@@ -167,6 +167,11 @@ static void sun4i_spi_set_cs(struct spi_device *spi, bool enable)
 	sun4i_spi_write(sspi, SUN4I_CTL_REG, reg);
 }
 
+static size_t sun4i_spi_max_transfer_size(struct spi_device *spi)
+{
+	return SUN4I_FIFO_DEPTH - 1;
+}
+
 static int sun4i_spi_transfer_one(struct spi_master *master,
 				  struct spi_device *spi,
 				  struct spi_transfer *tfr)
@@ -407,6 +412,7 @@ static int sun4i_spi_probe(struct platform_device *pdev)
 	master->bits_per_word_mask = SPI_BPW_MASK(8);
 	master->dev.of_node = pdev->dev.of_node;
 	master->auto_runtime_pm = true;
+	master->max_transfer_size = sun4i_spi_max_transfer_size;
 
 	sspi->hclk = devm_clk_get(&pdev->dev, "ahb");
 	if (IS_ERR(sspi->hclk)) {
drivers/spi/spi-sun6i.c +6 -0
index 8954a62..f491a41 100644
@@ -154,6 +154,11 @@ static void sun6i_spi_set_cs(struct spi_device *spi, bool enable)
 }
 
 
+static size_t sun6i_spi_max_transfer_size(struct spi_device *spi)
+{
+	return SUN6I_FIFO_DEPTH - 1;
+}
+
 static int sun6i_spi_transfer_one(struct spi_master *master,
 				  struct spi_device *spi,
 				  struct spi_transfer *tfr)
@@ -418,6 +423,7 @@ static int sun6i_spi_probe(struct platform_device *pdev)
 	master->bits_per_word_mask = SPI_BPW_MASK(8);
 	master->dev.of_node = pdev->dev.of_node;
 	master->auto_runtime_pm = true;
+	master->max_transfer_size = sun6i_spi_max_transfer_size;
 
 	sspi->hclk = devm_clk_get(&pdev->dev, "ahb");
 	if (IS_ERR(sspi->hclk)) {
Signature · 1 line
2.8.1
#12 lore raw

Re: [PATCH 3/5] spi: sunxi: expose maximum transfer size limit

Quoted 2 lines · Michal Suchanek

The sun4i spi hardware can trasfer at most 63 bytes of data without DMA support so report the limitation. Same on sun6i.

Is it? Is there timeouts on the A31 and later SoCs?

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#13 lore raw

Re: [PATCH 3/5] spi: sunxi: expose maximum transfer size limit

Hello,

Quoted 6 lines · Maxime Ripard
Quoted 2 lines · Michal Suchanek

The sun4i spi hardware can trasfer at most 63 bytes of data without DMA support so report the limitation. Same on sun6i.

Is it? Is there timeouts on the A31 and later SoCs?

I have no sun6i hardware to test with.

This is an advisory limit you can query and it better be smaller rather than unreliable. The hard limit in the driver is still SUN6I_FIFO_DEPTH (which is 128 bytes on sun6i).

You can test his without any actual SPI device. Unused pins you can multiplex as SPI suffice.

Thanks

Michal

Acked-by
#14 lore raw

Re: [PATCH 3/5] spi: sunxi: expose maximum transfer size limit

Quoted 10 lines · Michal Suchanek

Hello,

Quoted 6 lines · Maxime Ripard
Quoted 2 lines · Michal Suchanek

The sun4i spi hardware can trasfer at most 63 bytes of data without DMA support so report the limitation. Same on sun6i.

Is it? Is there timeouts on the A31 and later SoCs?

Quoted 8 lines

I have no sun6i hardware to test with.

This is an advisory limit you can query and it better be smaller rather than unreliable. The hard limit in the driver is still SUN6I_FIFO_DEPTH (which is 128 bytes on sun6i).

You can test his without any actual SPI device. Unused pins you can multiplex as SPI suffice.

Ok, for the time being:

Thanks!
Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#15 lore raw

PATCH 4/5 spi: sunxi: set maximum and minimum speed of SPI master

In reply to Michal Suchanek

The maximum speed of SPI master is used when maximum speed of SPI slave is not specified. Also the __spi_validate function should check that transfer speeds do not exceed the master limits.

The user manual for A10 and A31 specifies maximum speed of the SPI clock as 100MHz and minimum as 3kHz.

Setting the SPI clock to out-of-spec values can lock up the SoC.

---
 drivers/spi/spi-sun4i.c | 2 ++
 drivers/spi/spi-sun6i.c | 2 ++
 2 files changed, 4 insertions(+)
drivers/spi/spi-sun4i.c +2 -0
index bf52b09..e1a75dd6 100644
@@ -405,6 +405,8 @@ static int sun4i_spi_probe(struct platform_device *pdev)
 	}
 
 	sspi->master = master;
+	master->max_speed_hz = 100*1000*1000;
+	master->min_speed_hz =        3*1000;
 	master->set_cs = sun4i_spi_set_cs;
 	master->transfer_one = sun4i_spi_transfer_one;
 	master->num_chipselect = 4;
drivers/spi/spi-sun6i.c +2 -0
index 1952956..0c378ff 100644
@@ -400,6 +400,8 @@ static int sun6i_spi_probe(struct platform_device *pdev)
 	}
 
 	sspi->master = master;
+	master->max_speed_hz = 100*1000*1000;
+	master->min_speed_hz =        3*1000;
 	master->set_cs = sun6i_spi_set_cs;
 	master->transfer_one = sun6i_spi_transfer_one;
 	master->num_chipselect = 4;
Signature · 1 line
2.8.1
#16 lore raw

Re: [PATCH 4/5] spi: sunxi: set maximum and minimum speed of SPI master

Hi,

Quoted 20 lines · Michal Suchanek

The maximum speed of SPI master is used when maximum speed of SPI slave is not specified. Also the __spi_validate function should check that transfer speeds do not exceed the master limits.

The user manual for A10 and A31 specifies maximum speed of the SPI clock as 100MHz and minimum as 3kHz.

Setting the SPI clock to out-of-spec values can lock up the SoC.

---
 drivers/spi/spi-sun4i.c | 2 ++
 drivers/spi/spi-sun6i.c | 2 ++
 2 files changed, 4 insertions(+)
drivers/spi/spi-sun4i.c +0 -0
index bf52b09..e1a75dd6 100644

drivers/spi/spi-sun4i.c static int sun4i_spi_probe(struct platform_device *pdev) · line 408

Quoted 4 lines
drivers/spi/spi-sun4i.c +1 -0
@@ -405,6 +405,8 @@ static int sun4i_spi_probe(struct platform_device *pdev)
 	}
 
 	sspi->master = master;
+	master->max_speed_hz = 100*1000*1000;

You need spaces around the * operator.

drivers/spi/spi-sun4i.c static int sun4i_spi_probe(struct platform_device *pdev) · line 409

Quoted 1 line
drivers/spi/spi-sun4i.c +1 -0
+	master->min_speed_hz =        3*1000;

And I'm not exactly sure why you have that weird indentation.

The same applies for the sun6i driver

Thanks!
Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#17 lore raw

PATCH 5/5 RFC spi: sun4i: add DMA support

In reply to Michal Suchanek

From: Emilio L?pez <[email protected]>

This patch adds support for 64 byte or bigger transfers on the sun4i SPI controller. Said transfers will be performed via DMA.

---
v2:
- fallback to previous behaviour when DMA initialization fails

+ this has the problem that when the driver happens to load before the dma driver it will not use dma - can be addressed with a module parameter
+ the issue with dma_async_tx_descriptor *desc_tx = NULL, *desc_rx = NULL; ... dma_wait_for_async_tx(desc_rx); remains unaddressed

---
 drivers/spi/spi-sun4i.c | 171 ++++++++++++++++++++++++++++++++++++++++++++----
 1 file changed, 158 insertions(+), 13 deletions(-)
drivers/spi/spi-sun4i.c +158 -13
index e1a75dd6..ed2269c 100644
@@ -14,6 +14,8 @@
 #include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/device.h>
+#include <linux/dmaengine.h>
+#include <linux/dma-mapping.h>
 #include <linux/interrupt.h>
 #include <linux/io.h>
 #include <linux/module.h>
@@ -34,6 +36,7 @@
 #define SUN4I_CTL_CPHA				BIT(2)
 #define SUN4I_CTL_CPOL				BIT(3)
 #define SUN4I_CTL_CS_ACTIVE_LOW			BIT(4)
+#define SUN4I_CTL_DMAMC_DEDICATED		BIT(5)
 #define SUN4I_CTL_LMTF				BIT(6)
 #define SUN4I_CTL_TF_RST			BIT(8)
 #define SUN4I_CTL_RF_RST			BIT(9)
@@ -51,6 +54,8 @@
 #define SUN4I_INT_STA_REG		0x10
 
 #define SUN4I_DMA_CTL_REG		0x14
+#define SUN4I_DMA_CTL_RF_READY			BIT(0)
+#define SUN4I_DMA_CTL_TF_NOT_FULL		BIT(10)
 
 #define SUN4I_WAIT_REG			0x18
 
@@ -130,6 +135,13 @@ static inline void sun4i_spi_fill_fifo(struct sun4i_spi *sspi, int len)
 	}
 }
 
+static bool sun4i_spi_can_dma(struct spi_master *master,
+			      struct spi_device *spi,
+			      struct spi_transfer *tfr)
+{
+	return tfr->len >= SUN4I_FIFO_DEPTH;
+}
+
 static void sun4i_spi_set_cs(struct spi_device *spi, bool enable)
 {
 	struct sun4i_spi *sspi = spi_master_get_devdata(spi->master);
@@ -177,17 +189,20 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
 				  struct spi_transfer *tfr)
 {
 	struct sun4i_spi *sspi = spi_master_get_devdata(master);
+	struct dma_async_tx_descriptor *desc_tx = NULL, *desc_rx = NULL;
 	unsigned int mclk_rate, div, timeout;
 	unsigned int start, end, tx_time;
 	unsigned int tx_len = 0;
+	u32 reg, trigger = 0;
 	int ret = 0;
-	u32 reg;
 
-	/* We don't support transfer larger than the FIFO */
-	if (tfr->len > SUN4I_FIFO_DEPTH)
-		return -EMSGSIZE;
-	if (tfr->tx_buf && tfr->len >= SUN4I_FIFO_DEPTH)
-		return -EMSGSIZE;
+	if (!master->can_dma) {
+		/* We don't support transfer larger than the FIFO */
+		if (tfr->len > SUN4I_FIFO_DEPTH)
+			return -EMSGSIZE;
+		if (tfr->tx_buf && tfr->len >= SUN4I_FIFO_DEPTH)
+			return -EMSGSIZE;
+	}
 
 	reinit_completion(&sspi->done);
 	sspi->tx_buf = tfr->tx_buf;
@@ -277,14 +292,67 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
 	sun4i_spi_write(sspi, SUN4I_BURST_CNT_REG, SUN4I_BURST_CNT(tfr->len));
 	sun4i_spi_write(sspi, SUN4I_XMIT_CNT_REG, SUN4I_XMIT_CNT(tx_len));
 
-	/* Fill the TX FIFO */
-	/* Filling the FIFO fully causes timeout for some reason
-	 * at least on spi2 on A10s */
-	sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH - 1);
-
 	/* Enable the interrupts */
 	sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, SUN4I_INT_CTL_TC);
 
+	if (sun4i_spi_can_dma(master, spi, tfr)) {
+		dev_dbg(&sspi->master->dev, "Using DMA mode for transfer\n");
+
+		if (sspi->tx_buf) {
+			desc_tx = dmaengine_prep_slave_sg(master->dma_tx,
+					tfr->tx_sg.sgl, tfr->tx_sg.nents,
+					DMA_TO_DEVICE,
+					DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+			if (!desc_tx) {
+				dev_err(&sspi->master->dev,
+					"Couldn't prepare dma slave\n");
+				return -EIO;
+			}
+
+			trigger |= SUN4I_DMA_CTL_TF_NOT_FULL;
+
+			dmaengine_submit(desc_tx);
+			dma_async_issue_pending(master->dma_tx);
+
+		}
+
+		if (sspi->rx_buf) {
+			desc_rx = dmaengine_prep_slave_sg(master->dma_rx,
+					tfr->rx_sg.sgl, tfr->rx_sg.nents,
+					DMA_FROM_DEVICE,
+					DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+			if (!desc_rx) {
+				dev_err(&sspi->master->dev,
+					"Couldn't prepare dma slave\n");
+				return -EIO;
+			}
+
+			trigger |= SUN4I_DMA_CTL_RF_READY;
+
+			dmaengine_submit(desc_rx);
+			dma_async_issue_pending(master->dma_rx);
+		}
+
+		/* Enable Dedicated DMA requests */
+		reg = sun4i_spi_read(sspi, SUN4I_CTL_REG);
+		reg |= SUN4I_CTL_DMAMC_DEDICATED;
+		sun4i_spi_write(sspi, SUN4I_CTL_REG, reg);
+		sun4i_spi_write(sspi, SUN4I_DMA_CTL_REG, trigger);
+	} else {
+		dev_dbg(&sspi->master->dev, "Using PIO mode for transfer\n");
+
+		/* Disable DMA requests */
+		reg = sun4i_spi_read(sspi, SUN4I_CTL_REG);
+		sun4i_spi_write(sspi, SUN4I_CTL_REG,
+				reg & ~SUN4I_CTL_DMAMC_DEDICATED);
+		sun4i_spi_write(sspi, SUN4I_DMA_CTL_REG, 0);
+
+		/* Fill the TX FIFO */
+		/* Filling the FIFO fully causes timeout for some reason
+		 * at least on spi2 on A10s */
+		sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH - 1);
+	}
+
 	/* Start the transfer */
 	reg = sun4i_spi_read(sspi, SUN4I_CTL_REG);
 	sun4i_spi_write(sspi, SUN4I_CTL_REG, reg | SUN4I_CTL_XCH);
@@ -304,7 +372,16 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
 		goto out;
 	}
 
-	sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH);
+	if (sun4i_spi_can_dma(master, spi, tfr) && desc_rx) {
+		/* The receive transfer should be the last one to finish */
+			/* This seems to work OK.
+			 * TODO: look for some drivers which do something
+			 * more sensible here. */
+		dma_wait_for_async_tx(desc_rx);
+	} else {
+		/* This should be noop with tx only dma */
+		sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH);
+	}
 
 out:
 	sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, 0);
@@ -369,6 +446,7 @@ static int sun4i_spi_runtime_suspend(struct device *dev)
 
 static int sun4i_spi_probe(struct platform_device *pdev)
 {
+	struct dma_slave_config dma_sconfig;
 	struct spi_master *master;
 	struct sun4i_spi *sspi;
 	struct resource	*res;
@@ -404,6 +482,7 @@ static int sun4i_spi_probe(struct platform_device *pdev)
 		goto err_free_master;
 	}
 
+	init_completion(&sspi->done);
 	sspi->master = master;
 	master->max_speed_hz = 100*1000*1000;
 	master->min_speed_hz =        3*1000;
@@ -430,8 +509,55 @@ static int sun4i_spi_probe(struct platform_device *pdev)
 		goto err_free_master;
 	}
 
-	init_completion(&sspi->done);
+	master->dma_tx = dma_request_slave_channel_reason(&pdev->dev, "tx");
+	if (IS_ERR(master->dma_tx)) {
+		dev_err(&pdev->dev, "Unable to acquire DMA channel TX\n");
+		ret = PTR_ERR(master->dma_tx);
+		master->dma_tx = NULL;
+		goto wakeup;
+	}
+
+	dma_sconfig.direction = DMA_MEM_TO_DEV;
+	dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
+	dma_sconfig.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
+	dma_sconfig.dst_addr = res->start + SUN4I_TXDATA_REG;
+	dma_sconfig.src_maxburst = 1;
+	dma_sconfig.dst_maxburst = 1;
 
+	ret = dmaengine_slave_config(master->dma_tx, &dma_sconfig);
+	if (ret) {
+		dev_err(&pdev->dev, "Unable to configure TX DMA slave\n");
+		goto err_tx_dma_release;
+	}
+
+	master->dma_rx = dma_request_slave_channel_reason(&pdev->dev, "rx");
+	if (IS_ERR(master->dma_rx)) {
+		dev_err(&pdev->dev, "Unable to acquire DMA channel RX\n");
+		ret = PTR_ERR(master->dma_rx);
+		goto err_tx_dma_release;
+	}
+
+	dma_sconfig.direction = DMA_DEV_TO_MEM;
+	dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
+	dma_sconfig.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
+	dma_sconfig.src_addr = res->start + SUN4I_RXDATA_REG;
+	dma_sconfig.src_maxburst = 1;
+	dma_sconfig.dst_maxburst = 1;
+
+	ret = dmaengine_slave_config(master->dma_rx, &dma_sconfig);
+	if (ret) {
+		dev_err(&pdev->dev, "Unable to configure RX DMA slave\n");
+		goto err_rx_dma_release;
+	}
+
+	/* This is a bit dodgy. If you set can_dma then map_msg in spi.c
+	 * apparently dereferences your dma channels if non-NULL even if your
+	 * can_dma never returns true (and crashes if the channel is an error
+	 * pointer). So just don't set can_dma unless both channels are valid.
+	 */
+	master->can_dma = sun4i_spi_can_dma;
+	master->max_transfer_size = NULL; /* no known limit */
+wakeup:
 	/*
 	 * This wake-up/shutdown pattern is to be able to have the
 	 * device woken up, even if runtime_pm is disabled
@@ -454,18 +580,37 @@ static int sun4i_spi_probe(struct platform_device *pdev)
 
 	return 0;
 
+err_rx_dma_release:
+	dma_release_channel(master->dma_rx);
+err_tx_dma_release:
+	dma_release_channel(master->dma_tx);
+	master->dma_tx = NULL;
+	master->dma_rx = NULL;
+	goto wakeup;
+
 err_pm_disable:
 	pm_runtime_disable(&pdev->dev);
 	sun4i_spi_runtime_suspend(&pdev->dev);
 err_free_master:
+	if (master->can_dma) {
+		dma_release_channel(master->dma_rx);
+		dma_release_channel(master->dma_tx);
+	}
 	spi_master_put(master);
 	return ret;
 }
 
 static int sun4i_spi_remove(struct platform_device *pdev)
 {
+	struct spi_master *master = platform_get_drvdata(pdev);
+
 	pm_runtime_disable(&pdev->dev);
 
+	if (master->can_dma) {
+		dma_release_channel(master->dma_rx);
+		dma_release_channel(master->dma_tx);
+	}
+
 	return 0;
 }
 
Signature · 1 line
2.8.1
maintainer
#18 lore raw

Re: [PATCH 5/5] RFC spi: sun4i: add DMA support

Quoted 4 lines · Michal Suchanek

- fallback to previous behaviour when DMA initialization fails

+ this has the problem that when the driver happens to load before the dma driver it will not use dma - can be addressed with a module parameter

No, you should pay attention to the error you are getting and let probe
deferral happen if that's the error you get.
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#19 lore raw

Re: [PATCH 5/5] RFC spi: sun4i: add DMA support

Hi Mark,

Quoted 8 lines · Mark Brown
Quoted 4 lines · Michal Suchanek

- fallback to previous behaviour when DMA initialization fails

+ this has the problem that when the driver happens to load before the dma driver it will not use dma - can be addressed with a module parameter

No, you should pay attention to the error you are getting and let probe deferral happen if that's the error you get.

Unfortunately DMA is an optional feature.

There's no way to distinguish between -EPROBE_DEFER due to the SPI master driver being probed before the DMA engine driver, and -EPROBE_DEFER due to support for the DMA engine not having been compiled in.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

maintainer
#20 lore raw

Re: [PATCH 5/5] RFC spi: sun4i: add DMA support

Quoted 7 lines · Geert Uytterhoeven
Quoted 5 lines · Mark Brown
Quoted 4 lines · Michal Suchanek

- fallback to previous behaviour when DMA initialization fails

+ this has the problem that when the driver happens to load before the dma driver it will not use dma - can be addressed with a module parameter

Quoted 8 lines
Quoted 2 lines

No, you should pay attention to the error you are getting and let probe deferral happen if that's the error you get.

Unfortunately DMA is an optional feature.

There's no way to distinguish between -EPROBE_DEFER due to the SPI master driver being probed before the DMA engine driver, and -EPROBE_DEFER due to support for the DMA engine not having been compiled in.

I really don't think it's worth caring too much about cases where the
DMA driver hasn't been compiled in, it's not like SPI is the only thing
that's going to be using it. I really think it's better to defer the
problem - not getting DMA (or worse, only getting DMA on some boots) is
not great and if people are optimising on that level my feeling is that
they're probably going to be OK with customizing DT to match. Ideally
we would have something a bit nicer than deferred probe but right now
this seems the more helpful option.
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#21 lore raw

Re: [PATCH 5/5] RFC spi: sun4i: add DMA support

Hello,

Quoted 17 lines · Mark Brown
Quoted 7 lines · Geert Uytterhoeven
Quoted 5 lines · Mark Brown
Quoted 4 lines · Michal Suchanek

- fallback to previous behaviour when DMA initialization fails

+ this has the problem that when the driver happens to load before the dma driver it will not use dma - can be addressed with a module parameter

Quoted 8 lines
Quoted 2 lines

No, you should pay attention to the error you are getting and let probe deferral happen if that's the error you get.

Unfortunately DMA is an optional feature.

There's no way to distinguish between -EPROBE_DEFER due to the SPI master driver being probed before the DMA engine driver, and -EPROBE_DEFER due to support for the DMA engine not having been compiled in.

Quoted 8 lines

I really don't think it's worth caring too much about cases where the DMA driver hasn't been compiled in, it's not like SPI is the only thing that's going to be using it. I really think it's better to defer the problem - not getting DMA (or worse, only getting DMA on some boots) is not great and if people are optimising on that level my feeling is that they're probably going to be OK with customizing DT to match. Ideally we would have something a bit nicer than deferred probe but right now this seems the more helpful option.

It's what the driver did to start with and it was requested to fall back to non-DMA in the case DMA is not available.

We get to the much discussed problem that it's never possible to tell if a driver is available or not.

It's possible to add a parameter like require_dma which could be used to load the driver without dma if unset. If it was set by default then driver ordering is not important so long as dma driver is loaded eventually. Also an informative print that such parameter exists when probing the driver is deferred would be helpful. It would probably create quite a bit of log spam, however. The driver can be deferred several times during boot.

Thanks

Michal

maintainer
#22 lore raw

Re: [PATCH 5/5] RFC spi: sun4i: add DMA support

Quoted 7 lines · Michal Suchanek
Quoted 2 lines · Mark Brown

I really don't think it's worth caring too much about cases where the DMA driver hasn't been compiled in, it's not like SPI is the only thing

It's what the driver did to start with and it was requested to fall back to non-DMA in the case DMA is not available.

Why? I really can't see any sensible use case for this that doesn't have a better solution available.

Quoted 7 lines

It's possible to add a parameter like require_dma which could be used to load the driver without dma if unset. If it was set by default then driver ordering is not important so long as dma driver is loaded eventually. Also an informative print that such parameter exists when probing the driver is deferred would be helpful. It would probably create quite a bit of log spam, however. The driver can be deferred several times during boot.

That seems fairly hacky, if we were going to do anything like that it should be the other way around so that we default to trying to use resources and even then it seems like something that should be handled at a framework level rather than having random options in individual drivers to ignore things. Having things behave inconsistently between different drivers is going to lead to a worse user experience and if this is a good idea for one driver it seems like it'd be a good idea for all of them.

But really
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#23 lore raw

Re: [PATCH 5/5] RFC spi: sun4i: add DMA support

Quoted 11 lines · Mark Brown
Quoted 7 lines · Michal Suchanek
Quoted 2 lines · Mark Brown

I really don't think it's worth caring too much about cases where the DMA driver hasn't been compiled in, it's not like SPI is the only thing

It's what the driver did to start with and it was requested to fall back to non-DMA in the case DMA is not available.

Why? I really can't see any sensible use case for this that doesn't have a better solution available.

Of course, the solution is to compile in the DMA driver.

It's been argued that some drivers which use only short transfers will just work.

Quoted 9 lines
Quoted 8 lines

It's possible to add a parameter like require_dma which could be used to load the driver without dma if unset. If it was set by default then driver ordering is not important so long as dma driver is loaded eventually. Also an informative print that such parameter exists when probing the driver is deferred would be helpful. It would probably create quite a bit of log spam, however. The driver can be deferred several times during boot.

Quoted 8 lines

That seems fairly hacky, if we were going to do anything like that it should be the other way around so that we default to trying to use resources and even then it seems like something that should be handled at a framework level rather than having random options in individual drivers to ignore things. Having things behave inconsistently between different drivers is going to lead to a worse user experience and if this is a good idea for one driver it seems like it'd be a good idea for all of them.

Hacky but doable if desirable. It's awesome for testing SPI transfer fragmentation with different drivers ;-)

The previous discussion of this driver is here
http://thread.gmane.org/gmane.linux.kernel/2162327

Thanks

Michal

maintainer
#24 lore raw

Re: [PATCH 5/5] RFC spi: sun4i: add DMA support

Quoted 6 lines · Michal Suchanek
Quoted 4 lines · Mark Brown
Quoted 2 lines · Michal Suchanek

It's what the driver did to start with and it was requested to fall back to non-DMA in the case DMA is not available.

Quoted 7 lines
Quoted 2 lines

Why? I really can't see any sensible use case for this that doesn't have a better solution available.

Of course, the solution is to compile in the DMA driver.

It's been argued that some drivers which use only short transfers will just work.

With nothing else in the system that needs DMA? It's making the
performance of the system less reliable for the benefit of a very narrow
use case.
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#25 lore raw

Re: [PATCH 5/5] RFC spi: sun4i: add DMA support

Quoted 10 lines · Mark Brown
Quoted 8 lines · Michal Suchanek
Quoted 7 lines · Mark Brown
Quoted 2 lines · Michal Suchanek

It's what the driver did to start with and it was requested to fall back to non-DMA in the case DMA is not available.

Why? I really can't see any sensible use case for this that doesn't have a better solution available.

Quoted 8 lines
Quoted 4 lines

Of course, the solution is to compile in the DMA driver.

It's been argued that some drivers which use only short transfers will just work.

With nothing else in the system that needs DMA? It's making the performance of the system less reliable for the benefit of a very narrow use case.

Some of the platform devices have dedicated DMA *controller* built into the device IP so the DMA engine really is optional on many sunxi devices. Besides SPI you definitely need the DMA engine for audio. You probably don't need it for storage and graphics. I don't have any idea if it's used for USB and Ethernet.

Thanks

Michal

#26 lore raw

Re: [PATCH 5/5] RFC spi: sun4i: add DMA support

Quoted 20 lines · Michal Suchanek
Quoted 10 lines · Mark Brown
Quoted 8 lines · Michal Suchanek
Quoted 7 lines · Mark Brown
Quoted 2 lines · Michal Suchanek

It's what the driver did to start with and it was requested to fall back to non-DMA in the case DMA is not available.

Why? I really can't see any sensible use case for this that doesn't have a better solution available.

Quoted 8 lines
Quoted 4 lines

Of course, the solution is to compile in the DMA driver.

It's been argued that some drivers which use only short transfers will just work.

With nothing else in the system that needs DMA? It's making the performance of the system less reliable for the benefit of a very narrow use case.

Quoted 5 lines

Some of the platform devices have dedicated DMA *controller* built into the device IP so the DMA engine really is optional on many sunxi devices. Besides SPI you definitely need the DMA engine for audio. You probably don't need it for storage and graphics. I don't have any idea if it's used for USB and Ethernet.

USB and Ethernet have their own dedicated DMA engines. So currently, the only driver that requires it is the audio codec.

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#27 lore raw

Re: [PATCH 5/5] RFC spi: sun4i: add DMA support

In reply to Mark Brown

Hi,

Quoted 11 lines · Mark Brown
Quoted 7 lines · Michal Suchanek
Quoted 2 lines · Mark Brown

I really don't think it's worth caring too much about cases where the DMA driver hasn't been compiled in, it's not like SPI is the only thing

It's what the driver did to start with and it was requested to fall back to non-DMA in the case DMA is not available.

Why? I really can't see any sensible use case for this that doesn't have a better solution available.

SPI works just fine without DMA, which might just be considered an (optional) optimisation.

We've been using it without DMA for years now, and it was working just fine, and it will work even better with the other patches in this serie. There's no reason to add a hard dependency on something that we don't really need.

Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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#28 lore raw

Re: [linux-sunxi] Re: [PATCH 5/5] RFC spi: sun4i: add DMA support

Quoted 23 lines · Maxime Ripard

Hi,

Quoted 11 lines · Mark Brown
Quoted 9 lines · Michal Suchanek
Quoted 5 lines · Mark Brown

I really don't think it's worth caring too much about cases where the
DMA driver hasn't been compiled in, it's not like SPI is the only thing

Quoted 6 lines
Quoted 3 lines

It's what the driver did to start with and it was requested to fall
back to non-DMA in the case DMA is not available.

Why???I really can't see any sensible use case for this that doesn't
have a better solution available.

SPI works just fine without DMA, which might just be considered an (optional) optimisation.

Quoted 7 lines

We've been using it without DMA for years now, and it was working just
fine, and it will work even better with the other patches in this serie. There's no reason to add a hard dependency on something that we
don't really need.

Actually it non-DMA case works fine if you don't need SPI transfers larger than?SUN4I_FIFO_DEPTH - 1, which is 63 bytes.

This was addressed by this patch, but was never applied:
http://permalink.gmane.org/gmane.linux.kernel.spi.devel/18950

maintainer
#29 lore raw

Re: [linux-sunxi] Re: [PATCH 5/5] RFC spi: sun4i: add DMA support

Quoted 2 lines · Priit Laes

This was addressed by this patch, but was never applied:
http://permalink.gmane.org/gmane.linux.kernel.spi.devel/18950

I've never seen that patch before, if it was CCed to me there's a good
chance it'd have been deleted unread because you put ARM: at the start
of the subject line which says it's a patch for arch/arm. You'll need
to resubmit.
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#30 lore raw

Re: [linux-sunxi] Re: [PATCH 5/5] RFC spi: sun4i: add DMA support

In reply to Priit Laes
Quoted 32 lines · Priit Laes
Quoted 23 lines · Maxime Ripard

Hi,

Quoted 11 lines · Mark Brown
Quoted 9 lines · Michal Suchanek
Quoted 5 lines · Mark Brown

I really don't think it's worth caring too much about cases where the
DMA driver hasn't been compiled in, it's not like SPI is the only thing

Quoted 6 lines
Quoted 3 lines

It's what the driver did to start with and it was requested to fall
back to non-DMA in the case DMA is not available.

Why? I really can't see any sensible use case for this that doesn't
have a better solution available.

SPI works just fine without DMA, which might just be considered an (optional) optimisation.

Quoted 7 lines

We've been using it without DMA for years now, and it was working just
fine, and it will work even better with the other patches in this serie. There's no reason to add a hard dependency on something that we
don't really need.

Quoted 5 lines

Actually it non-DMA case works fine if you don't need SPI transfers larger than SUN4I_FIFO_DEPTH - 1, which is 63 bytes.

This was addressed by this patch, but was never applied:
http://permalink.gmane.org/gmane.linux.kernel.spi.devel/18950

And the code added in that patch will never run unless you

1) use long spi transfers
2) compile in/load SPI without DMA support

There is no reason for doing 2) since we have do DMA support for sunxi.

So that's another code path that needs maintenance and testing and likely will not get it.

Thanks

Michal

maintainer
#31 lore raw

Re: [linux-sunxi] Re: [PATCH 5/5] RFC spi: sun4i: add DMA support

Quoted 9 lines · Michal Suchanek
Quoted 7 lines · Priit Laes

On Wed, 2016-06-01 at 20:00 +0200, Maxime Ripard wrote:

Actually it non-DMA case works fine if you don't need SPI transfers larger than SUN4I_FIFO_DEPTH - 1, which is 63 bytes.

This was addressed by this patch, but was never applied:
http://permalink.gmane.org/gmane.linux.kernel.spi.devel/18950

Quoted 6 lines

And the code added in that patch will never run unless you

1) use long spi transfers
2) compile in/load SPI without DMA support

There is no reason for doing 2) since we have do DMA support for sunxi.

Well, presumably such code exists and is being worked on?

Quoted 2 lines

So that's another code path that needs maintenance and testing and likely will not get it.

Oh, come on. You might not want to use it yourself but the chances are that someone will want to use it just like the situation with all the other SPI drivers. It's a perfectly reasonable and sensible feature to support upstream.

I really do not understand why there is such a strong desire to have
these devices be a special snowflake here, the worst that's likely to
happen here is that you're going to end up having to either remove the
DMA controller from the DT or load the driver for it neither of which
seem like the end of the world.
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#32 lore raw

Re: [linux-sunxi] Re: [PATCH 5/5] RFC spi: sun4i: add DMA support

Quoted 10 lines · Mark Brown
Quoted 8 lines · Michal Suchanek
Quoted 7 lines · Priit Laes

On Wed, 2016-06-01 at 20:00 +0200, Maxime Ripard wrote:

Actually it non-DMA case works fine if you don't need SPI transfers larger than SUN4I_FIFO_DEPTH - 1, which is 63 bytes.

This was addressed by this patch, but was never applied:
http://permalink.gmane.org/gmane.linux.kernel.spi.devel/18950

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And the code added in that patch will never run unless you

1) use long spi transfers
2) compile in/load SPI without DMA support

There is no reason for doing 2) since we have do DMA support for sunxi.

Well, presumably such code exists and is being worked on?

Which code are you referring to?

This is a reply to patch which adds DMA support to the SPI driver so that it can work for arbitrarily long transfers.

So there is code for fully working driver.

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So that's another code path that needs maintenance and testing and likely will not get it.

Oh, come on. You might not want to use it yourself but the chances are that someone will want to use it just like the situation with all the other SPI drivers. It's a perfectly reasonable and sensible feature to support upstream.

Is it?

Once we have *one* driver that works for arbitrarily long transfers and it works out of the box with the board defconfig 99% of people who will use the SPI driver for anything will use this driver. Any other variant will go untested.

And for the driver to also work without DMA you have to *tell* it to probe without DMA because it cannot know you are not going to load a DMA driver later.

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I really do not understand why there is such a strong desire to have these devices be a special snowflake here, the worst that's likely to happen here is that you're going to end up having to either remove the DMA controller from the DT or load the driver for it neither of which seem like the end of the world.

Why would you do that?

Thanks

Michal

maintainer
#33 lore raw

Re: [linux-sunxi] Re: [PATCH 5/5] RFC spi: sun4i: add DMA support

Quoted 8 lines · Michal Suchanek
Quoted 6 lines · Mark Brown
Quoted 4 lines · Michal Suchanek

And the code added in that patch will never run unless you

1) use long spi transfers
2) compile in/load SPI without DMA support

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There is no reason for doing 2) since we have do DMA support for sunxi.

Well, presumably such code exists and is being worked on?

Which code are you referring to?

This is a reply to patch which adds DMA support to the SPI driver so that it can work for arbitrarily long transfers.

It sounded like there might be a missing DMA driver? Though I think I was misreading the above.

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Oh, come on. You might not want to use it yourself but the chances are that someone will want to use it just like the situation with all the other SPI drivers. It's a perfectly reasonable and sensible feature to support upstream.

Is it?

Once we have *one* driver that works for arbitrarily long transfers and it works out of the box with the board defconfig 99% of people who will use the SPI driver for anything will use this driver. Any other variant will go untested.

We don't want multiple drivers for this and general maintainability reasons, I'm not sure where the idea that we might want multiple drivers came from?

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And for the driver to also work without DMA you have to *tell* it to probe without DMA because it cannot know you are not going to load a DMA driver later.

Yes. This puts the cost on the special snowflake systems that absolutely cannot have any DMA support in their systems for some reason while keeping the driver featureful by default, and keeps that cost fairly small.

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I really do not understand why there is such a strong desire to have these devices be a special snowflake here, the worst that's likely to happen here is that you're going to end up having to either remove the DMA controller from the DT or load the driver for it neither of which seem like the end of the world.

Why would you do that?

Like I say I really don't understand why this is. I'm just saying there
are ways to do this fairly simply if people really want it on their
systems.
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