ARM: dts: dra7: Add OCMCRAM nodes

Hi,
This series adds ocmcram nodes to use the mmio-sram driver to dra7.dtsi for use by all dra7xx and am57xx platforms. Not all ocmcram regions are present on every SoC variant so all possible nodes are added to the parent dtsi with the optional nodes marked "disabled". Board dts files that are known to have silicon supporting them can then enable them as needed.

Patch two adds a "dummy" reserved region in the ocmcram1 node that acts as a placeholder for the region that is needed by secure software running on secure variants of the SoC. It is left as size zero with the intention that either:

- The bootloader will step in and adjust the size based on what the secure software that is in use requires.
- A board dts with specific requirements will override the node with appropriate size.

The SRAM bindings in use are described in this patch [1] that is part of a series that adds SRAM regions for OMAP3 platforms.

Regards,
Dave

[1] http://marc.info/?l=linux-omap&m=146283061230440&w=2

Dave Gerlach (2):
ARM: dts: dra7: Add ocmcram nodes
ARM: dts: dra7: Add ti,secure-ram node to ocmcram1 node

 arch/arm/boot/dts/dra7.dtsi | 47 +++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 47 insertions(+)

2.7.3

Add all ocmcram nodes to dra7.dtsi using the generic mmio-sram driver. DRA7xx and AM57xx families of SoCs can contain three ocmcram regions of SRAM, one of 512kb and also an optional two additional of 1Mb each. Mark the two additional 1MB regions of SRAM as disabled as only ocmcmram1 is on all variants of the SoCs, then depending on which specific variant is in use the ocmcram2 and ocmcram3 nodes can be enabled in the board dts file if the data manual for that part number indicates the ocmcram region is available.

---
 arch/arm/boot/dts/dra7.dtsi | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

index 13ac88279427..fd6f74856bd3 100644
@@ -286,6 +286,38 @@
 			};
 		};
 
+		ocmcram1: ocmcram at 40300000 {
+			compatible = "mmio-sram";
+			reg = <0x40300000 0x80000>;
+			ranges = <0x0 0x40300000 0x80000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+		};
+
+		/*
+		 * NOTE: ocmcram2 and ocmcram3 are not available on all
+		 * DRA7xx and AM57xx variants. Confirm availability in
+		 * the data manual for the exact part number in use
+		 * before enabling these nodes in the board dts file.
+		 */
+		ocmcram2: ocmcram at 40400000 {
+			status = "disabled";
+			compatible = "mmio-sram";
+			reg = <0x40400000 0x100000>;
+			ranges = <0x0 0x40400000 0x100000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+		};
+
+		ocmcram3: ocmcram at 40500000 {
+			status = "disabled";
+			compatible = "mmio-sram";
+			reg = <0x40500000 0x100000>;
+			ranges = <0x0 0x40500000 0x100000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+		};
+
 		bandgap: bandgap at 4a0021e0 {
 			reg = <0x4a0021e0 0xc
 				0x4a00232c 0xc

2.7.3

Regards,

--
Andreas Dannenberg
Texas Instruments Inc

Secure variants of DRA7xx and AM57xx SoCs may need to reserve a region of the SRAM for use by secure software. To account for this, add a child node to the ocmcram1 node that will act as a placeholder at the start of the SRAM for the reserved region of memory that may be required by secure services. The node is added with size 0 so that by default parts will have the full space available but the bootloader or board dts file is able to resize the node as needed depending on how much reserved space is needed, if any, so end users of the ocmcram1 region on HS parts must be aware that a smaller amount of SRAM than expected may be available.

---
 arch/arm/boot/dts/dra7.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

index fd6f74856bd3..f46a265ce315 100644
@@ -292,6 +292,21 @@
 			ranges = <0x0 0x40300000 0x80000>;
 			#address-cells = <1>;
 			#size-cells = <1>;
+			/*
+			 * This is a placeholder for an optional reserved
+			 * region for use by secure software. The size
+			 * of this region is not known until runtime so it
+			 * is set as zero to either be updated to reserve
+			 * space or left unchanged to leave all SRAM for use.
+			 * On HS parts that that require the reserved region
+			 * either the bootloader can update the size to
+			 * the required amount or the node can be overridden
+			 * from the board dts file for the secure platform.
+			 */
+			sram-hs at 0 {
+				compatible = "ti,secure-ram";
+				reg = <0x0 0x0>;
+			};
 		};
 
 		/*

2.7.3

--
Andreas Dannenberg
Texas Instruments Inc

Applying these two into omap-for-v4.8/dt thanks.

Tony