x86 fixes
Subsystems (2)
Linus,
Please pull the latest x86-urgent-for-linus git tree from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86-urgent-for-linus
# HEAD: 9d98bcec731756b8688b59ec998707924d716d7b x86/ioapic: Fix incorrect pointers in ioapic_setup_resources()
Misc fixes from all around the map, plus a commit that introduces a new header of Intel model name symbols (unused) that will make the next merge window easier - I hope that one is fine.
Thanks,
Ingo
------------------>
Andy Lutomirski (1):
x86/entry/traps: Don't force in_interrupt() to return true in IST handlers
Borislav Petkov (1):
x86/cpu/AMD: Extend X86_FEATURE_TOPOEXT workaround to newer models
Dave Hansen (1):
x86/cpu/intel: Introduce macros for Intel family numbers
Dr. David Alan Gilbert (1):
x86/msr: Use the proper trace point conditional for writes
H. Peter Anvin (1):
x86, build: copy ldlinux.c32 to image.iso
Rui Wang (1):
x86/ioapic: Fix incorrect pointers in ioapic_setup_resources()
arch/x86/boot/Makefile | 3 ++ arch/x86/include/asm/intel-family.h | 68 +++++++++++++++++++++++++++++++++++++ arch/x86/include/asm/msr.h | 4 +-- arch/x86/kernel/apic/io_apic.c | 2 +- arch/x86/kernel/cpu/amd.c | 4 +-- arch/x86/kernel/traps.c | 20 +++++------ 6 files changed, 86 insertions(+), 15 deletions(-) create mode 100644 arch/x86/include/asm/intel-family.h
arch/x86/boot/Makefile +3 -0
@@ -162,6 +162,9 @@ isoimage: $(obj)/bzImage for i in lib lib64 share end ; do \ if [ -f /usr/$$i/syslinux/isolinux.bin ] ; then \ cp /usr/$$i/syslinux/isolinux.bin $(obj)/isoimage ; \ + if [ -f /usr/$$i/syslinux/ldlinux.c32 ]; then \ + cp /usr/$$i/syslinux/ldlinux.c32 $(obj)/isoimage ; \ + fi ; \ break ; \ fi ; \ if [ $$i = end ] ; then exit 1 ; fi ; \
arch/x86/include/asm/intel-family.h new file +68 -0
68 lines not on this page · raw message
arch/x86/include/asm/msr.h +2 -2
@@ -122,7 +122,7 @@ notrace static inline void native_write_msr(unsigned int msr, "2:\n" _ASM_EXTABLE_HANDLE(1b, 2b, ex_handler_wrmsr_unsafe) : : "c" (msr), "a"(low), "d" (high) : "memory"); -if (msr_tracepoint_active (__tracepoint_read_msr)) +if (msr_tracepoint_active (__tracepoint_write_msr))do_trace_write_msr (msr, ((u64 )high <<32 | low),0 ); }
@@ -141,7 +141,7 @@ notrace static inline int native_write_msr_safe(unsigned int msr, : "c" (msr), "0" (low), "d" (high), [fault] "i" (-EIO) : "memory"); -if (msr_tracepoint_active (__tracepoint_read_msr)) +if (msr_tracepoint_active (__tracepoint_write_msr))do_trace_write_msr (msr, ((u64 )high <<32 | low), err);return err; }
arch/x86/kernel/apic/io_apic.c +1 -1
@@ -2588,8 +2588,8 @@ static struct resource * __init ioapic_setup_resources(void) res[num].flags =IORESOURCE_MEM |IORESOURCE_BUSY ;snprintf (mem,IOAPIC_RESOURCE_NAME_SIZE ,"IOAPIC %u" , i); mem +=IOAPIC_RESOURCE_NAME_SIZE ; + ioapics[i].iomem_res = &res[num]; num++; - ioapics[i].iomem_res = res; } ioapic_resources = res;
arch/x86/kernel/cpu/amd.c +2 -2
@@ -674,14 +674,14 @@ static void init_amd_bd(struct cpuinfo_x86 *c)u64 value;/* re-enable TopologyExtensions if switched off by BIOS */ -if ((c->x86_model >=0x10 ) && (c->x86_model <=0x1f ) && +if ((c->x86_model >=0x10 ) && (c->x86_model <=0x6f ) && !cpu_has (c,X86_FEATURE_TOPOEXT )) {if (msr_set_bit (0xc0011005 ,54 ) >0 ) {rdmsrl (0xc0011005 , value);if (value &BIT_64 (54 )) {set_cpu_cap (c,X86_FEATURE_TOPOEXT ); -pr_info (FW_INFO "CPU: Re-enabling disabled Topology Extensions Support.\n" ); +pr_info_once (FW_INFO "CPU: Re-enabling disabled Topology Extensions Support.\n" ); } } }
arch/x86/kernel/traps.c +10 -10
@@ -96,6 +96,12 @@ static inline void cond_local_irq_disable(struct pt_regs *regs)local_irq_disable (); } +/* +* In IST context, we explicitly disable preemption. This serves two +* purposes: it makes it much less likely that we would accidentally +* schedule in IST context and it will force a warning if we somehow +* manage to schedule by accident. +*/ void ist_enter (struct pt_regs *regs) {if (user_mode (regs)) {
@@ -110,13 +116,7 @@ void ist_enter(struct pt_regs *regs)rcu_nmi_enter (); } -/* -* We are atomic because we're on the IST stack; or we're on -* x86_32, in which case we still shouldn't schedule; or we're -* on x86_64 and entered from user mode, in which case we're -* still atomic unless ist_begin_non_atomic is called. -*/ -preempt_count_add (HARDIRQ_OFFSET ); +preempt_disable ();/* This code is a bit fragile. Test it. */ RCU_LOCKDEP_WARN (!rcu_is_watching (),"ist_enter didn't work" );
@@ -124,7 +124,7 @@ void ist_enter(struct pt_regs *regs)void ist_exit (struct pt_regs *regs) { -preempt_count_sub (HARDIRQ_OFFSET ); +preempt_enable_no_resched ();if (!user_mode (regs))rcu_nmi_exit ();
@@ -155,7 +155,7 @@ void ist_begin_non_atomic(struct pt_regs *regs)BUG_ON ((unsigned long )(current_top_of_stack () -current_stack_pointer ()) >=THREAD_SIZE ); -preempt_count_sub (HARDIRQ_OFFSET ); +preempt_enable_no_resched (); }/**
@@ -165,7 +165,7 @@ void ist_begin_non_atomic(struct pt_regs *regs)*/ void ist_end_non_atomic (void ) { -preempt_count_add (HARDIRQ_OFFSET ); +preempt_disable (); }static nokprobe_inline int