APQ8060 Dragonboard support v2
Subsystems (3)
cover APQ8060 Dragonboard support v2
Second attempt at getting a baseline upstream for the APQ8060 Dragonboard, the original.
I now also add the first I2C block and two sensors to get some more peripherals running on it.
Switched to the hierarchical layout of DTS files.
This would be nice to have merged as a working baseline in the qcom tree.
Linus Walleij (7):
ARM: dts: add GPIO and MPP to MSM8660 PMIC
ARM: dts: add SDCC5 to Qualcomm MSM8660
ARM: dts: add L2CC and RPM with regulators for MSM8660
ARM: dts: add I2C block in GSBI12
ARM: dts: fix the MSM8660 RTC base address
ARM: dts: move the fixed MMC regulator to SURF board
ARM: dts: add Qualcomm APQ8060-based Dragonboard
arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/qcom-apq8060-dragonboard.dts | 626 +++++++++++++++++++++++++ arch/arm/boot/dts/qcom-msm8660-surf.dts | 11 + arch/arm/boot/dts/qcom-msm8660.dtsi | 166 ++++++- 4 files changed, 792 insertions(+), 12 deletions(-) create mode 100644 arch/arm/boot/dts/qcom-apq8060-dragonboard.dts
Signature · 1 line
2.4.11
PATCH 1/7 ARM: dts: add GPIO and MPP to MSM8660 PMIC
This adds the 8660 PMIC GPIO and MPP blocks to the MSM8660 DTSI. Verified against the vendor tree to be in these locations with these interrupts, tested on the APQ8060 Dragonboard.
--- arch/arm/boot/dts/qcom-msm8660.dtsi | 38 +++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+)
arch/arm/boot/dts/qcom-msm8660.dtsi +38 -0
@@ -143,6 +143,44 @@ #address-cells = <1>; #size-cells = <0>; + pm8058_gpio: gpio at 150 { + compatible = "qcom,pm8058-gpio", + "qcom,ssbi-gpio"; + reg = <0x150>; + interrupt-parent = <&pmicintc>; + interrupts = <192 1>, <193 1>, <194 1>, + <195 1>, <196 1>, <197 1>, + <198 1>, <199 1>, <200 1>, + <201 1>, <202 1>, <203 1>, + <204 1>, <205 1>, <206 1>, + <207 1>, <208 1>, <209 1>, + <210 1>, <211 1>, <212 1>, + <213 1>, <214 1>, <215 1>, + <216 1>, <217 1>, <218 1>, + <219 1>, <220 1>, <221 1>, + <222 1>, <223 1>, <224 1>, + <225 1>, <226 1>, <227 1>, + <228 1>, <229 1>, <230 1>, + <231 1>, <232 1>, <233 1>, + <234 1>, <235 1>; + gpio-controller; + #gpio-cells = <2>; + + }; + + pm8058_mpps: mpps at 50 { + compatible = "qcom,pm8058-mpp", + "qcom,ssbi-mpp"; + reg = <0x50>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&pmicintc>; + interrupts = + <128 1>, <129 1>, <130 1>, <131 1>, + <132 1>, <133 1>, <134 1>, <135 1>, + <136 1>, <137 1>, <138 1>, <139 1>; + }; + pwrkey at 1c { compatible = "qcom,pm8058-pwrkey"; reg = <0x1c>;
Signature · 1 line
2.4.11
PATCH 2/7 ARM: dts: add SDCC5 to Qualcomm MSM8660
In reply to Linus WalleijThe SDCC5 SD/MMC controller is used for a second uSD slot on the APQ8060 Dragonboard. On most other systems it is just dark silicon so define it and leave it as "disabled" in the core SoC file.
--- arch/arm/boot/dts/qcom-msm8660.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
arch/arm/boot/dts/qcom-msm8660.dtsi +16 -0
@@ -262,6 +262,22 @@ no-1-8-v; vmmc-supply = <&vsdcc_fixed>; }; + + sdcc5: sdcc at 12200000 { + compatible = "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x00051180>; + status = "disabled"; + reg = <0x12200000 0x8000>; + interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "cmd_irq"; + clocks = <&gcc SDC5_CLK>, <&gcc SDC5_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <4>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <48000000>; + vmmc-supply = <&vsdcc_fixed>; + }; }; tcsr: syscon at 1a400000 {
Signature · 1 line
2.4.11
PATCH 3/7 ARM: dts: add L2CC and RPM with regulators for MSM8660
In reply to Linus WalleijThis adds the L2CC IPC resource and RPM devices plus the nodes for the PM8901 and PM8058 regulators to the MSM8660 device tree. This was tested on the APQ8060 Dragonboard.
--- arch/arm/boot/dts/qcom-msm8660.dtsi | 89 +++++++++++++++++++++++++++++++++++++ 1 file changed, 89 insertions(+)
arch/arm/boot/dts/qcom-msm8660.dtsi +89 -0
@@ -215,6 +215,95 @@ }; }; + l2cc: clock-controller at 2082000 { + compatible = "syscon"; + reg = <0x02082000 0x1000>; + }; + + rpm: rpm at 104000 { + compatible = "qcom,rpm-msm8660"; + reg = <0x00104000 0x1000>; + qcom,ipc = <&l2cc 0x8 2>; + + interrupts = <GIC_SPI 19 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "ack", "err", "wakeup"; + clocks = <&gcc RPM_MSG_RAM_H_CLK>; + clock-names = "ram"; + + rpmcc: clock-controller { + compatible = "qcom,rpmcc-apq8660", "qcom,rpmcc"; + #clock-cells = <1>; + }; + + pm8901-regulators { + compatible = "qcom,rpm-pm8901-regulators"; + + pm8901_l0: l0 {}; + pm8901_l1: l1 {}; + pm8901_l2: l2 {}; + pm8901_l3: l3 {}; + pm8901_l4: l4 {}; + pm8901_l5: l5 {}; + pm8901_l6: l6 {}; + + /* S0 and S1 Handled as SAW regulators by SPM */ + pm8901_s2: s2 {}; + pm8901_s3: s3 {}; + pm8901_s4: s4 {}; + + pm8901_lvs0: lvs0 {}; + pm8901_lvs1: lvs1 {}; + pm8901_lvs2: lvs2 {}; + pm8901_lvs3: lvs3 {}; + + pm8901_mvs: mvs {}; + }; + + pm8058-regulators { + compatible = "qcom,rpm-pm8058-regulators"; + + pm8058_l0: l0 {}; + pm8058_l1: l1 {}; + pm8058_l2: l2 {}; + pm8058_l3: l3 {}; + pm8058_l4: l4 {}; + pm8058_l5: l5 {}; + pm8058_l6: l6 {}; + pm8058_l7: l7 {}; + pm8058_l8: l8 {}; + pm8058_l9: l9 {}; + pm8058_l10: l10 {}; + pm8058_l11: l11 {}; + pm8058_l12: l12 {}; + pm8058_l13: l13 {}; + pm8058_l14: l14 {}; + pm8058_l15: l15 {}; + pm8058_l16: l16 {}; + pm8058_l17: l17 {}; + pm8058_l18: l18 {}; + pm8058_l19: l19 {}; + pm8058_l20: l20 {}; + pm8058_l21: l21 {}; + pm8058_l22: l22 {}; + pm8058_l23: l23 {}; + pm8058_l24: l24 {}; + pm8058_l25: l25 {}; + + pm8058_s0: s0 {}; + pm8058_s1: s1 {}; + pm8058_s2: s2 {}; + pm8058_s3: s3 {}; + pm8058_s4: s4 {}; + + pm8058_lvs0: lvs0 {}; + pm8058_lvs1: lvs1 {}; + + pm8058_ncp: ncp {}; + }; + }; + /* Temporary fixed regulator */ vsdcc_fixed: vsdcc-regulator { compatible = "regulator-fixed";
Signature · 1 line
2.4.11
PATCH 3/7 ARM: dts: add L2CC and RPM with regulators for MSM8660
Quoted 6 lines · Linus Walleij
This adds the L2CC IPC resource and RPM devices plus the nodes for the PM8901 and PM8058 regulators to the MSM8660 device tree. This was tested on the APQ8060 Dragonboard.
Signed-off-by Linus Walleij <[email protected]>---
Signature · 2 lines
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH 3/3 ARM: dts: add Qualcomm APQ8060-based Dragonboard
In reply to Linus WalleijThis is the first Dragonboard based on APQ8060 and PM8058. It was produced in 2011 in cooperation between Qualcomm and BSQUARE.
--- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/qcom-apq8060-dragonboard.dts | 252 +++++++++++++++++++++++++ 2 files changed, 253 insertions(+) create mode 100644 arch/arm/boot/dts/qcom-apq8060-dragonboard.dts
arch/arm/boot/dts/Makefile +1 -0
@@ -572,6 +572,7 @@ dtb-$(CONFIG_ARCH_PRIMA2) += \ dtb-$(CONFIG_ARCH_OXNAS) += \ wd-mbwe.dtb dtb-$(CONFIG_ARCH_QCOM) += \ + qcom-apq8060-dragonboard.dtb \ qcom-apq8064-arrow-db600c.dtb \ qcom-apq8064-cm-qs600.dtb \ qcom-apq8064-ifc6410.dtb \
arch/arm/boot/dts/qcom-apq8060-dragonboard.dts new file +252 -0
252 lines not on this page · raw message
Signature · 1 line
2.4.11
PATCH 4/7 ARM: dts: add I2C block in GSBI12
In reply to Linus WalleijThe I2C block on the GSBI12 is used on the APQ8060 Dragonboard for sensors. Make it available in the chipset file.
Take this opportunity to fix the IRQ flag "0" to "NONE" using the IRQ DT include.
--- arch/arm/boot/dts/qcom-msm8660.dtsi | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-)
arch/arm/boot/dts/qcom-msm8660.dtsi +12 -1
@@ -122,11 +122,22 @@ compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; reg = <0x19c40000 0x1000>, <0x19c00000 0x1000>; - interrupts = <0 195 0x0>; + interrupts = <0 195 IRQ_TYPE_NONE>; clocks = <&gcc GSBI12_UART_CLK>, <&gcc GSBI12_H_CLK>; clock-names = "core", "iface"; status = "disabled"; }; + + gsbi12_i2c: i2c at 19c80000 { + compatible = "qcom,i2c-qup-v1.1.1"; + reg = <0x19c80000 0x1000>; + interrupts = <0 196 IRQ_TYPE_NONE>; + clocks = <&gcc GSBI12_QUP_CLK>, <&gcc GSBI12_H_CLK>; + clock-names = "core", "iface"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; qcom,ssbi at 500000 {
Signature · 1 line
2.4.11
PATCH 5/7 ARM: dts: fix the MSM8660 RTC base address
In reply to Linus WalleijThe RTC was defined on 0x11d but on the MSM8660/APQ8060 it is actually on 0x1e8. We were saved by the fact that the driver does not use the reg parameter: instead it uses the compatible string to figure out where the RTC is.
--- arch/arm/boot/dts/qcom-msm8660.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/boot/dts/qcom-msm8660.dtsi +2 -2
@@ -211,11 +211,11 @@ row-hold = <91500>; }; - rtc at 11d { + rtc at 1e8 { compatible = "qcom,pm8058-rtc"; + reg = <0x1e8>; interrupt-parent = <&pmicintc>; interrupts = <39 1>; - reg = <0x11d>; allow-set-time; };
Signature · 1 line
2.4.11
PATCH 5/7 ARM: dts: fix the MSM8660 RTC base address
Quoted 7 lines · Linus Walleij
The RTC was defined on
0x11dbut on the MSM8660/APQ8060 it is actually on0x1e8. We were saved by the fact that the driver does not use the reg parameter: instead it uses the compatible string to figure out where the RTC is.Signed-off-by Linus Walleij <[email protected]>---
Signature · 2 lines
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
PATCH 6/7 ARM: dts: move the fixed MMC regulator to SURF board
In reply to Linus WalleijThere is currently a fixed regulator in the .dtsi file for the MSM8660 chipset, used by the SURF board. We want to define real regulators for a board using this chipset, so push the fixed regulator down to the SURF board which is the only user.
--- arch/arm/boot/dts/qcom-msm8660-surf.dts | 11 +++++++++++ arch/arm/boot/dts/qcom-msm8660.dtsi | 12 ------------ 2 files changed, 11 insertions(+), 12 deletions(-)
arch/arm/boot/dts/qcom-msm8660-surf.dts +11 -0
@@ -23,15 +23,26 @@ }; }; + /* Temporary fixed regulator */ + vsdcc_fixed: vsdcc-regulator { + compatible = "regulator-fixed"; + regulator-name = "SDCC Power"; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <2700000>; + regulator-always-on; + }; + amba { /* eMMC */ sdcc1: sdcc at 12400000 { status = "okay"; + vmmc-supply = <&vsdcc_fixed>; }; /* External micro SD card */ sdcc3: sdcc at 12180000 { status = "okay"; + vmmc-supply = <&vsdcc_fixed>; }; }; };
arch/arm/boot/dts/qcom-msm8660.dtsi +0 -12
@@ -315,15 +315,6 @@ }; }; - /* Temporary fixed regulator */ - vsdcc_fixed: vsdcc-regulator { - compatible = "regulator-fixed"; - regulator-name = "SDCC Power"; - regulator-min-microvolt = <2700000>; - regulator-max-microvolt = <2700000>; - regulator-always-on; - }; - amba { compatible = "simple-bus"; #address-cells = <1>;
@@ -343,7 +334,6 @@ non-removable; cap-sd-highspeed; cap-mmc-highspeed; - vmmc-supply = <&vsdcc_fixed>; }; sdcc3: sdcc at 12180000 {
@@ -360,7 +350,6 @@ cap-mmc-highspeed; max-frequency = <48000000>; no-1-8-v; - vmmc-supply = <&vsdcc_fixed>; }; sdcc5: sdcc at 12200000 {
@@ -376,7 +365,6 @@ cap-sd-highspeed; cap-mmc-highspeed; max-frequency = <48000000>; - vmmc-supply = <&vsdcc_fixed>; }; };
Signature · 1 line
2.4.11
PATCH 7/7 ARM: dts: add Qualcomm APQ8060-based Dragonboard
In reply to Linus WalleijThis is the first Dragonboard based on APQ8060 and PM8058. It was produced in 2011 in cooperation between Qualcomm and BSQUARE.
---
ChangeLog v1->v2:
- Do not use phandles to define the board, keep the hierarchical structure of the other qcom DTS files.
- Move levelshifter under the regulators node.
- Do not pull up the GPIO for SDC3 card detect.
- Add the GSBI12 I2C channel and its pins.
- Add the AK8975 magnetometer on the GSBI12 I2C line.
- Add the BMP085 pressure sensor on the GSBI12 I2C line.
- Drop the @1 from the primary fixed regulator.
- Move the PMIC RTC reg value to 0x1e8 where is actually is.
--- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/qcom-apq8060-dragonboard.dts | 626 +++++++++++++++++++++++++ 2 files changed, 627 insertions(+) create mode 100644 arch/arm/boot/dts/qcom-apq8060-dragonboard.dts
arch/arm/boot/dts/Makefile +1 -0
@@ -572,6 +572,7 @@ dtb-$(CONFIG_ARCH_PRIMA2) += \ dtb-$(CONFIG_ARCH_OXNAS) += \ wd-mbwe.dtb dtb-$(CONFIG_ARCH_QCOM) += \ + qcom-apq8060-dragonboard.dtb \ qcom-apq8064-arrow-db600c.dtb \ qcom-apq8064-cm-qs600.dtb \ qcom-apq8064-ifc6410.dtb \
arch/arm/boot/dts/qcom-apq8060-dragonboard.dts new file +626 -0
626 lines not on this page · raw message
Signature · 1 line
2.4.11
cover APQ8060 Dragonboard support v2
In reply to Linus WalleijQuoted 10 lines · Linus Walleij
Second attempt at getting a baseline upstream for the APQ8060 Dragonboard, the original.
I now also add the first I2C block and two sensors to get some more peripherals running on it.
Switched to the hierarchical layout of DTS files.
This would be nice to have merged as a working baseline in the qcom tree.
Andy what is your take on this? Good enough?
Do you want me to resend as v4 with Stephen's et al's ACKs?
I have no other local changes AFAIK.
Yours,
Linus Walleij
cover APQ8060 Dragonboard support v2
Quoted 9 lines · Linus Walleij
Quoted 6 lines · Linus Walleij
Second attempt at getting a baseline upstream for the APQ8060 Dragonboard, the original.
I now also add the first I2C block and two sensors to get some more peripherals running on it.
Quoted 8 lines
Quoted 4 lines
Switched to the hierarchical layout of DTS files.
This would be nice to have merged as a working baseline in the qcom tree.
Andy what is your take on this? Good enough?
Do you want me to resend as v4 with Stephen's et al's ACKs?
They are in my pull request for 4.8. So no need for anything else.
Regards,
Andy
cover APQ8060 Dragonboard support v2
Quoted 12 lines · Andy Gross
Quoted 11 lines · Linus Walleij
Quoted 8 lines · Linus Walleij
Second attempt at getting a baseline upstream for the APQ8060 Dragonboard, the original.
I now also add the first I2C block and two sensors to get some more peripherals running on it.
Switched to the hierarchical layout of DTS files.
Quoted 8 lines
Quoted 6 lines
Quoted 2 lines
This would be nice to have merged as a working baseline in the qcom tree.
Andy what is your take on this? Good enough?
Do you want me to resend as v4 with Stephen's et al's ACKs?
They are in my pull request for 4.8. So no need for anything else.
Awesomeness. Thanks!
Yours,
Linus Walleij