dmaengine driver for Marvell XOR v2 engine

Hello,

Here is the fourth version of the mv_xor_v2 driver, which allows to use the XOR engines available on the Marvell Armada 7K/8K ARM64 SoCs.

Changes v3 -> v4:

- As requested by Vinod Koul, do not ask the engine to start processing the new descriptors in ->tx_submit(). Instead, only tell the engine to start processing the new descriptors in ->issue_pending().

Changes v2 -> v3:

- Add a SoC-specific compatible string to the DT binding, "marvell,armada-7k-xor". Suggested by Rob Herring.

- Rename the original compatible string from "marvell,mv-xor-v2" to "marvell,xor-v2", since the "marvell" and "mv" are redondant. Suggested by Rob Herring.

- Move the DT binding documentation in a separate patch, as requested by Vinod Koul and Rob Herring.

- Replace BUG_ON(src_cnt > MV_XOR_V2_CMD_LINE_NUM_MAX_D_BUF || src_cnt < 1); in mv_xor_v2_prep_dma_xor() by a non-crashing test, i.e. we simply return NULL. Suggested by Vinod Koul.

- Add support for an optional clock to the Device Tree binding and the driver. This is needed since there are two XOR units in the CP part of the Armada 7K/8K that use a gatable clock.

- Fix the mv_xor_v2_prep_sw_desc() function to not crash when the list of available descriptors is empty.

- Add MV_XOR_V2_ as the prefix of all register offset/bits definitions, as requested by Vinod Koul.

- Clearly indicate what MV_XOR_V2_DESC_NUM is, after a question from Vinod Koul.

- Switch from three spinlocks to only one spinlock, as suggested by Vinod Koul.

- Remove the CONFIG_ARCH_DMA_ADDR_T_64BIT conditionals, since the driver depends on ARM64, and CONFIG_ARCH_DMA_ADDR_T_64BIT is always enabled on ARM64. Follows a discussion with Vinod Koul.

- Remove useless empty mv_xor_v2_alloc_chan_resources() and mv_xor_v2_free_chan_resources() functions, as noticed by Vinod Koul.

- Add a check in mv_xor_v2_interrupt_handler() to make sure we really have something to do. Suggested by Vinod Koul.

- Simplify:

     dest_hw_desc = ((void *)xor_dev->hw_desq_virt +
                     (xor_dev->desc_size * desq_ptr));

into just:

     dest_hw_desc = xor_dev->hw_desq_virt + desq_ptr;

After adding a BUILD_BUG_ON() that makes sure that the size of "struct mv_xor_v2_descriptor" is equal to MV_XOR_V2_EXT_DESC_SIZE.

Follows a question from Vinod Koul.

- Remove mv_xor_v2_tx_status() and use dma_cookie_status() directly. Suggested by Vinod Koul.

Changes v1 -> v2:

- Add a "depends on ARM64" since the MSI infrastructure doesn't build on all architectures for the moment.

- Remove the useless .owner assignment.

Thanks!

Thomas

Thomas Petazzoni (4):
dt-bindings: dma: add binding for the Marvell XOR v2 engine
dma: mv_xor_v2: new driver
arm64: dts: marvell: adjust to the latest mv-xor-v2 DT binding
arm64: dts: marvell: add XOR engine description for Armada 7K/8K CP

 .../devicetree/bindings/dma/mv-xor-v2.txt          |  24 +
 arch/arm64/boot/dts/marvell/armada-ap806.dtsi      |   8 +-
 .../boot/dts/marvell/armada-cp110-master.dtsi      |  18 +
 drivers/dma/Kconfig                                |  14 +
 drivers/dma/Makefile                               |   1 +
 drivers/dma/mv_xor_v2.c                            | 879 +++++++++++++++++++++
 6 files changed, 940 insertions(+), 4 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/dma/mv-xor-v2.txt
 create mode 100644 drivers/dma/mv_xor_v2.c

2.7.4

This commit adds the Device Tree binding documentation for the Marvell XOR v2 engine, which is found on Marvell Armada 7K/8K ARM64 SoCs.

---
 .../devicetree/bindings/dma/mv-xor-v2.txt          | 24 ++++++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/dma/mv-xor-v2.txt

new file mode 100644
index 0000000..217a90e
@@ -0,0 +1,24 @@
+* Marvell XOR v2 engines
+
+Required properties:
+- compatible: one of the following values:
+    "marvell,armada-7k-xor"
+    "marvell,xor-v2"
+- reg: Should contain registers location and length (two sets)
+    the first set is the DMA registers
+    the second set is the global registers
+- msi-parent: Phandle to the MSI-capable interrupt controller used for
+  interrupts.
+
+Optional properties:
+- clocks: Optional reference to the clock used by the XOR engine.
+
+Example:
+
+	xor0 at 400000 {
+		compatible = "marvell,xor-v2";
+		reg = <0x400000 0x1000>,
+		      <0x410000 0x1000>;
+		msi-parent = <&gic_v2m0>;
+		dma-coherent;
+	};

2.7.4

The new mv_xor_v2 driver supports the XOR engines found in the 64-bits ARM from Marvell of the Armada 7K and Armada 8K family. This XOR engine is a completely new hardware block, entirely different from the one used on previous Marvell Armada platforms, which use the existing mv_xor driver.

---
 drivers/dma/Kconfig     |  14 +
 drivers/dma/Makefile    |   1 +
 drivers/dma/mv_xor_v2.c | 879 ++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 894 insertions(+)
 create mode 100644 drivers/dma/mv_xor_v2.c

index 8c98779..f6c46d0 100644
@@ -339,6 +339,20 @@ config MV_XOR
 	---help---
 	  Enable support for the Marvell XOR engine.
 
+config MV_XOR_V2
+	bool "Marvell XOR engine version 2 support "
+	depends on ARM64
+	select DMA_ENGINE
+	select DMA_ENGINE_RAID
+	select ASYNC_TX_ENABLE_CHANNEL_SWITCH
+	select GENERIC_MSI_IRQ_DOMAIN
+	---help---
+	  Enable support for the Marvell version 2 XOR engine.
+
+	  This engine provides acceleration for copy, XOR and RAID6
+	  operations, and is available on Marvell Armada 7K and 8K
+	  platforms.
+
 config MXS_DMA
 	bool "MXS DMA support"
 	depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q || SOC_IMX6UL

index 614f28b..e4dc9ca 100644
@@ -45,6 +45,7 @@ obj-$(CONFIG_MMP_TDMA) += mmp_tdma.o
 obj-$(CONFIG_MOXART_DMA) += moxart-dma.o
 obj-$(CONFIG_MPC512X_DMA) += mpc512x_dma.o
 obj-$(CONFIG_MV_XOR) += mv_xor.o
+obj-$(CONFIG_MV_XOR_V2) += mv_xor_v2.o
 obj-$(CONFIG_MXS_DMA) += mxs-dma.o
 obj-$(CONFIG_MX3_IPU) += ipu/
 obj-$(CONFIG_NBPFAXI_DMA) += nbpfaxi.o

2.7.4

As suggested by Rob Herring, we should:

1/ Use a SoC-specific compatible string in addition to the more generic
one.

2/ The generic compatible string has been changed from

    "marvell,mv-xor-v2" to "marvell,xor-v2".

We simply reflect the changes made to the Device Tree bindings to the relevant Marvell 7K/8K Device Tree files.

---
 arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

index 20d256b..eab1a42 100644
@@ -141,7 +141,7 @@
 			};
 
 			xor at 400000 {
-				compatible = "marvell,mv-xor-v2";
+				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 				reg = <0x400000 0x1000>,
 				      <0x410000 0x1000>;
 				msi-parent = <&gic_v2m0>;

@@ -149,7 +149,7 @@
 			};
 
 			xor at 420000 {
-				compatible = "marvell,mv-xor-v2";
+				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 				reg = <0x420000 0x1000>,
 				      <0x430000 0x1000>;
 				msi-parent = <&gic_v2m0>;

@@ -157,7 +157,7 @@
 			};
 
 			xor at 440000 {
-				compatible = "marvell,mv-xor-v2";
+				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 				reg = <0x440000 0x1000>,
 				      <0x450000 0x1000>;
 				msi-parent = <&gic_v2m0>;

@@ -165,7 +165,7 @@
 			};
 
 			xor at 460000 {
-				compatible = "marvell,mv-xor-v2";
+				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 				reg = <0x460000 0x1000>,
 				      <0x470000 0x1000>;
 				msi-parent = <&gic_v2m0>;

2.7.4

Hi Thomas,

Applied on mvebu/dt64

Thanks,

Gregory

Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

This commit adds the Device Tree description for the two XOR engines found in the CP part of the Armada 7K/8K SoC.

---
 arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

index 367138b..da31bbb 100644
@@ -107,6 +107,24 @@
 				status = "disabled";
 			};
 
+			cpm_xor0: xor at 6a0000 {
+				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
+				reg = <0x6a0000 0x1000>,
+				      <0x6b0000 0x1000>;
+				dma-coherent;
+				msi-parent = <&gic_v2m0>;
+				clocks = <&cpm_syscon0 1 8>;
+			};
+
+			cpm_xor1: xor at 6c0000 {
+				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
+				reg = <0x6c0000 0x1000>,
+				      <0x6d0000 0x1000>;
+				dma-coherent;
+				msi-parent = <&gic_v2m0>;
+				clocks = <&cpm_syscon0 1 7>;
+			};
+
 			cpm_spi0: spi at 700600 {
 				compatible = "marvell,armada-380-spi";
 				reg = <0x700600 0x50>;

2.7.4

Hi Thomas,

Applied on mvebu/dt64

Thanks,

Gregory

Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

Looks okay. But need ack on two ARM patches...

~Vinod

Hello,

Thanks for the review! Please don't take the two ARM patches in your tree, let the mvebu platform maintainer take them, to avoid conflicts.

So if you're happy with patches 1 and 2, could you take them? I'll talk with the mvebu platform maintainer (who is in Cc) to get patches 3 and 4 merged.

Thanks a lot!

Thomas

Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

Hello Vinod,

Now that the two ARM patches have been taken by the ARM mvebu maintainer, do you think you could merge the DT binding and driver patches (PATCH 1/2 and PATCH 2/2 of this series) ?

Thanks a lot!

Thomas

Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

Sorry for bit delay, I have applied them now :)

I modified commit of patch 2 for correcting subsystem name

While applying notice git warned of empty newline in the new file, have remove that as well

~Vinod

Hello,

Thanks a lot!

Thanks for those last minute fixes.

Best regards,

Thomas

Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com