Convert clk providers to clk_hw based APIs (part 1)

PATCH Applied Stephen Boyd 13 participants 85 messages Jun 1, 2016 – Sep 15, 2016

Subsystems (15)

Arm Qualcomm mailing list Common clk Arm STM32 Arm/Microchip (AT91) SoC support +11 more subsystems

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Stephen Boyd

author

2016-06-01 23:14 UTC #0 lore raw

cover Convert clk providers to clk_hw based APIs (part 1)

This is an initial set of patches to convert clk provider drivers over to the clk_hw based approach of registering clks. The foundational part of that has merged into v4.7-rc1 (see commit 58657d189a2f and it's children for details), so this series updates some drivers for the new registration style. Not all drivers are converted because this takes quite some time, but this should be a good chunk of it.

Stephen Boyd (34):
clk: qcom: Migrate to clk_hw based registration and OF APIs
clk: at91: Migrate to clk_hw based registration and OF APIs
clk: highbank: Migrate to clk_hw based registration and OF APIs
clk: bcm2835: Migrate to clk_hw based registration and OF APIs
clk: bcm: iproc: Migrate to clk_hw based registration and OF APIs
clk: bcm: kona: Migrate to clk_hw based registration and OF APIs
clk: berlin: Migrate to clk_hw based registration and OF APIs
clk: asm9260: Migrate to clk_hw based registration and OF APIs
clk: axi-clkgen: Migrate to clk_hw based OF and registration APIs
clk: axm5516: Migrate to clk_hw based OF and registration APIs
clk: cdce: Migrate to clk_hw based OF and registration APIs
clk: cdce925: Migrate to clk_hw based OF and provider APIs
clk: clps711x: Migrate to clk_hw based OF and registration APIs
clk: cs2000: Migrate to clk_hw based OF and registration APIs
clk: efm32gg: Migrate to clk_hw based OF and registration APIs
clk: ls1x: Migrate to clk_hw based OF and registration APIs
clk: maxgen: Migrate to clk_hw based OF and registration APIs
clk: mb86s7x: Migrate to clk_hw based OF and registration APIs
clk: moxart: Migrate to clk_hw based OF and registration APIs
clk: nomadik: Migrate to clk_hw based OF and registration APIs
clk: nspire: Migrate to clk_hw based OF and registration APIs
clk: palmas: Migrate to clk_hw based OF and registration APIs
clk: pwm: Migrate to clk_hw based OF and registration APIs
clk: rk808: Migrate to clk_hw based OF and registration APIs
clk: s2mps11: Migrate to clk_hw based OF and registration APIs
clk: scpi: Migrate to clk_hw based OF and registration APIs
clk: si514: Migrate to clk_hw based OF and registration APIs
clk: si5351: Migrate to clk_hw based OF and registration APIs
clk: si570: Migrate to clk_hw based OF and registration APIs
clk: stm32f3: Migrate to clk_hw based OF and registration APIs
clk: twl6040: Migrate to clk_hw based registration APIs
clk: u300: Migrate to clk_hw based registration APIs
clk: vt8500: Migrate to clk_hw based registration APIs
clk: wm831x: Migrate to clk_hw based registration APIs

 drivers/clk/at91/clk-generated.c    | 30 +++++++-----
 drivers/clk/at91/clk-h32mx.c        |  8 +--
 drivers/clk/at91/clk-main.c         | 88 +++++++++++++++++++--------------
 drivers/clk/at91/clk-master.c       | 21 ++++----
 drivers/clk/at91/clk-peripheral.c   | 39 +++++++++------
 drivers/clk/at91/clk-pll.c          | 21 ++++----
 drivers/clk/at91/clk-plldiv.c       | 24 ++++-----
 drivers/clk/at91/clk-programmable.c | 22 +++++----
 drivers/clk/at91/clk-slow.c         | 88 +++++++++++++++++++--------------
 drivers/clk/at91/clk-smd.c          | 22 +++++----
 drivers/clk/at91/clk-system.c       | 22 +++++----
 drivers/clk/at91/clk-usb.c          | 69 +++++++++++++++-----------
 drivers/clk/at91/clk-utmi.c         | 22 +++++----
 drivers/clk/bcm/clk-bcm2835-aux.c   | 28 +++++------
 drivers/clk/bcm/clk-bcm2835.c       | 83 +++++++++++++++++--------------
 drivers/clk/bcm/clk-iproc-armpll.c  |  9 ++--
 drivers/clk/bcm/clk-iproc-asiu.c    | 27 +++++-----
 drivers/clk/bcm/clk-iproc-pll.c     | 32 ++++++------
 drivers/clk/bcm/clk-kona-setup.c    | 76 +++++++++++++---------------
 drivers/clk/bcm/clk-kona.c          |  9 ++--
 drivers/clk/bcm/clk-kona.h          |  7 +--
 drivers/clk/berlin/berlin2-avpll.c  | 12 ++---
 drivers/clk/berlin/berlin2-avpll.h  |  8 +--
 drivers/clk/berlin/berlin2-div.c    |  4 +-
 drivers/clk/berlin/berlin2-div.h    |  4 +-
 drivers/clk/berlin/berlin2-pll.c    |  6 +--
 drivers/clk/berlin/berlin2-pll.h    |  5 +-
 drivers/clk/berlin/bg2.c            | 98 ++++++++++++++++++++-----------------
 drivers/clk/berlin/bg2q.c           | 39 ++++++++-------
 drivers/clk/clk-asm9260.c           | 31 +++++++-----
 drivers/clk/clk-axi-clkgen.c        | 12 ++---
 drivers/clk/clk-axm5516.c           | 39 +++++++--------
 drivers/clk/clk-cdce706.c           | 40 ++++++++-------
 drivers/clk/clk-cdce925.c           | 42 +++++++++-------
 drivers/clk/clk-clps711x.c          | 78 ++++++++++++++---------------
 drivers/clk/clk-cs2000-cp.c         | 16 +++---
 drivers/clk/clk-efm32gg.c           | 63 +++++++++++++-----------
 drivers/clk/clk-highbank.c          |  9 ++--
 drivers/clk/clk-ls1x.c              | 69 +++++++++++++-------------
 drivers/clk/clk-max-gen.c           | 64 ++++++++++++------------
 drivers/clk/clk-mb86s7x.c           | 16 +++---
 drivers/clk/clk-moxart.c            | 22 +++++----
 drivers/clk/clk-nomadik.c           | 48 +++++++++---------
 drivers/clk/clk-nspire.c            | 19 +++----
 drivers/clk/clk-palmas.c            | 12 ++---
 drivers/clk/clk-pwm.c               |  9 ++--
 drivers/clk/clk-rk808.c             | 42 ++++++++--------
 drivers/clk/clk-s2mps11.c           | 21 ++++----
 drivers/clk/clk-scpi.c              | 33 ++++++-------
 drivers/clk/clk-si514.c             | 11 ++---
 drivers/clk/clk-si5351.c            | 71 +++++++++++++++------------
 drivers/clk/clk-si570.c             | 13 +++--
 drivers/clk/clk-stm32f4.c           | 12 ++---
 drivers/clk/clk-twl6040.c           |  8 +--
 drivers/clk/clk-u300.c              | 59 ++++++++++++----------
 drivers/clk/clk-vt8500.c            | 22 +++++----
 drivers/clk/clk-wm831x.c            | 21 ++++----
 drivers/clk/qcom/clk-regmap.c       |  5 +-
 drivers/clk/qcom/clk-regmap.h       |  3 +-
 drivers/clk/qcom/common.c           | 58 ++++++++++++----------
 drivers/clk/qcom/gcc-msm8996.c      |  9 ++--
 drivers/clk/qcom/mmcc-msm8996.c     |  9 ++--
 62 files changed, 1004 insertions(+), 905 deletions(-)

Signature · 1 line

2.7.4

Stephen Boyd

author

2016-06-01 23:15 UTC #1 lore raw

PATCH 1/34 clk: qcom: Migrate to clk_hw based registration and OF APIs

Now that we have clk_hw based provider APIs to register clks, we can get rid of struct clk pointers in this driver, allowing us to move closer to a clear split of consumer and provider clk APIs.

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/qcom/clk-regmap.c   |  5 ++--
 drivers/clk/qcom/clk-regmap.h   |  3 +--
 drivers/clk/qcom/common.c       | 58 +++++++++++++++++++++++------------------
 drivers/clk/qcom/gcc-msm8996.c  |  9 +++----
 drivers/clk/qcom/mmcc-msm8996.c |  9 +++----
 5 files changed, 43 insertions(+), 41 deletions(-)

drivers/clk/qcom/clk-regmap.c +2 -3

index a58ba39a900c..1c856d330733 100644
@@ -101,14 +101,13 @@ EXPORT_SYMBOL_GPL(clk_disable_regmap);
  * clk_regmap struct via this function so that the regmap is initialized
  * and so that the clock is registered with the common clock framework.
  */
-struct clk *devm_clk_register_regmap(struct device *dev,
-				     struct clk_regmap *rclk)
+int devm_clk_register_regmap(struct device *dev, struct clk_regmap *rclk)
 {
 	if (dev && dev_get_regmap(dev, NULL))
 		rclk->regmap = dev_get_regmap(dev, NULL);
 	else if (dev && dev->parent)
 		rclk->regmap = dev_get_regmap(dev->parent, NULL);
 
-	return devm_clk_register(dev, &rclk->hw);
+	return devm_clk_hw_register(dev, &rclk->hw);
 }
 EXPORT_SYMBOL_GPL(devm_clk_register_regmap);

drivers/clk/qcom/clk-regmap.h +1 -2

index 491a63d537df..90d95cd11ec6 100644
@@ -39,7 +39,6 @@ struct clk_regmap {
 int clk_is_enabled_regmap(struct clk_hw *hw);
 int clk_enable_regmap(struct clk_hw *hw);
 void clk_disable_regmap(struct clk_hw *hw);
-struct clk *
-devm_clk_register_regmap(struct device *dev, struct clk_regmap *rclk);
+int devm_clk_register_regmap(struct device *dev, struct clk_regmap *rclk);
 
 #endif

drivers/clk/qcom/common.c +32 ~~-26~~

108 lines not on this page · raw message

drivers/clk/qcom/gcc-msm8996.c +4 -5

index c9b96f318d9c..7a6fd069ba5d 100644
@@ -3463,9 +3463,8 @@ MODULE_DEVICE_TABLE(of, gcc_msm8996_match_table);
 
 static int gcc_msm8996_probe(struct platform_device *pdev)
 {
-	struct clk *clk;
 	struct device *dev = &pdev->dev;
-	int i;
+	int i, ret;
 	struct regmap *regmap;
 
 	regmap = qcom_cc_map(pdev, &gcc_msm8996_desc);

@@ -3479,9 +3478,9 @@ static int gcc_msm8996_probe(struct platform_device *pdev)
 	regmap_update_bits(regmap, 0x52008, BIT(21), BIT(21));
 
 	for (i = 0; i < ARRAY_SIZE(gcc_msm8996_hws); i++) {
-		clk = devm_clk_register(dev, gcc_msm8996_hws[i]);
-		if (IS_ERR(clk))
-			return PTR_ERR(clk);
+		ret = devm_clk_hw_register(dev, gcc_msm8996_hws[i]);
+		if (ret)
+			return ret;
 	}
 
 	return qcom_cc_really_probe(pdev, &gcc_msm8996_desc, regmap);

drivers/clk/qcom/mmcc-msm8996.c +4 -5

index 847dd9dadeca..384b812a153e 100644
@@ -3305,9 +3305,8 @@ MODULE_DEVICE_TABLE(of, mmcc_msm8996_match_table);
 
 static int mmcc_msm8996_probe(struct platform_device *pdev)
 {
-	struct clk *clk;
 	struct device *dev = &pdev->dev;
-	int i;
+	int i, ret;
 	struct regmap *regmap;
 
 	regmap = qcom_cc_map(pdev, &mmcc_msm8996_desc);

@@ -3320,9 +3319,9 @@ static int mmcc_msm8996_probe(struct platform_device *pdev)
 	regmap_update_bits(regmap, 0x5054, BIT(15), 0);
 
 	for (i = 0; i < ARRAY_SIZE(mmcc_msm8996_hws); i++) {
-		clk = devm_clk_register(dev, mmcc_msm8996_hws[i]);
-		if (IS_ERR(clk))
-			return PTR_ERR(clk);
+		ret = devm_clk_hw_register(dev, mmcc_msm8996_hws[i]);
+		if (ret)
+			return ret;
 	}
 
 	return qcom_cc_really_probe(pdev, &mmcc_msm8996_desc, regmap);

Signature · 1 line

2.7.4

Stephen Boyd

author

2016-06-01 23:15 UTC #2 lore raw

PATCH 2/34 clk: at91: Migrate to clk_hw based registration and OF APIs

In reply to Stephen Boyd

Now that we have clk_hw based provider APIs to register clks, we can get rid of struct clk pointers in this driver, allowing us to move closer to a clear split of consumer and provider clk APIs.

Cc Alexandre Belloni <[email protected]>

Cc Boris Brezillon <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/at91/clk-generated.c    | 30 +++++++------
 drivers/clk/at91/clk-h32mx.c        |  8 ++--
 drivers/clk/at91/clk-main.c         | 88 ++++++++++++++++++++++---------------
 drivers/clk/at91/clk-master.c       | 21 +++++----
 drivers/clk/at91/clk-peripheral.c   | 39 +++++++++-------
 drivers/clk/at91/clk-pll.c          | 21 +++++----
 drivers/clk/at91/clk-plldiv.c       | 24 +++++-----
 drivers/clk/at91/clk-programmable.c | 22 ++++++----
 drivers/clk/at91/clk-slow.c         | 88 ++++++++++++++++++++++---------------
 drivers/clk/at91/clk-smd.c          | 22 ++++++----
 drivers/clk/at91/clk-system.c       | 22 ++++++----
 drivers/clk/at91/clk-usb.c          | 69 +++++++++++++++++------------
 drivers/clk/at91/clk-utmi.c         | 22 ++++++----
 13 files changed, 277 insertions(+), 199 deletions(-)

drivers/clk/at91/clk-generated.c +17 ~~-13~~

index e1aa210dd7aa..8f1585b3abe5 100644
@@ -233,14 +233,16 @@ static void clk_generated_startup(struct clk_generated *gck)
 					>> AT91_PMC_PCR_GCKDIV_OFFSET;
 }
 
-static struct clk * __init
-at91_clk_register_generated(struct regmap *regmap,  spinlock_t *lock, const char
-			    *name, const char **parent_names, u8 num_parents,
-			    u8 id, const struct clk_range *range)
+static struct clk_hw * __init
+at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock,
+			    const char *name, const char **parent_names,
+			    u8 num_parents, u8 id,
+			    const struct clk_range *range)
 {
 	struct clk_generated *gck;
-	struct clk *clk = NULL;
 	struct clk_init_data init;
+	struct clk_hw *hw;
+	int ret;
 
 	gck = kzalloc(sizeof(*gck), GFP_KERNEL);
 	if (!gck)

@@ -258,13 +260,15 @@ at91_clk_register_generated(struct regmap *regmap,  spinlock_t *lock, const char
 	gck->lock = lock;
 	gck->range = *range;
 
-	clk = clk_register(NULL, &gck->hw);
-	if (IS_ERR(clk))
+	hw = &gck->hw;
+	ret = clk_hw_register(NULL, &gck->hw);
+	if (ret) {
 		kfree(gck);
-	else
+		hw = ERR_PTR(ret);
+	} else
 		clk_generated_startup(gck);
 
-	return clk;
+	return hw;
 }
 
 void __init of_sama5d2_clk_generated_setup(struct device_node *np)

@@ -272,7 +276,7 @@ void __init of_sama5d2_clk_generated_setup(struct device_node *np)
 	int num;
 	u32 id;
 	const char *name;
-	struct clk *clk;
+	struct clk_hw *hw;
 	unsigned int num_parents;
 	const char *parent_names[GENERATED_SOURCE_MAX];
 	struct device_node *gcknp;

@@ -306,13 +310,13 @@ void __init of_sama5d2_clk_generated_setup(struct device_node *np)
 		of_at91_get_clk_range(gcknp, "atmel,clk-output-range",
 				      &range);
 
-		clk = at91_clk_register_generated(regmap, &pmc_pcr_lock, name,
+		hw = at91_clk_register_generated(regmap, &pmc_pcr_lock, name,
 						  parent_names, num_parents,
 						  id, &range);
-		if (IS_ERR(clk))
+		if (IS_ERR(hw))
 			continue;
 
-		of_clk_add_provider(gcknp, of_clk_src_simple_get, clk);
+		of_clk_add_hw_provider(gcknp, of_clk_hw_simple_get, hw);
 	}
 }
 CLK_OF_DECLARE(of_sama5d2_clk_generated_setup, "atmel,sama5d2-clk-generated",

drivers/clk/at91/clk-h32mx.c +4 -4

index 8e20c8a76db7..e0daa4a31f88 100644
@@ -92,7 +92,7 @@ static void __init of_sama5d4_clk_h32mx_setup(struct device_node *np)
 	struct clk_init_data init;
 	const char *parent_name;
 	struct regmap *regmap;
-	struct clk *clk;
+	int ret;
 
 	regmap = syscon_node_to_regmap(of_get_parent(np));
 	if (IS_ERR(regmap))

@@ -113,13 +113,13 @@ static void __init of_sama5d4_clk_h32mx_setup(struct device_node *np)
 	h32mxclk->hw.init = &init;
 	h32mxclk->regmap = regmap;
 
-	clk = clk_register(NULL, &h32mxclk->hw);
-	if (IS_ERR(clk)) {
+	ret = clk_hw_register(NULL, &h32mxclk->hw);
+	if (ret) {
 		kfree(h32mxclk);
 		return;
 	}
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, &h32mxclk->hw);
 }
 CLK_OF_DECLARE(of_sama5d4_clk_h32mx_setup, "atmel,sama5d4-clk-h32mx",
 	       of_sama5d4_clk_h32mx_setup);

drivers/clk/at91/clk-main.c +52 ~~-36~~

220 lines not on this page · raw message

drivers/clk/at91/clk-master.c +12 -9

index d1021e106191..e9cba9fc26d7 100644
@@ -120,7 +120,7 @@ static const struct clk_ops master_ops = {
 	.get_parent = clk_master_get_parent,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_master(struct regmap *regmap,
 		const char *name, int num_parents,
 		const char **parent_names,

@@ -128,8 +128,9 @@ at91_clk_register_master(struct regmap *regmap,
 		const struct clk_master_characteristics *characteristics)
 {
 	struct clk_master *master;
-	struct clk *clk = NULL;
 	struct clk_init_data init;
+	struct clk_hw *hw;
+	int ret;
 
 	if (!name || !num_parents || !parent_names)
 		return ERR_PTR(-EINVAL);

@@ -149,12 +150,14 @@ at91_clk_register_master(struct regmap *regmap,
 	master->characteristics = characteristics;
 	master->regmap = regmap;
 
-	clk = clk_register(NULL, &master->hw);
-	if (IS_ERR(clk)) {
+	hw = &master->hw;
+	ret = clk_hw_register(NULL, &master->hw);
+	if (ret) {
 		kfree(master);
+		hw = ERR_PTR(ret);
 	}
 
-	return clk;
+	return hw;
 }

@@ -198,7 +201,7 @@ static void __init
 of_at91_clk_master_setup(struct device_node *np,
 			 const struct clk_master_layout *layout)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	unsigned int num_parents;
 	const char *parent_names[MASTER_SOURCE_MAX];
 	const char *name = np->name;

@@ -221,13 +224,13 @@ of_at91_clk_master_setup(struct device_node *np,
 	if (IS_ERR(regmap))
 		return;
 
-	clk = at91_clk_register_master(regmap, name, num_parents,
+	hw = at91_clk_register_master(regmap, name, num_parents,
 				       parent_names, layout,
 				       characteristics);
-	if (IS_ERR(clk))
+	if (IS_ERR(hw))
 		goto out_free_characteristics;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 	return;
 
 out_free_characteristics:

drivers/clk/at91/clk-peripheral.c +23 ~~-16~~

index fd160728e990..dc29fd979d3f 100644
@@ -104,13 +104,14 @@ static const struct clk_ops peripheral_ops = {
 	.is_enabled = clk_peripheral_is_enabled,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_peripheral(struct regmap *regmap, const char *name,
 			     const char *parent_name, u32 id)
 {
 	struct clk_peripheral *periph;
-	struct clk *clk = NULL;
 	struct clk_init_data init;
+	struct clk_hw *hw;
+	int ret;
 
 	if (!name || !parent_name || id > PERIPHERAL_ID_MAX)
 		return ERR_PTR(-EINVAL);

@@ -129,11 +130,14 @@ at91_clk_register_peripheral(struct regmap *regmap, const char *name,
 	periph->hw.init = &init;
 	periph->regmap = regmap;
 
-	clk = clk_register(NULL, &periph->hw);
-	if (IS_ERR(clk))
+	hw = &periph->hw;
+	ret = clk_hw_register(NULL, &periph->hw);
+	if (ret) {
 		kfree(periph);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void clk_sam9x5_peripheral_autodiv(struct clk_sam9x5_peripheral *periph)

@@ -327,14 +331,15 @@ static const struct clk_ops sam9x5_peripheral_ops = {
 	.set_rate = clk_sam9x5_peripheral_set_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
 				    const char *name, const char *parent_name,
 				    u32 id, const struct clk_range *range)
 {
 	struct clk_sam9x5_peripheral *periph;
-	struct clk *clk = NULL;
 	struct clk_init_data init;
+	struct clk_hw *hw;
+	int ret;
 
 	if (!name || !parent_name)
 		return ERR_PTR(-EINVAL);

@@ -357,13 +362,15 @@ at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
 	periph->auto_div = true;
 	periph->range = *range;
 
-	clk = clk_register(NULL, &periph->hw);
-	if (IS_ERR(clk))
+	hw = &periph->hw;
+	ret = clk_hw_register(NULL, &periph->hw);
+	if (ret) {
 		kfree(periph);
-	else
+		hw = ERR_PTR(ret);
+	} else
 		clk_sam9x5_peripheral_autodiv(periph);
 
-	return clk;
+	return hw;
 }
 
 static void __init

@@ -371,7 +378,7 @@ of_at91_clk_periph_setup(struct device_node *np, u8 type)
 {
 	int num;
 	u32 id;
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *parent_name;
 	const char *name;
 	struct device_node *periphclknp;

@@ -400,7 +407,7 @@ of_at91_clk_periph_setup(struct device_node *np, u8 type)
 			name = periphclknp->name;
 
 		if (type == PERIPHERAL_AT91RM9200) {
-			clk = at91_clk_register_peripheral(regmap, name,
+			hw = at91_clk_register_peripheral(regmap, name,
 							   parent_name, id);
 		} else {
 			struct clk_range range = CLK_RANGE(0, 0);

@@ -409,17 +416,17 @@ of_at91_clk_periph_setup(struct device_node *np, u8 type)
 					      "atmel,clk-output-range",
 					      &range);
 
-			clk = at91_clk_register_sam9x5_peripheral(regmap,
+			hw = at91_clk_register_sam9x5_peripheral(regmap,
 								  &pmc_pcr_lock,
 								  name,
 								  parent_name,
 								  id, &range);
 		}
 
-		if (IS_ERR(clk))
+		if (IS_ERR(hw))
 			continue;
 
-		of_clk_add_provider(periphclknp, of_clk_src_simple_get, clk);
+		of_clk_add_hw_provider(periphclknp, of_clk_hw_simple_get, hw);
 	}
 }

drivers/clk/at91/clk-pll.c +12 -9

index fb2e0b56d4b7..45ad168e1496 100644
@@ -296,17 +296,18 @@ static const struct clk_ops pll_ops = {
 	.set_rate = clk_pll_set_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_pll(struct regmap *regmap, const char *name,
 		      const char *parent_name, u8 id,
 		      const struct clk_pll_layout *layout,
 		      const struct clk_pll_characteristics *characteristics)
 {
 	struct clk_pll *pll;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
 	int offset = PLL_REG(id);
 	unsigned int pllr;
+	int ret;
 
 	if (id > PLL_MAX_ID)
 		return ERR_PTR(-EINVAL);

@@ -330,12 +331,14 @@ at91_clk_register_pll(struct regmap *regmap, const char *name,
 	pll->div = PLL_DIV(pllr);
 	pll->mul = PLL_MUL(pllr, layout);
 
-	clk = clk_register(NULL, &pll->hw);
-	if (IS_ERR(clk)) {
+	hw = &pll->hw;
+	ret = clk_hw_register(NULL, &pll->hw);
+	if (ret) {
 		kfree(pll);
+		hw = ERR_PTR(ret);
 	}
 
-	return clk;
+	return hw;
 }

@@ -465,7 +468,7 @@ of_at91_clk_pll_setup(struct device_node *np,
 		      const struct clk_pll_layout *layout)
 {
 	u32 id;
-	struct clk *clk;
+	struct clk_hw *hw;
 	struct regmap *regmap;
 	const char *parent_name;
 	const char *name = np->name;

@@ -486,12 +489,12 @@ of_at91_clk_pll_setup(struct device_node *np,
 	if (!characteristics)
 		return;
 
-	clk = at91_clk_register_pll(regmap, name, parent_name, id, layout,
+	hw = at91_clk_register_pll(regmap, name, parent_name, id, layout,
 				    characteristics);
-	if (IS_ERR(clk))
+	if (IS_ERR(hw))
 		goto out_free_characteristics;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 	return;
 
 out_free_characteristics:

drivers/clk/at91/clk-plldiv.c +13 ~~-11~~

index 2bed26481027..b4afaf22f3fd 100644
@@ -75,13 +75,14 @@ static const struct clk_ops plldiv_ops = {
 	.set_rate = clk_plldiv_set_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_plldiv(struct regmap *regmap, const char *name,
 			 const char *parent_name)
 {
 	struct clk_plldiv *plldiv;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	plldiv = kzalloc(sizeof(*plldiv), GFP_KERNEL);
 	if (!plldiv)

@@ -96,18 +97,20 @@ at91_clk_register_plldiv(struct regmap *regmap, const char *name,
 	plldiv->hw.init = &init;
 	plldiv->regmap = regmap;
 
-	clk = clk_register(NULL, &plldiv->hw);
-
-	if (IS_ERR(clk))
+	hw = &plldiv->hw;
+	ret = clk_hw_register(NULL, &plldiv->hw);
+	if (ret) {
 		kfree(plldiv);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init
 of_at91sam9x5_clk_plldiv_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *parent_name;
 	const char *name = np->name;
 	struct regmap *regmap;

@@ -120,12 +123,11 @@ of_at91sam9x5_clk_plldiv_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	clk = at91_clk_register_plldiv(regmap, name, parent_name);
-	if (IS_ERR(clk))
+	hw = at91_clk_register_plldiv(regmap, name, parent_name);
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
-	return;
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(at91sam9x5_clk_plldiv, "atmel,at91sam9x5-clk-plldiv",
 	       of_at91sam9x5_clk_plldiv_setup);

drivers/clk/at91/clk-programmable.c +13 -9

index 10f846cc8db1..4e30899753e6 100644
@@ -170,15 +170,16 @@ static const struct clk_ops programmable_ops = {
 	.set_rate = clk_programmable_set_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_programmable(struct regmap *regmap,
 			       const char *name, const char **parent_names,
 			       u8 num_parents, u8 id,
 			       const struct clk_programmable_layout *layout)
 {
 	struct clk_programmable *prog;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	if (id > PROG_ID_MAX)
 		return ERR_PTR(-EINVAL);

@@ -198,11 +199,14 @@ at91_clk_register_programmable(struct regmap *regmap,
 	prog->hw.init = &init;
 	prog->regmap = regmap;
 
-	clk = clk_register(NULL, &prog->hw);
-	if (IS_ERR(clk))
+	hw = &prog->hw;
+	ret = clk_hw_register(NULL, &prog->hw);
+	if (ret) {
 		kfree(prog);
+		hw = &prog->hw;
+	}
 
-	return clk;
+	return hw;
 }
 
 static const struct clk_programmable_layout at91rm9200_programmable_layout = {

@@ -229,7 +233,7 @@ of_at91_clk_prog_setup(struct device_node *np,
 {
 	int num;
 	u32 id;
-	struct clk *clk;
+	struct clk_hw *hw;
 	unsigned int num_parents;
 	const char *parent_names[PROG_SOURCE_MAX];
 	const char *name;

@@ -257,13 +261,13 @@ of_at91_clk_prog_setup(struct device_node *np,
 		if (of_property_read_string(np, "clock-output-names", &name))
 			name = progclknp->name;
 
-		clk = at91_clk_register_programmable(regmap, name,
+		hw = at91_clk_register_programmable(regmap, name,
 						     parent_names, num_parents,
 						     id, layout);
-		if (IS_ERR(clk))
+		if (IS_ERR(hw))
 			continue;
 
-		of_clk_add_provider(progclknp, of_clk_src_simple_get, clk);
+		of_clk_add_hw_provider(progclknp, of_clk_hw_simple_get, hw);
 	}
 }

drivers/clk/at91/clk-slow.c +52 ~~-36~~

227 lines not on this page · raw message

drivers/clk/at91/clk-smd.c +13 -9

index 3c04b069d5b8..965c662b90a5 100644
@@ -111,13 +111,14 @@ static const struct clk_ops at91sam9x5_smd_ops = {
 	.set_rate = at91sam9x5_clk_smd_set_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name,
 			    const char **parent_names, u8 num_parents)
 {
 	struct at91sam9x5_clk_smd *smd;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	smd = kzalloc(sizeof(*smd), GFP_KERNEL);
 	if (!smd)

@@ -132,16 +133,19 @@ at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name,
 	smd->hw.init = &init;
 	smd->regmap = regmap;
 
-	clk = clk_register(NULL, &smd->hw);
-	if (IS_ERR(clk))
+	hw = &smd->hw;
+	ret = clk_hw_register(NULL, &smd->hw);
+	if (ret) {
 		kfree(smd);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init of_at91sam9x5_clk_smd_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	unsigned int num_parents;
 	const char *parent_names[SMD_SOURCE_MAX];
 	const char *name = np->name;

@@ -159,12 +163,12 @@ static void __init of_at91sam9x5_clk_smd_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	clk = at91sam9x5_clk_register_smd(regmap, name, parent_names,
+	hw = at91sam9x5_clk_register_smd(regmap, name, parent_names,
 					  num_parents);
-	if (IS_ERR(clk))
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(at91sam9x5_clk_smd, "atmel,at91sam9x5-clk-smd",
 	       of_at91sam9x5_clk_smd_setup);

drivers/clk/at91/clk-system.c +13 -9

index 8f35d8172909..86a36809765d 100644
@@ -88,13 +88,14 @@ static const struct clk_ops system_ops = {
 	.is_prepared = clk_system_is_prepared,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_system(struct regmap *regmap, const char *name,
 			 const char *parent_name, u8 id)
 {
 	struct clk_system *sys;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	if (!parent_name || id > SYSTEM_MAX_ID)
 		return ERR_PTR(-EINVAL);

@@ -113,18 +114,21 @@ at91_clk_register_system(struct regmap *regmap, const char *name,
 	sys->hw.init = &init;
 	sys->regmap = regmap;
 
-	clk = clk_register(NULL, &sys->hw);
-	if (IS_ERR(clk))
+	hw = &sys->hw;
+	ret = clk_hw_register(NULL, &sys->hw);
+	if (ret) {
 		kfree(sys);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init of_at91rm9200_clk_sys_setup(struct device_node *np)
 {
 	int num;
 	u32 id;
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *name;
 	struct device_node *sysclknp;
 	const char *parent_name;

@@ -147,11 +151,11 @@ static void __init of_at91rm9200_clk_sys_setup(struct device_node *np)
 
 		parent_name = of_clk_get_parent_name(sysclknp, 0);
 
-		clk = at91_clk_register_system(regmap, name, parent_name, id);
-		if (IS_ERR(clk))
+		hw = at91_clk_register_system(regmap, name, parent_name, id);
+		if (IS_ERR(hw))
 			continue;
 
-		of_clk_add_provider(sysclknp, of_clk_src_simple_get, clk);
+		of_clk_add_hw_provider(sysclknp, of_clk_hw_simple_get, hw);
 	}
 }
 CLK_OF_DECLARE(at91rm9200_clk_sys, "atmel,at91rm9200-clk-system",

drivers/clk/at91/clk-usb.c +40 ~~-29~~

162 lines not on this page · raw message

drivers/clk/at91/clk-utmi.c +13 -9

index 61fcf399e58c..aadabd9d1e2b 100644
@@ -77,13 +77,14 @@ static const struct clk_ops utmi_ops = {
 	.recalc_rate = clk_utmi_recalc_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_utmi(struct regmap *regmap,
 		       const char *name, const char *parent_name)
 {
 	struct clk_utmi *utmi;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	utmi = kzalloc(sizeof(*utmi), GFP_KERNEL);
 	if (!utmi)

@@ -98,16 +99,19 @@ at91_clk_register_utmi(struct regmap *regmap,
 	utmi->hw.init = &init;
 	utmi->regmap = regmap;
 
-	clk = clk_register(NULL, &utmi->hw);
-	if (IS_ERR(clk))
+	hw = &utmi->hw;
+	ret = clk_hw_register(NULL, &utmi->hw);
+	if (ret) {
 		kfree(utmi);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init of_at91sam9x5_clk_utmi_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *parent_name;
 	const char *name = np->name;
 	struct regmap *regmap;

@@ -120,11 +124,11 @@ static void __init of_at91sam9x5_clk_utmi_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	clk = at91_clk_register_utmi(regmap, name, parent_name);
-	if (IS_ERR(clk))
+	hw = at91_clk_register_utmi(regmap, name, parent_name);
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 	return;
 }
 CLK_OF_DECLARE(at91sam9x5_clk_utmi, "atmel,at91sam9x5-clk-utmi",

Signature · 1 line

2.7.4

Alexandre Belloni

Acked-by Tested-by on v1 2/34

2016-06-07 16:36 UTC #3 lore raw

Re: [PATCH 02/34] clk: at91: Migrate to clk_hw based registration and OF APIs

Quoted 7 lines · Stephen Boyd

Well, apart the same comment about alignement:

Acked-by Alexandre Belloni <[email protected]>

Tested-by Alexandre Belloni <[email protected]>

Quoted 1,345 lines

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/at91/clk-generated.c    | 30 +++++++------
 drivers/clk/at91/clk-h32mx.c        |  8 ++--
 drivers/clk/at91/clk-main.c         | 88 ++++++++++++++++++++++---------------
 drivers/clk/at91/clk-master.c       | 21 +++++----
 drivers/clk/at91/clk-peripheral.c   | 39 +++++++++-------
 drivers/clk/at91/clk-pll.c          | 21 +++++----
 drivers/clk/at91/clk-plldiv.c       | 24 +++++-----
 drivers/clk/at91/clk-programmable.c | 22 ++++++----
 drivers/clk/at91/clk-slow.c         | 88 ++++++++++++++++++++++---------------
 drivers/clk/at91/clk-smd.c          | 22 ++++++----
 drivers/clk/at91/clk-system.c       | 22 ++++++----
 drivers/clk/at91/clk-usb.c          | 69 +++++++++++++++++------------
 drivers/clk/at91/clk-utmi.c         | 22 ++++++----
 13 files changed, 277 insertions(+), 199 deletions(-)

drivers/clk/at91/clk-generated.c +17 ~~-13~~

index e1aa210dd7aa..8f1585b3abe5 100644
@@ -233,14 +233,16 @@ static void clk_generated_startup(struct clk_generated *gck)
 					>> AT91_PMC_PCR_GCKDIV_OFFSET;
 }
 
-static struct clk * __init
-at91_clk_register_generated(struct regmap *regmap,  spinlock_t *lock, const char
-			    *name, const char **parent_names, u8 num_parents,
-			    u8 id, const struct clk_range *range)
+static struct clk_hw * __init
+at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock,
+			    const char *name, const char **parent_names,
+			    u8 num_parents, u8 id,
+			    const struct clk_range *range)
 {
 	struct clk_generated *gck;
-	struct clk *clk = NULL;
 	struct clk_init_data init;
+	struct clk_hw *hw;
+	int ret;
 
 	gck = kzalloc(sizeof(*gck), GFP_KERNEL);
 	if (!gck)

@@ -258,13 +260,15 @@ at91_clk_register_generated(struct regmap *regmap,  spinlock_t *lock, const char
 	gck->lock = lock;
 	gck->range = *range;
 
-	clk = clk_register(NULL, &gck->hw);
-	if (IS_ERR(clk))
+	hw = &gck->hw;
+	ret = clk_hw_register(NULL, &gck->hw);
+	if (ret) {
 		kfree(gck);
-	else
+		hw = ERR_PTR(ret);
+	} else
 		clk_generated_startup(gck);
 
-	return clk;
+	return hw;
 }
 
 void __init of_sama5d2_clk_generated_setup(struct device_node *np)

@@ -272,7 +276,7 @@ void __init of_sama5d2_clk_generated_setup(struct device_node *np)
 	int num;
 	u32 id;
 	const char *name;
-	struct clk *clk;
+	struct clk_hw *hw;
 	unsigned int num_parents;
 	const char *parent_names[GENERATED_SOURCE_MAX];
 	struct device_node *gcknp;

@@ -306,13 +310,13 @@ void __init of_sama5d2_clk_generated_setup(struct device_node *np)
 		of_at91_get_clk_range(gcknp, "atmel,clk-output-range",
 				      &range);
 
-		clk = at91_clk_register_generated(regmap, &pmc_pcr_lock, name,
+		hw = at91_clk_register_generated(regmap, &pmc_pcr_lock, name,
 						  parent_names, num_parents,
 						  id, &range);
-		if (IS_ERR(clk))
+		if (IS_ERR(hw))
 			continue;
 
-		of_clk_add_provider(gcknp, of_clk_src_simple_get, clk);
+		of_clk_add_hw_provider(gcknp, of_clk_hw_simple_get, hw);
 	}
 }
 CLK_OF_DECLARE(of_sama5d2_clk_generated_setup, "atmel,sama5d2-clk-generated",

drivers/clk/at91/clk-h32mx.c +4 -4

index 8e20c8a76db7..e0daa4a31f88 100644
@@ -92,7 +92,7 @@ static void __init of_sama5d4_clk_h32mx_setup(struct device_node *np)
 	struct clk_init_data init;
 	const char *parent_name;
 	struct regmap *regmap;
-	struct clk *clk;
+	int ret;
 
 	regmap = syscon_node_to_regmap(of_get_parent(np));
 	if (IS_ERR(regmap))

@@ -113,13 +113,13 @@ static void __init of_sama5d4_clk_h32mx_setup(struct device_node *np)
 	h32mxclk->hw.init = &init;
 	h32mxclk->regmap = regmap;
 
-	clk = clk_register(NULL, &h32mxclk->hw);
-	if (IS_ERR(clk)) {
+	ret = clk_hw_register(NULL, &h32mxclk->hw);
+	if (ret) {
 		kfree(h32mxclk);
 		return;
 	}
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, &h32mxclk->hw);
 }
 CLK_OF_DECLARE(of_sama5d4_clk_h32mx_setup, "atmel,sama5d4-clk-h32mx",
 	       of_sama5d4_clk_h32mx_setup);

drivers/clk/at91/clk-main.c +52 ~~-36~~

index 58b5baca670c..c813c27f2e58 100644
@@ -128,15 +128,16 @@ static const struct clk_ops main_osc_ops = {
 	.is_prepared = clk_main_osc_is_prepared,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_main_osc(struct regmap *regmap,
 			   const char *name,
 			   const char *parent_name,
 			   bool bypass)
 {
 	struct clk_main_osc *osc;
-	struct clk *clk = NULL;
 	struct clk_init_data init;
+	struct clk_hw *hw;
+	int ret;
 
 	if (!name || !parent_name)
 		return ERR_PTR(-EINVAL);

@@ -160,16 +161,19 @@ at91_clk_register_main_osc(struct regmap *regmap,
 				   AT91_PMC_MOSCEN,
 				   AT91_PMC_OSCBYPASS | AT91_PMC_KEY);
 
-	clk = clk_register(NULL, &osc->hw);
-	if (IS_ERR(clk))
+	hw = &osc->hw;
+	ret = clk_hw_register(NULL, &osc->hw);
+	if (ret) {
 		kfree(osc);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init of_at91rm9200_clk_main_osc_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *name = np->name;
 	const char *parent_name;
 	struct regmap *regmap;

@@ -183,11 +187,11 @@ static void __init of_at91rm9200_clk_main_osc_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	clk = at91_clk_register_main_osc(regmap, name, parent_name, bypass);
-	if (IS_ERR(clk))
+	hw = at91_clk_register_main_osc(regmap, name, parent_name, bypass);
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(at91rm9200_clk_main_osc, "atmel,at91rm9200-clk-main-osc",
 	       of_at91rm9200_clk_main_osc_setup);

@@ -271,14 +275,15 @@ static const struct clk_ops main_rc_osc_ops = {
 	.recalc_accuracy = clk_main_rc_osc_recalc_accuracy,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_main_rc_osc(struct regmap *regmap,
 			      const char *name,
 			      u32 frequency, u32 accuracy)
 {
 	struct clk_main_rc_osc *osc;
-	struct clk *clk = NULL;
 	struct clk_init_data init;
+	struct clk_hw *hw;
+	int ret;
 
 	if (!name || !frequency)
 		return ERR_PTR(-EINVAL);

@@ -298,16 +303,19 @@ at91_clk_register_main_rc_osc(struct regmap *regmap,
 	osc->frequency = frequency;
 	osc->accuracy = accuracy;
 
-	clk = clk_register(NULL, &osc->hw);
-	if (IS_ERR(clk))
+	hw = &osc->hw;
+	ret = clk_hw_register(NULL, hw);
+	if (ret) {
 		kfree(osc);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init of_at91sam9x5_clk_main_rc_osc_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	u32 frequency = 0;
 	u32 accuracy = 0;
 	const char *name = np->name;

@@ -321,11 +329,11 @@ static void __init of_at91sam9x5_clk_main_rc_osc_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	clk = at91_clk_register_main_rc_osc(regmap, name, frequency, accuracy);
-	if (IS_ERR(clk))
+	hw = at91_clk_register_main_rc_osc(regmap, name, frequency, accuracy);
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(at91sam9x5_clk_main_rc_osc, "atmel,at91sam9x5-clk-main-rc-osc",
 	       of_at91sam9x5_clk_main_rc_osc_setup);

@@ -395,14 +403,15 @@ static const struct clk_ops rm9200_main_ops = {
 	.recalc_rate = clk_rm9200_main_recalc_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_rm9200_main(struct regmap *regmap,
 			      const char *name,
 			      const char *parent_name)
 {
 	struct clk_rm9200_main *clkmain;
-	struct clk *clk = NULL;
 	struct clk_init_data init;
+	struct clk_hw *hw;
+	int ret;
 
 	if (!name)
 		return ERR_PTR(-EINVAL);

@@ -423,16 +432,19 @@ at91_clk_register_rm9200_main(struct regmap *regmap,
 	clkmain->hw.init = &init;
 	clkmain->regmap = regmap;
 
-	clk = clk_register(NULL, &clkmain->hw);
-	if (IS_ERR(clk))
+	hw = &clkmain->hw;
+	ret = clk_hw_register(NULL, &clkmain->hw);
+	if (ret) {
 		kfree(clkmain);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init of_at91rm9200_clk_main_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *parent_name;
 	const char *name = np->name;
 	struct regmap *regmap;

@@ -444,11 +456,11 @@ static void __init of_at91rm9200_clk_main_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	clk = at91_clk_register_rm9200_main(regmap, name, parent_name);
-	if (IS_ERR(clk))
+	hw = at91_clk_register_rm9200_main(regmap, name, parent_name);
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(at91rm9200_clk_main, "atmel,at91rm9200-clk-main",
 	       of_at91rm9200_clk_main_setup);

@@ -529,16 +541,17 @@ static const struct clk_ops sam9x5_main_ops = {
 	.get_parent = clk_sam9x5_main_get_parent,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_sam9x5_main(struct regmap *regmap,
 			      const char *name,
 			      const char **parent_names,
 			      int num_parents)
 {
 	struct clk_sam9x5_main *clkmain;
-	struct clk *clk = NULL;
 	struct clk_init_data init;
 	unsigned int status;
+	struct clk_hw *hw;
+	int ret;
 
 	if (!name)
 		return ERR_PTR(-EINVAL);

@@ -561,16 +574,19 @@ at91_clk_register_sam9x5_main(struct regmap *regmap,
 	regmap_read(clkmain->regmap, AT91_CKGR_MOR, &status);
 	clkmain->parent = status & AT91_PMC_MOSCEN ? 1 : 0;
 
-	clk = clk_register(NULL, &clkmain->hw);
-	if (IS_ERR(clk))
+	hw = &clkmain->hw;
+	ret = clk_hw_register(NULL, &clkmain->hw);
+	if (ret) {
 		kfree(clkmain);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init of_at91sam9x5_clk_main_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *parent_names[2];
 	unsigned int num_parents;
 	const char *name = np->name;

@@ -587,12 +603,12 @@ static void __init of_at91sam9x5_clk_main_setup(struct device_node *np)
 
 	of_property_read_string(np, "clock-output-names", &name);
 
-	clk = at91_clk_register_sam9x5_main(regmap, name, parent_names,
+	hw = at91_clk_register_sam9x5_main(regmap, name, parent_names,
 					    num_parents);
-	if (IS_ERR(clk))
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(at91sam9x5_clk_main, "atmel,at91sam9x5-clk-main",
 	       of_at91sam9x5_clk_main_setup);

drivers/clk/at91/clk-master.c +12 -9

index d1021e106191..e9cba9fc26d7 100644
@@ -120,7 +120,7 @@ static const struct clk_ops master_ops = {
 	.get_parent = clk_master_get_parent,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_master(struct regmap *regmap,
 		const char *name, int num_parents,
 		const char **parent_names,

@@ -128,8 +128,9 @@ at91_clk_register_master(struct regmap *regmap,
 		const struct clk_master_characteristics *characteristics)
 {
 	struct clk_master *master;
-	struct clk *clk = NULL;
 	struct clk_init_data init;
+	struct clk_hw *hw;
+	int ret;
 
 	if (!name || !num_parents || !parent_names)
 		return ERR_PTR(-EINVAL);

@@ -149,12 +150,14 @@ at91_clk_register_master(struct regmap *regmap,
 	master->characteristics = characteristics;
 	master->regmap = regmap;
 
-	clk = clk_register(NULL, &master->hw);
-	if (IS_ERR(clk)) {
+	hw = &master->hw;
+	ret = clk_hw_register(NULL, &master->hw);
+	if (ret) {
 		kfree(master);
+		hw = ERR_PTR(ret);
 	}
 
-	return clk;
+	return hw;
 }

@@ -198,7 +201,7 @@ static void __init
 of_at91_clk_master_setup(struct device_node *np,
 			 const struct clk_master_layout *layout)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	unsigned int num_parents;
 	const char *parent_names[MASTER_SOURCE_MAX];
 	const char *name = np->name;

@@ -221,13 +224,13 @@ of_at91_clk_master_setup(struct device_node *np,
 	if (IS_ERR(regmap))
 		return;
 
-	clk = at91_clk_register_master(regmap, name, num_parents,
+	hw = at91_clk_register_master(regmap, name, num_parents,
 				       parent_names, layout,
 				       characteristics);
-	if (IS_ERR(clk))
+	if (IS_ERR(hw))
 		goto out_free_characteristics;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 	return;
 
 out_free_characteristics:

drivers/clk/at91/clk-peripheral.c +23 ~~-16~~

index fd160728e990..dc29fd979d3f 100644
@@ -104,13 +104,14 @@ static const struct clk_ops peripheral_ops = {
 	.is_enabled = clk_peripheral_is_enabled,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_peripheral(struct regmap *regmap, const char *name,
 			     const char *parent_name, u32 id)
 {
 	struct clk_peripheral *periph;
-	struct clk *clk = NULL;
 	struct clk_init_data init;
+	struct clk_hw *hw;
+	int ret;
 
 	if (!name || !parent_name || id > PERIPHERAL_ID_MAX)
 		return ERR_PTR(-EINVAL);

@@ -129,11 +130,14 @@ at91_clk_register_peripheral(struct regmap *regmap, const char *name,
 	periph->hw.init = &init;
 	periph->regmap = regmap;
 
-	clk = clk_register(NULL, &periph->hw);
-	if (IS_ERR(clk))
+	hw = &periph->hw;
+	ret = clk_hw_register(NULL, &periph->hw);
+	if (ret) {
 		kfree(periph);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void clk_sam9x5_peripheral_autodiv(struct clk_sam9x5_peripheral *periph)

@@ -327,14 +331,15 @@ static const struct clk_ops sam9x5_peripheral_ops = {
 	.set_rate = clk_sam9x5_peripheral_set_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
 				    const char *name, const char *parent_name,
 				    u32 id, const struct clk_range *range)
 {
 	struct clk_sam9x5_peripheral *periph;
-	struct clk *clk = NULL;
 	struct clk_init_data init;
+	struct clk_hw *hw;
+	int ret;
 
 	if (!name || !parent_name)
 		return ERR_PTR(-EINVAL);

@@ -357,13 +362,15 @@ at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
 	periph->auto_div = true;
 	periph->range = *range;
 
-	clk = clk_register(NULL, &periph->hw);
-	if (IS_ERR(clk))
+	hw = &periph->hw;
+	ret = clk_hw_register(NULL, &periph->hw);
+	if (ret) {
 		kfree(periph);
-	else
+		hw = ERR_PTR(ret);
+	} else
 		clk_sam9x5_peripheral_autodiv(periph);
 
-	return clk;
+	return hw;
 }
 
 static void __init

@@ -371,7 +378,7 @@ of_at91_clk_periph_setup(struct device_node *np, u8 type)
 {
 	int num;
 	u32 id;
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *parent_name;
 	const char *name;
 	struct device_node *periphclknp;

@@ -400,7 +407,7 @@ of_at91_clk_periph_setup(struct device_node *np, u8 type)
 			name = periphclknp->name;
 
 		if (type == PERIPHERAL_AT91RM9200) {
-			clk = at91_clk_register_peripheral(regmap, name,
+			hw = at91_clk_register_peripheral(regmap, name,
 							   parent_name, id);
 		} else {
 			struct clk_range range = CLK_RANGE(0, 0);

@@ -409,17 +416,17 @@ of_at91_clk_periph_setup(struct device_node *np, u8 type)
 					      "atmel,clk-output-range",
 					      &range);
 
-			clk = at91_clk_register_sam9x5_peripheral(regmap,
+			hw = at91_clk_register_sam9x5_peripheral(regmap,
 								  &pmc_pcr_lock,
 								  name,
 								  parent_name,
 								  id, &range);
 		}
 
-		if (IS_ERR(clk))
+		if (IS_ERR(hw))
 			continue;
 
-		of_clk_add_provider(periphclknp, of_clk_src_simple_get, clk);
+		of_clk_add_hw_provider(periphclknp, of_clk_hw_simple_get, hw);
 	}
 }

drivers/clk/at91/clk-pll.c +12 -9

index fb2e0b56d4b7..45ad168e1496 100644
@@ -296,17 +296,18 @@ static const struct clk_ops pll_ops = {
 	.set_rate = clk_pll_set_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_pll(struct regmap *regmap, const char *name,
 		      const char *parent_name, u8 id,
 		      const struct clk_pll_layout *layout,
 		      const struct clk_pll_characteristics *characteristics)
 {
 	struct clk_pll *pll;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
 	int offset = PLL_REG(id);
 	unsigned int pllr;
+	int ret;
 
 	if (id > PLL_MAX_ID)
 		return ERR_PTR(-EINVAL);

@@ -330,12 +331,14 @@ at91_clk_register_pll(struct regmap *regmap, const char *name,
 	pll->div = PLL_DIV(pllr);
 	pll->mul = PLL_MUL(pllr, layout);
 
-	clk = clk_register(NULL, &pll->hw);
-	if (IS_ERR(clk)) {
+	hw = &pll->hw;
+	ret = clk_hw_register(NULL, &pll->hw);
+	if (ret) {
 		kfree(pll);
+		hw = ERR_PTR(ret);
 	}
 
-	return clk;
+	return hw;
 }

@@ -465,7 +468,7 @@ of_at91_clk_pll_setup(struct device_node *np,
 		      const struct clk_pll_layout *layout)
 {
 	u32 id;
-	struct clk *clk;
+	struct clk_hw *hw;
 	struct regmap *regmap;
 	const char *parent_name;
 	const char *name = np->name;

@@ -486,12 +489,12 @@ of_at91_clk_pll_setup(struct device_node *np,
 	if (!characteristics)
 		return;
 
-	clk = at91_clk_register_pll(regmap, name, parent_name, id, layout,
+	hw = at91_clk_register_pll(regmap, name, parent_name, id, layout,
 				    characteristics);
-	if (IS_ERR(clk))
+	if (IS_ERR(hw))
 		goto out_free_characteristics;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 	return;
 
 out_free_characteristics:

drivers/clk/at91/clk-plldiv.c +13 ~~-11~~

index 2bed26481027..b4afaf22f3fd 100644
@@ -75,13 +75,14 @@ static const struct clk_ops plldiv_ops = {
 	.set_rate = clk_plldiv_set_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_plldiv(struct regmap *regmap, const char *name,
 			 const char *parent_name)
 {
 	struct clk_plldiv *plldiv;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	plldiv = kzalloc(sizeof(*plldiv), GFP_KERNEL);
 	if (!plldiv)

@@ -96,18 +97,20 @@ at91_clk_register_plldiv(struct regmap *regmap, const char *name,
 	plldiv->hw.init = &init;
 	plldiv->regmap = regmap;
 
-	clk = clk_register(NULL, &plldiv->hw);
-
-	if (IS_ERR(clk))
+	hw = &plldiv->hw;
+	ret = clk_hw_register(NULL, &plldiv->hw);
+	if (ret) {
 		kfree(plldiv);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init
 of_at91sam9x5_clk_plldiv_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *parent_name;
 	const char *name = np->name;
 	struct regmap *regmap;

@@ -120,12 +123,11 @@ of_at91sam9x5_clk_plldiv_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	clk = at91_clk_register_plldiv(regmap, name, parent_name);
-	if (IS_ERR(clk))
+	hw = at91_clk_register_plldiv(regmap, name, parent_name);
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
-	return;
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(at91sam9x5_clk_plldiv, "atmel,at91sam9x5-clk-plldiv",
 	       of_at91sam9x5_clk_plldiv_setup);

drivers/clk/at91/clk-programmable.c +13 -9

index 10f846cc8db1..4e30899753e6 100644
@@ -170,15 +170,16 @@ static const struct clk_ops programmable_ops = {
 	.set_rate = clk_programmable_set_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_programmable(struct regmap *regmap,
 			       const char *name, const char **parent_names,
 			       u8 num_parents, u8 id,
 			       const struct clk_programmable_layout *layout)
 {
 	struct clk_programmable *prog;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	if (id > PROG_ID_MAX)
 		return ERR_PTR(-EINVAL);

@@ -198,11 +199,14 @@ at91_clk_register_programmable(struct regmap *regmap,
 	prog->hw.init = &init;
 	prog->regmap = regmap;
 
-	clk = clk_register(NULL, &prog->hw);
-	if (IS_ERR(clk))
+	hw = &prog->hw;
+	ret = clk_hw_register(NULL, &prog->hw);
+	if (ret) {
 		kfree(prog);
+		hw = &prog->hw;
+	}
 
-	return clk;
+	return hw;
 }
 
 static const struct clk_programmable_layout at91rm9200_programmable_layout = {

@@ -229,7 +233,7 @@ of_at91_clk_prog_setup(struct device_node *np,
 {
 	int num;
 	u32 id;
-	struct clk *clk;
+	struct clk_hw *hw;
 	unsigned int num_parents;
 	const char *parent_names[PROG_SOURCE_MAX];
 	const char *name;

@@ -257,13 +261,13 @@ of_at91_clk_prog_setup(struct device_node *np,
 		if (of_property_read_string(np, "clock-output-names", &name))
 			name = progclknp->name;
 
-		clk = at91_clk_register_programmable(regmap, name,
+		hw = at91_clk_register_programmable(regmap, name,
 						     parent_names, num_parents,
 						     id, layout);
-		if (IS_ERR(clk))
+		if (IS_ERR(hw))
 			continue;
 
-		of_clk_add_provider(progclknp, of_clk_src_simple_get, clk);
+		of_clk_add_hw_provider(progclknp, of_clk_hw_simple_get, hw);
 	}
 }

drivers/clk/at91/clk-slow.c +52 ~~-36~~

index 61090b1146cf..cd831e19ba72 100644
@@ -111,7 +111,7 @@ static const struct clk_ops slow_osc_ops = {
 	.is_prepared = clk_slow_osc_is_prepared,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_slow_osc(void __iomem *sckcr,
 			   const char *name,
 			   const char *parent_name,

@@ -119,8 +119,9 @@ at91_clk_register_slow_osc(void __iomem *sckcr,
 			   bool bypass)
 {
 	struct clk_slow_osc *osc;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	if (!sckcr || !name || !parent_name)
 		return ERR_PTR(-EINVAL);

@@ -143,17 +144,20 @@ at91_clk_register_slow_osc(void __iomem *sckcr,
 		writel((readl(sckcr) & ~AT91_SCKC_OSC32EN) | AT91_SCKC_OSC32BYP,
 		       sckcr);
 
-	clk = clk_register(NULL, &osc->hw);
-	if (IS_ERR(clk))
+	hw = &osc->hw;
+	ret = clk_hw_register(NULL, &osc->hw);
+	if (ret) {
 		kfree(osc);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np,
 					     void __iomem *sckcr)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *parent_name;
 	const char *name = np->name;
 	u32 startup;

@@ -164,12 +168,12 @@ void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np,
 	of_property_read_u32(np, "atmel,startup-time-usec", &startup);
 	bypass = of_property_read_bool(np, "atmel,osc-bypass");
 
-	clk = at91_clk_register_slow_osc(sckcr, name, parent_name, startup,
+	hw = at91_clk_register_slow_osc(sckcr, name, parent_name, startup,
 					 bypass);
-	if (IS_ERR(clk))
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 
 static unsigned long clk_slow_rc_osc_recalc_rate(struct clk_hw *hw,

@@ -223,7 +227,7 @@ static const struct clk_ops slow_rc_osc_ops = {
 	.recalc_accuracy = clk_slow_rc_osc_recalc_accuracy,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_slow_rc_osc(void __iomem *sckcr,
 			      const char *name,
 			      unsigned long frequency,

@@ -231,8 +235,9 @@ at91_clk_register_slow_rc_osc(void __iomem *sckcr,
 			      unsigned long startup)
 {
 	struct clk_slow_rc_osc *osc;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	if (!sckcr || !name)
 		return ERR_PTR(-EINVAL);

@@ -253,17 +258,20 @@ at91_clk_register_slow_rc_osc(void __iomem *sckcr,
 	osc->accuracy = accuracy;
 	osc->startup_usec = startup;
 
-	clk = clk_register(NULL, &osc->hw);
-	if (IS_ERR(clk))
+	hw = &osc->hw;
+	ret = clk_hw_register(NULL, &osc->hw);
+	if (ret) {
 		kfree(osc);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np,
 						void __iomem *sckcr)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	u32 frequency = 0;
 	u32 accuracy = 0;
 	u32 startup = 0;

@@ -274,12 +282,12 @@ void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np,
 	of_property_read_u32(np, "clock-accuracy", &accuracy);
 	of_property_read_u32(np, "atmel,startup-time-usec", &startup);
 
-	clk = at91_clk_register_slow_rc_osc(sckcr, name, frequency, accuracy,
+	hw = at91_clk_register_slow_rc_osc(sckcr, name, frequency, accuracy,
 					    startup);
-	if (IS_ERR(clk))
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 
 static int clk_sam9x5_slow_set_parent(struct clk_hw *hw, u8 index)

@@ -321,15 +329,16 @@ static const struct clk_ops sam9x5_slow_ops = {
 	.get_parent = clk_sam9x5_slow_get_parent,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_sam9x5_slow(void __iomem *sckcr,
 			      const char *name,
 			      const char **parent_names,
 			      int num_parents)
 {
 	struct clk_sam9x5_slow *slowck;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	if (!sckcr || !name || !parent_names || !num_parents)
 		return ERR_PTR(-EINVAL);

@@ -348,17 +357,20 @@ at91_clk_register_sam9x5_slow(void __iomem *sckcr,
 	slowck->sckcr = sckcr;
 	slowck->parent = !!(readl(sckcr) & AT91_SCKC_OSCSEL);
 
-	clk = clk_register(NULL, &slowck->hw);
-	if (IS_ERR(clk))
+	hw = &slowck->hw;
+	ret = clk_hw_register(NULL, &slowck->hw);
+	if (ret) {
 		kfree(slowck);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 void __init of_at91sam9x5_clk_slow_setup(struct device_node *np,
 					 void __iomem *sckcr)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *parent_names[2];
 	unsigned int num_parents;
 	const char *name = np->name;

@@ -371,12 +383,12 @@ void __init of_at91sam9x5_clk_slow_setup(struct device_node *np,
 
 	of_property_read_string(np, "clock-output-names", &name);
 
-	clk = at91_clk_register_sam9x5_slow(sckcr, name, parent_names,
+	hw = at91_clk_register_sam9x5_slow(sckcr, name, parent_names,
 					    num_parents);
-	if (IS_ERR(clk))
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 
 static u8 clk_sam9260_slow_get_parent(struct clk_hw *hw)

@@ -393,15 +405,16 @@ static const struct clk_ops sam9260_slow_ops = {
 	.get_parent = clk_sam9260_slow_get_parent,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_sam9260_slow(struct regmap *regmap,
 			       const char *name,
 			       const char **parent_names,
 			       int num_parents)
 {
 	struct clk_sam9260_slow *slowck;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	if (!name)
 		return ERR_PTR(-EINVAL);

@@ -422,16 +435,19 @@ at91_clk_register_sam9260_slow(struct regmap *regmap,
 	slowck->hw.init = &init;
 	slowck->regmap = regmap;
 
-	clk = clk_register(NULL, &slowck->hw);
-	if (IS_ERR(clk))
+	hw = &slowck->hw;
+	ret = clk_hw_register(NULL, &slowck->hw);
+	if (ret) {
 		kfree(slowck);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init of_at91sam9260_clk_slow_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *parent_names[2];
 	unsigned int num_parents;
 	const char *name = np->name;

@@ -448,12 +464,12 @@ static void __init of_at91sam9260_clk_slow_setup(struct device_node *np)
 
 	of_property_read_string(np, "clock-output-names", &name);
 
-	clk = at91_clk_register_sam9260_slow(regmap, name, parent_names,
+	hw = at91_clk_register_sam9260_slow(regmap, name, parent_names,
 					     num_parents);
-	if (IS_ERR(clk))
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 
 CLK_OF_DECLARE(at91sam9260_clk_slow, "atmel,at91sam9260-clk-slow",

drivers/clk/at91/clk-smd.c +13 -9

index 3c04b069d5b8..965c662b90a5 100644
@@ -111,13 +111,14 @@ static const struct clk_ops at91sam9x5_smd_ops = {
 	.set_rate = at91sam9x5_clk_smd_set_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name,
 			    const char **parent_names, u8 num_parents)
 {
 	struct at91sam9x5_clk_smd *smd;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	smd = kzalloc(sizeof(*smd), GFP_KERNEL);
 	if (!smd)

@@ -132,16 +133,19 @@ at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name,
 	smd->hw.init = &init;
 	smd->regmap = regmap;
 
-	clk = clk_register(NULL, &smd->hw);
-	if (IS_ERR(clk))
+	hw = &smd->hw;
+	ret = clk_hw_register(NULL, &smd->hw);
+	if (ret) {
 		kfree(smd);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init of_at91sam9x5_clk_smd_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	unsigned int num_parents;
 	const char *parent_names[SMD_SOURCE_MAX];
 	const char *name = np->name;

@@ -159,12 +163,12 @@ static void __init of_at91sam9x5_clk_smd_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	clk = at91sam9x5_clk_register_smd(regmap, name, parent_names,
+	hw = at91sam9x5_clk_register_smd(regmap, name, parent_names,
 					  num_parents);
-	if (IS_ERR(clk))
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(at91sam9x5_clk_smd, "atmel,at91sam9x5-clk-smd",
 	       of_at91sam9x5_clk_smd_setup);

drivers/clk/at91/clk-system.c +13 -9

index 8f35d8172909..86a36809765d 100644
@@ -88,13 +88,14 @@ static const struct clk_ops system_ops = {
 	.is_prepared = clk_system_is_prepared,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_system(struct regmap *regmap, const char *name,
 			 const char *parent_name, u8 id)
 {
 	struct clk_system *sys;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	if (!parent_name || id > SYSTEM_MAX_ID)
 		return ERR_PTR(-EINVAL);

@@ -113,18 +114,21 @@ at91_clk_register_system(struct regmap *regmap, const char *name,
 	sys->hw.init = &init;
 	sys->regmap = regmap;
 
-	clk = clk_register(NULL, &sys->hw);
-	if (IS_ERR(clk))
+	hw = &sys->hw;
+	ret = clk_hw_register(NULL, &sys->hw);
+	if (ret) {
 		kfree(sys);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init of_at91rm9200_clk_sys_setup(struct device_node *np)
 {
 	int num;
 	u32 id;
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *name;
 	struct device_node *sysclknp;
 	const char *parent_name;

@@ -147,11 +151,11 @@ static void __init of_at91rm9200_clk_sys_setup(struct device_node *np)
 
 		parent_name = of_clk_get_parent_name(sysclknp, 0);
 
-		clk = at91_clk_register_system(regmap, name, parent_name, id);
-		if (IS_ERR(clk))
+		hw = at91_clk_register_system(regmap, name, parent_name, id);
+		if (IS_ERR(hw))
 			continue;
 
-		of_clk_add_provider(sysclknp, of_clk_src_simple_get, clk);
+		of_clk_add_hw_provider(sysclknp, of_clk_hw_simple_get, hw);
 	}
 }
 CLK_OF_DECLARE(at91rm9200_clk_sys, "atmel,at91rm9200-clk-system",

drivers/clk/at91/clk-usb.c +40 ~~-29~~

index d80bdb0a8b02..791770a563fc 100644
@@ -192,13 +192,14 @@ static const struct clk_ops at91sam9n12_usb_ops = {
 	.set_rate = at91sam9x5_clk_usb_set_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name,
 			    const char **parent_names, u8 num_parents)
 {
 	struct at91sam9x5_clk_usb *usb;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	usb = kzalloc(sizeof(*usb), GFP_KERNEL);
 	if (!usb)

@@ -214,20 +215,24 @@ at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name,
 	usb->hw.init = &init;
 	usb->regmap = regmap;
 
-	clk = clk_register(NULL, &usb->hw);
-	if (IS_ERR(clk))
+	hw = &usb->hw;
+	ret = clk_hw_register(NULL, &usb->hw);
+	if (ret) {
 		kfree(usb);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
-static struct clk * __init
+static struct clk_hw * __init
 at91sam9n12_clk_register_usb(struct regmap *regmap, const char *name,
 			     const char *parent_name)
 {
 	struct at91sam9x5_clk_usb *usb;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	usb = kzalloc(sizeof(*usb), GFP_KERNEL);
 	if (!usb)

@@ -242,11 +247,14 @@ at91sam9n12_clk_register_usb(struct regmap *regmap, const char *name,
 	usb->hw.init = &init;
 	usb->regmap = regmap;
 
-	clk = clk_register(NULL, &usb->hw);
-	if (IS_ERR(clk))
+	hw = &usb->hw;
+	ret = clk_hw_register(NULL, &usb->hw);
+	if (ret) {
 		kfree(usb);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static unsigned long at91rm9200_clk_usb_recalc_rate(struct clk_hw *hw,

@@ -334,13 +342,14 @@ static const struct clk_ops at91rm9200_usb_ops = {
 	.set_rate = at91rm9200_clk_usb_set_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91rm9200_clk_register_usb(struct regmap *regmap, const char *name,
 			    const char *parent_name, const u32 *divisors)
 {
 	struct at91rm9200_clk_usb *usb;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	usb = kzalloc(sizeof(*usb), GFP_KERNEL);
 	if (!usb)

@@ -356,16 +365,19 @@ at91rm9200_clk_register_usb(struct regmap *regmap, const char *name,
 	usb->regmap = regmap;
 	memcpy(usb->divisors, divisors, sizeof(usb->divisors));
 
-	clk = clk_register(NULL, &usb->hw);
-	if (IS_ERR(clk))
+	hw = &usb->hw;
+	ret = clk_hw_register(NULL, &usb->hw);
+	if (ret) {
 		kfree(usb);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init of_at91sam9x5_clk_usb_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	unsigned int num_parents;
 	const char *parent_names[USB_SOURCE_MAX];
 	const char *name = np->name;

@@ -383,19 +395,19 @@ static void __init of_at91sam9x5_clk_usb_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	clk = at91sam9x5_clk_register_usb(regmap, name, parent_names,
-					  num_parents);
-	if (IS_ERR(clk))
+	hw = at91sam9x5_clk_register_usb(regmap, name, parent_names,
+					 num_parents);
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(at91sam9x5_clk_usb, "atmel,at91sam9x5-clk-usb",
 	       of_at91sam9x5_clk_usb_setup);
 
 static void __init of_at91sam9n12_clk_usb_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *parent_name;
 	const char *name = np->name;
 	struct regmap *regmap;

@@ -410,18 +422,18 @@ static void __init of_at91sam9n12_clk_usb_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	clk = at91sam9n12_clk_register_usb(regmap, name, parent_name);
-	if (IS_ERR(clk))
+	hw = at91sam9n12_clk_register_usb(regmap, name, parent_name);
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(at91sam9n12_clk_usb, "atmel,at91sam9n12-clk-usb",
 	       of_at91sam9n12_clk_usb_setup);
 
 static void __init of_at91rm9200_clk_usb_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *parent_name;
 	const char *name = np->name;
 	u32 divisors[4] = {0, 0, 0, 0};

@@ -440,12 +452,11 @@ static void __init of_at91rm9200_clk_usb_setup(struct device_node *np)
 	regmap = syscon_node_to_regmap(of_get_parent(np));
 	if (IS_ERR(regmap))
 		return;
-
-	clk = at91rm9200_clk_register_usb(regmap, name, parent_name, divisors);
-	if (IS_ERR(clk))
+	hw = at91rm9200_clk_register_usb(regmap, name, parent_name, divisors);
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(at91rm9200_clk_usb, "atmel,at91rm9200-clk-usb",
 	       of_at91rm9200_clk_usb_setup);

drivers/clk/at91/clk-utmi.c +13 -9

index 61fcf399e58c..aadabd9d1e2b 100644
@@ -77,13 +77,14 @@ static const struct clk_ops utmi_ops = {
 	.recalc_rate = clk_utmi_recalc_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_utmi(struct regmap *regmap,
 		       const char *name, const char *parent_name)
 {
 	struct clk_utmi *utmi;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	utmi = kzalloc(sizeof(*utmi), GFP_KERNEL);
 	if (!utmi)

@@ -98,16 +99,19 @@ at91_clk_register_utmi(struct regmap *regmap,
 	utmi->hw.init = &init;
 	utmi->regmap = regmap;
 
-	clk = clk_register(NULL, &utmi->hw);
-	if (IS_ERR(clk))
+	hw = &utmi->hw;
+	ret = clk_hw_register(NULL, &utmi->hw);
+	if (ret) {
 		kfree(utmi);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init of_at91sam9x5_clk_utmi_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *parent_name;
 	const char *name = np->name;
 	struct regmap *regmap;

@@ -120,11 +124,11 @@ static void __init of_at91sam9x5_clk_utmi_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	clk = at91_clk_register_utmi(regmap, name, parent_name);
-	if (IS_ERR(clk))
+	hw = at91_clk_register_utmi(regmap, name, parent_name);
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 	return;
 }
 CLK_OF_DECLARE(at91sam9x5_clk_utmi, "atmel,at91sam9x5-clk-utmi",

Signature · 1 line

2.7.4

Signature · 3 lines

Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

Boris Brezillon

Acked-by

2016-06-07 16:40 UTC #4 lore raw

Re: [PATCH 02/34] clk: at91: Migrate to clk_hw based registration and OF APIs

Quoted 5 lines · On Tue, 7 Jun 2016 18:36:21 +0200 Alexandre Belloni…

Quoted 8 lines

Acked-by Boris Brezillon <[email protected]>

Quoted 1,347 lines

Quoted 1,346 lines

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/at91/clk-generated.c    | 30 +++++++------
 drivers/clk/at91/clk-h32mx.c        |  8 ++--
 drivers/clk/at91/clk-main.c         | 88 ++++++++++++++++++++++---------------
 drivers/clk/at91/clk-master.c       | 21 +++++----
 drivers/clk/at91/clk-peripheral.c   | 39 +++++++++-------
 drivers/clk/at91/clk-pll.c          | 21 +++++----
 drivers/clk/at91/clk-plldiv.c       | 24 +++++-----
 drivers/clk/at91/clk-programmable.c | 22 ++++++----
 drivers/clk/at91/clk-slow.c         | 88 ++++++++++++++++++++++---------------
 drivers/clk/at91/clk-smd.c          | 22 ++++++----
 drivers/clk/at91/clk-system.c       | 22 ++++++----
 drivers/clk/at91/clk-usb.c          | 69 +++++++++++++++++------------
 drivers/clk/at91/clk-utmi.c         | 22 ++++++----
 13 files changed, 277 insertions(+), 199 deletions(-)

drivers/clk/at91/clk-generated.c +17 ~~-13~~

index e1aa210dd7aa..8f1585b3abe5 100644
@@ -233,14 +233,16 @@ static void clk_generated_startup(struct clk_generated *gck)  
 					>> AT91_PMC_PCR_GCKDIV_OFFSET;  
 }
 
-static struct clk * __init
-at91_clk_register_generated(struct regmap *regmap,  spinlock_t *lock, const char
-			    *name, const char **parent_names, u8 num_parents,
-			    u8 id, const struct clk_range *range)
+static struct clk_hw * __init
+at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock,
+			    const char *name, const char **parent_names,
+			    u8 num_parents, u8 id,
+			    const struct clk_range *range)
 {
 	struct clk_generated *gck;
-	struct clk *clk = NULL;
 	struct clk_init_data init;
+	struct clk_hw *hw;
+	int ret;
 
 	gck = kzalloc(sizeof(*gck), GFP_KERNEL);
 	if (!gck)

@@ -258,13 +260,15 @@ at91_clk_register_generated(struct regmap *regmap,  spinlock_t *lock, const char
 	gck->lock = lock;
 	gck->range = *range;
 
-	clk = clk_register(NULL, &gck->hw);
-	if (IS_ERR(clk))
+	hw = &gck->hw;
+	ret = clk_hw_register(NULL, &gck->hw);
+	if (ret) {
 		kfree(gck);
-	else
+		hw = ERR_PTR(ret);
+	} else
 		clk_generated_startup(gck);
 
-	return clk;
+	return hw;
 }
 
 void __init of_sama5d2_clk_generated_setup(struct device_node *np)

@@ -272,7 +276,7 @@ void __init of_sama5d2_clk_generated_setup(struct device_node *np)
 	int num;
 	u32 id;
 	const char *name;
-	struct clk *clk;
+	struct clk_hw *hw;
 	unsigned int num_parents;
 	const char *parent_names[GENERATED_SOURCE_MAX];
 	struct device_node *gcknp;

@@ -306,13 +310,13 @@ void __init of_sama5d2_clk_generated_setup(struct device_node *np)
 		of_at91_get_clk_range(gcknp, "atmel,clk-output-range",
 				      &range);
 
-		clk = at91_clk_register_generated(regmap, &pmc_pcr_lock, name,
+		hw = at91_clk_register_generated(regmap, &pmc_pcr_lock, name,
 						  parent_names, num_parents,
 						  id, &range);
-		if (IS_ERR(clk))
+		if (IS_ERR(hw))
 			continue;
 
-		of_clk_add_provider(gcknp, of_clk_src_simple_get, clk);
+		of_clk_add_hw_provider(gcknp, of_clk_hw_simple_get, hw);
 	}
 }
 CLK_OF_DECLARE(of_sama5d2_clk_generated_setup, "atmel,sama5d2-clk-generated",

drivers/clk/at91/clk-h32mx.c +4 -4

index 8e20c8a76db7..e0daa4a31f88 100644
@@ -92,7 +92,7 @@ static void __init of_sama5d4_clk_h32mx_setup(struct device_node *np)
 	struct clk_init_data init;
 	const char *parent_name;
 	struct regmap *regmap;
-	struct clk *clk;
+	int ret;
 
 	regmap = syscon_node_to_regmap(of_get_parent(np));
 	if (IS_ERR(regmap))

@@ -113,13 +113,13 @@ static void __init of_sama5d4_clk_h32mx_setup(struct device_node *np)
 	h32mxclk->hw.init = &init;
 	h32mxclk->regmap = regmap;
 
-	clk = clk_register(NULL, &h32mxclk->hw);
-	if (IS_ERR(clk)) {
+	ret = clk_hw_register(NULL, &h32mxclk->hw);
+	if (ret) {
 		kfree(h32mxclk);
 		return;
 	}
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, &h32mxclk->hw);
 }
 CLK_OF_DECLARE(of_sama5d4_clk_h32mx_setup, "atmel,sama5d4-clk-h32mx",
 	       of_sama5d4_clk_h32mx_setup);

drivers/clk/at91/clk-main.c +52 ~~-36~~

index 58b5baca670c..c813c27f2e58 100644
@@ -128,15 +128,16 @@ static const struct clk_ops main_osc_ops = {
 	.is_prepared = clk_main_osc_is_prepared,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_main_osc(struct regmap *regmap,
 			   const char *name,
 			   const char *parent_name,
 			   bool bypass)
 {
 	struct clk_main_osc *osc;
-	struct clk *clk = NULL;
 	struct clk_init_data init;
+	struct clk_hw *hw;
+	int ret;
 
 	if (!name || !parent_name)
 		return ERR_PTR(-EINVAL);

@@ -160,16 +161,19 @@ at91_clk_register_main_osc(struct regmap *regmap,
 				   AT91_PMC_MOSCEN,
 				   AT91_PMC_OSCBYPASS | AT91_PMC_KEY);
 
-	clk = clk_register(NULL, &osc->hw);
-	if (IS_ERR(clk))
+	hw = &osc->hw;
+	ret = clk_hw_register(NULL, &osc->hw);
+	if (ret) {
 		kfree(osc);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init of_at91rm9200_clk_main_osc_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *name = np->name;
 	const char *parent_name;
 	struct regmap *regmap;

@@ -183,11 +187,11 @@ static void __init of_at91rm9200_clk_main_osc_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	clk = at91_clk_register_main_osc(regmap, name, parent_name, bypass);
-	if (IS_ERR(clk))
+	hw = at91_clk_register_main_osc(regmap, name, parent_name, bypass);
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(at91rm9200_clk_main_osc, "atmel,at91rm9200-clk-main-osc",
 	       of_at91rm9200_clk_main_osc_setup);

@@ -271,14 +275,15 @@ static const struct clk_ops main_rc_osc_ops = {
 	.recalc_accuracy = clk_main_rc_osc_recalc_accuracy,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_main_rc_osc(struct regmap *regmap,
 			      const char *name,
 			      u32 frequency, u32 accuracy)
 {
 	struct clk_main_rc_osc *osc;
-	struct clk *clk = NULL;
 	struct clk_init_data init;
+	struct clk_hw *hw;
+	int ret;
 
 	if (!name || !frequency)
 		return ERR_PTR(-EINVAL);

@@ -298,16 +303,19 @@ at91_clk_register_main_rc_osc(struct regmap *regmap,
 	osc->frequency = frequency;
 	osc->accuracy = accuracy;
 
-	clk = clk_register(NULL, &osc->hw);
-	if (IS_ERR(clk))
+	hw = &osc->hw;
+	ret = clk_hw_register(NULL, hw);
+	if (ret) {
 		kfree(osc);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init of_at91sam9x5_clk_main_rc_osc_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	u32 frequency = 0;
 	u32 accuracy = 0;
 	const char *name = np->name;

@@ -321,11 +329,11 @@ static void __init of_at91sam9x5_clk_main_rc_osc_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	clk = at91_clk_register_main_rc_osc(regmap, name, frequency, accuracy);
-	if (IS_ERR(clk))
+	hw = at91_clk_register_main_rc_osc(regmap, name, frequency, accuracy);
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(at91sam9x5_clk_main_rc_osc, "atmel,at91sam9x5-clk-main-rc-osc",
 	       of_at91sam9x5_clk_main_rc_osc_setup);

@@ -395,14 +403,15 @@ static const struct clk_ops rm9200_main_ops = {
 	.recalc_rate = clk_rm9200_main_recalc_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_rm9200_main(struct regmap *regmap,
 			      const char *name,
 			      const char *parent_name)
 {
 	struct clk_rm9200_main *clkmain;
-	struct clk *clk = NULL;
 	struct clk_init_data init;
+	struct clk_hw *hw;
+	int ret;
 
 	if (!name)
 		return ERR_PTR(-EINVAL);

@@ -423,16 +432,19 @@ at91_clk_register_rm9200_main(struct regmap *regmap,
 	clkmain->hw.init = &init;
 	clkmain->regmap = regmap;
 
-	clk = clk_register(NULL, &clkmain->hw);
-	if (IS_ERR(clk))
+	hw = &clkmain->hw;
+	ret = clk_hw_register(NULL, &clkmain->hw);
+	if (ret) {
 		kfree(clkmain);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init of_at91rm9200_clk_main_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *parent_name;
 	const char *name = np->name;
 	struct regmap *regmap;

@@ -444,11 +456,11 @@ static void __init of_at91rm9200_clk_main_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	clk = at91_clk_register_rm9200_main(regmap, name, parent_name);
-	if (IS_ERR(clk))
+	hw = at91_clk_register_rm9200_main(regmap, name, parent_name);
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(at91rm9200_clk_main, "atmel,at91rm9200-clk-main",
 	       of_at91rm9200_clk_main_setup);

@@ -529,16 +541,17 @@ static const struct clk_ops sam9x5_main_ops = {
 	.get_parent = clk_sam9x5_main_get_parent,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_sam9x5_main(struct regmap *regmap,
 			      const char *name,
 			      const char **parent_names,
 			      int num_parents)
 {
 	struct clk_sam9x5_main *clkmain;
-	struct clk *clk = NULL;
 	struct clk_init_data init;
 	unsigned int status;
+	struct clk_hw *hw;
+	int ret;
 
 	if (!name)
 		return ERR_PTR(-EINVAL);

@@ -561,16 +574,19 @@ at91_clk_register_sam9x5_main(struct regmap *regmap,
 	regmap_read(clkmain->regmap, AT91_CKGR_MOR, &status);
 	clkmain->parent = status & AT91_PMC_MOSCEN ? 1 : 0;
 
-	clk = clk_register(NULL, &clkmain->hw);
-	if (IS_ERR(clk))
+	hw = &clkmain->hw;
+	ret = clk_hw_register(NULL, &clkmain->hw);
+	if (ret) {
 		kfree(clkmain);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init of_at91sam9x5_clk_main_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *parent_names[2];
 	unsigned int num_parents;
 	const char *name = np->name;

@@ -587,12 +603,12 @@ static void __init of_at91sam9x5_clk_main_setup(struct device_node *np)
 
 	of_property_read_string(np, "clock-output-names", &name);
 
-	clk = at91_clk_register_sam9x5_main(regmap, name, parent_names,
+	hw = at91_clk_register_sam9x5_main(regmap, name, parent_names,
 					    num_parents);
-	if (IS_ERR(clk))
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(at91sam9x5_clk_main, "atmel,at91sam9x5-clk-main",
 	       of_at91sam9x5_clk_main_setup);

drivers/clk/at91/clk-master.c +12 -9

index d1021e106191..e9cba9fc26d7 100644
@@ -120,7 +120,7 @@ static const struct clk_ops master_ops = {
 	.get_parent = clk_master_get_parent,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_master(struct regmap *regmap,
 		const char *name, int num_parents,
 		const char **parent_names,

@@ -128,8 +128,9 @@ at91_clk_register_master(struct regmap *regmap,
 		const struct clk_master_characteristics *characteristics)
 {
 	struct clk_master *master;
-	struct clk *clk = NULL;
 	struct clk_init_data init;
+	struct clk_hw *hw;
+	int ret;
 
 	if (!name || !num_parents || !parent_names)
 		return ERR_PTR(-EINVAL);

@@ -149,12 +150,14 @@ at91_clk_register_master(struct regmap *regmap,
 	master->characteristics = characteristics;
 	master->regmap = regmap;
 
-	clk = clk_register(NULL, &master->hw);
-	if (IS_ERR(clk)) {
+	hw = &master->hw;
+	ret = clk_hw_register(NULL, &master->hw);
+	if (ret) {
 		kfree(master);
+		hw = ERR_PTR(ret);
 	}
 
-	return clk;
+	return hw;
 }

@@ -198,7 +201,7 @@ static void __init
 of_at91_clk_master_setup(struct device_node *np,
 			 const struct clk_master_layout *layout)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	unsigned int num_parents;
 	const char *parent_names[MASTER_SOURCE_MAX];
 	const char *name = np->name;

@@ -221,13 +224,13 @@ of_at91_clk_master_setup(struct device_node *np,
 	if (IS_ERR(regmap))
 		return;
 
-	clk = at91_clk_register_master(regmap, name, num_parents,
+	hw = at91_clk_register_master(regmap, name, num_parents,
 				       parent_names, layout,
 				       characteristics);
-	if (IS_ERR(clk))
+	if (IS_ERR(hw))
 		goto out_free_characteristics;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 	return;
 
 out_free_characteristics:

drivers/clk/at91/clk-peripheral.c +23 ~~-16~~

index fd160728e990..dc29fd979d3f 100644
@@ -104,13 +104,14 @@ static const struct clk_ops peripheral_ops = {
 	.is_enabled = clk_peripheral_is_enabled,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_peripheral(struct regmap *regmap, const char *name,
 			     const char *parent_name, u32 id)
 {
 	struct clk_peripheral *periph;
-	struct clk *clk = NULL;
 	struct clk_init_data init;
+	struct clk_hw *hw;
+	int ret;
 
 	if (!name || !parent_name || id > PERIPHERAL_ID_MAX)
 		return ERR_PTR(-EINVAL);

@@ -129,11 +130,14 @@ at91_clk_register_peripheral(struct regmap *regmap, const char *name,
 	periph->hw.init = &init;
 	periph->regmap = regmap;
 
-	clk = clk_register(NULL, &periph->hw);
-	if (IS_ERR(clk))
+	hw = &periph->hw;
+	ret = clk_hw_register(NULL, &periph->hw);
+	if (ret) {
 		kfree(periph);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void clk_sam9x5_peripheral_autodiv(struct clk_sam9x5_peripheral *periph)

@@ -327,14 +331,15 @@ static const struct clk_ops sam9x5_peripheral_ops = {
 	.set_rate = clk_sam9x5_peripheral_set_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
 				    const char *name, const char *parent_name,
 				    u32 id, const struct clk_range *range)
 {
 	struct clk_sam9x5_peripheral *periph;
-	struct clk *clk = NULL;
 	struct clk_init_data init;
+	struct clk_hw *hw;
+	int ret;
 
 	if (!name || !parent_name)
 		return ERR_PTR(-EINVAL);

@@ -357,13 +362,15 @@ at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
 	periph->auto_div = true;
 	periph->range = *range;
 
-	clk = clk_register(NULL, &periph->hw);
-	if (IS_ERR(clk))
+	hw = &periph->hw;
+	ret = clk_hw_register(NULL, &periph->hw);
+	if (ret) {
 		kfree(periph);
-	else
+		hw = ERR_PTR(ret);
+	} else
 		clk_sam9x5_peripheral_autodiv(periph);
 
-	return clk;
+	return hw;
 }
 
 static void __init

@@ -371,7 +378,7 @@ of_at91_clk_periph_setup(struct device_node *np, u8 type)
 {
 	int num;
 	u32 id;
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *parent_name;
 	const char *name;
 	struct device_node *periphclknp;

@@ -400,7 +407,7 @@ of_at91_clk_periph_setup(struct device_node *np, u8 type)
 			name = periphclknp->name;
 
 		if (type == PERIPHERAL_AT91RM9200) {
-			clk = at91_clk_register_peripheral(regmap, name,
+			hw = at91_clk_register_peripheral(regmap, name,
 							   parent_name, id);
 		} else {
 			struct clk_range range = CLK_RANGE(0, 0);

@@ -409,17 +416,17 @@ of_at91_clk_periph_setup(struct device_node *np, u8 type)
 					      "atmel,clk-output-range",
 					      &range);
 
-			clk = at91_clk_register_sam9x5_peripheral(regmap,
+			hw = at91_clk_register_sam9x5_peripheral(regmap,
 								  &pmc_pcr_lock,
 								  name,
 								  parent_name,
 								  id, &range);
 		}
 
-		if (IS_ERR(clk))
+		if (IS_ERR(hw))
 			continue;
 
-		of_clk_add_provider(periphclknp, of_clk_src_simple_get, clk);
+		of_clk_add_hw_provider(periphclknp, of_clk_hw_simple_get, hw);
 	}
 }

drivers/clk/at91/clk-pll.c +12 -9

index fb2e0b56d4b7..45ad168e1496 100644
@@ -296,17 +296,18 @@ static const struct clk_ops pll_ops = {
 	.set_rate = clk_pll_set_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_pll(struct regmap *regmap, const char *name,
 		      const char *parent_name, u8 id,
 		      const struct clk_pll_layout *layout,
 		      const struct clk_pll_characteristics *characteristics)
 {
 	struct clk_pll *pll;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
 	int offset = PLL_REG(id);
 	unsigned int pllr;
+	int ret;
 
 	if (id > PLL_MAX_ID)
 		return ERR_PTR(-EINVAL);

@@ -330,12 +331,14 @@ at91_clk_register_pll(struct regmap *regmap, const char *name,
 	pll->div = PLL_DIV(pllr);
 	pll->mul = PLL_MUL(pllr, layout);
 
-	clk = clk_register(NULL, &pll->hw);
-	if (IS_ERR(clk)) {
+	hw = &pll->hw;
+	ret = clk_hw_register(NULL, &pll->hw);
+	if (ret) {
 		kfree(pll);
+		hw = ERR_PTR(ret);
 	}
 
-	return clk;
+	return hw;
 }

@@ -465,7 +468,7 @@ of_at91_clk_pll_setup(struct device_node *np,
 		      const struct clk_pll_layout *layout)
 {
 	u32 id;
-	struct clk *clk;
+	struct clk_hw *hw;
 	struct regmap *regmap;
 	const char *parent_name;
 	const char *name = np->name;

@@ -486,12 +489,12 @@ of_at91_clk_pll_setup(struct device_node *np,
 	if (!characteristics)
 		return;
 
-	clk = at91_clk_register_pll(regmap, name, parent_name, id, layout,
+	hw = at91_clk_register_pll(regmap, name, parent_name, id, layout,
 				    characteristics);
-	if (IS_ERR(clk))
+	if (IS_ERR(hw))
 		goto out_free_characteristics;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 	return;
 
 out_free_characteristics:

drivers/clk/at91/clk-plldiv.c +13 ~~-11~~

index 2bed26481027..b4afaf22f3fd 100644
@@ -75,13 +75,14 @@ static const struct clk_ops plldiv_ops = {
 	.set_rate = clk_plldiv_set_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_plldiv(struct regmap *regmap, const char *name,
 			 const char *parent_name)
 {
 	struct clk_plldiv *plldiv;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	plldiv = kzalloc(sizeof(*plldiv), GFP_KERNEL);
 	if (!plldiv)

@@ -96,18 +97,20 @@ at91_clk_register_plldiv(struct regmap *regmap, const char *name,
 	plldiv->hw.init = &init;
 	plldiv->regmap = regmap;
 
-	clk = clk_register(NULL, &plldiv->hw);
-
-	if (IS_ERR(clk))
+	hw = &plldiv->hw;
+	ret = clk_hw_register(NULL, &plldiv->hw);
+	if (ret) {
 		kfree(plldiv);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init
 of_at91sam9x5_clk_plldiv_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *parent_name;
 	const char *name = np->name;
 	struct regmap *regmap;

@@ -120,12 +123,11 @@ of_at91sam9x5_clk_plldiv_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	clk = at91_clk_register_plldiv(regmap, name, parent_name);
-	if (IS_ERR(clk))
+	hw = at91_clk_register_plldiv(regmap, name, parent_name);
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
-	return;
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(at91sam9x5_clk_plldiv, "atmel,at91sam9x5-clk-plldiv",
 	       of_at91sam9x5_clk_plldiv_setup);

drivers/clk/at91/clk-programmable.c +13 -9

index 10f846cc8db1..4e30899753e6 100644
@@ -170,15 +170,16 @@ static const struct clk_ops programmable_ops = {
 	.set_rate = clk_programmable_set_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_programmable(struct regmap *regmap,
 			       const char *name, const char **parent_names,
 			       u8 num_parents, u8 id,
 			       const struct clk_programmable_layout *layout)
 {
 	struct clk_programmable *prog;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	if (id > PROG_ID_MAX)
 		return ERR_PTR(-EINVAL);

@@ -198,11 +199,14 @@ at91_clk_register_programmable(struct regmap *regmap,
 	prog->hw.init = &init;
 	prog->regmap = regmap;
 
-	clk = clk_register(NULL, &prog->hw);
-	if (IS_ERR(clk))
+	hw = &prog->hw;
+	ret = clk_hw_register(NULL, &prog->hw);
+	if (ret) {
 		kfree(prog);
+		hw = &prog->hw;
+	}
 
-	return clk;
+	return hw;
 }
 
 static const struct clk_programmable_layout at91rm9200_programmable_layout = {

@@ -229,7 +233,7 @@ of_at91_clk_prog_setup(struct device_node *np,
 {
 	int num;
 	u32 id;
-	struct clk *clk;
+	struct clk_hw *hw;
 	unsigned int num_parents;
 	const char *parent_names[PROG_SOURCE_MAX];
 	const char *name;

@@ -257,13 +261,13 @@ of_at91_clk_prog_setup(struct device_node *np,
 		if (of_property_read_string(np, "clock-output-names", &name))
 			name = progclknp->name;
 
-		clk = at91_clk_register_programmable(regmap, name,
+		hw = at91_clk_register_programmable(regmap, name,
 						     parent_names, num_parents,
 						     id, layout);
-		if (IS_ERR(clk))
+		if (IS_ERR(hw))
 			continue;
 
-		of_clk_add_provider(progclknp, of_clk_src_simple_get, clk);
+		of_clk_add_hw_provider(progclknp, of_clk_hw_simple_get, hw);
 	}
 }

drivers/clk/at91/clk-slow.c +52 ~~-36~~

index 61090b1146cf..cd831e19ba72 100644
@@ -111,7 +111,7 @@ static const struct clk_ops slow_osc_ops = {
 	.is_prepared = clk_slow_osc_is_prepared,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_slow_osc(void __iomem *sckcr,
 			   const char *name,
 			   const char *parent_name,

@@ -119,8 +119,9 @@ at91_clk_register_slow_osc(void __iomem *sckcr,
 			   bool bypass)
 {
 	struct clk_slow_osc *osc;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	if (!sckcr || !name || !parent_name)
 		return ERR_PTR(-EINVAL);

@@ -143,17 +144,20 @@ at91_clk_register_slow_osc(void __iomem *sckcr,
 		writel((readl(sckcr) & ~AT91_SCKC_OSC32EN) | AT91_SCKC_OSC32BYP,
 		       sckcr);
 
-	clk = clk_register(NULL, &osc->hw);
-	if (IS_ERR(clk))
+	hw = &osc->hw;
+	ret = clk_hw_register(NULL, &osc->hw);
+	if (ret) {
 		kfree(osc);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np,
 					     void __iomem *sckcr)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *parent_name;
 	const char *name = np->name;
 	u32 startup;

@@ -164,12 +168,12 @@ void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np,
 	of_property_read_u32(np, "atmel,startup-time-usec", &startup);
 	bypass = of_property_read_bool(np, "atmel,osc-bypass");
 
-	clk = at91_clk_register_slow_osc(sckcr, name, parent_name, startup,
+	hw = at91_clk_register_slow_osc(sckcr, name, parent_name, startup,
 					 bypass);
-	if (IS_ERR(clk))
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 
 static unsigned long clk_slow_rc_osc_recalc_rate(struct clk_hw *hw,

@@ -223,7 +227,7 @@ static const struct clk_ops slow_rc_osc_ops = {
 	.recalc_accuracy = clk_slow_rc_osc_recalc_accuracy,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_slow_rc_osc(void __iomem *sckcr,
 			      const char *name,
 			      unsigned long frequency,

@@ -231,8 +235,9 @@ at91_clk_register_slow_rc_osc(void __iomem *sckcr,
 			      unsigned long startup)
 {
 	struct clk_slow_rc_osc *osc;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	if (!sckcr || !name)
 		return ERR_PTR(-EINVAL);

@@ -253,17 +258,20 @@ at91_clk_register_slow_rc_osc(void __iomem *sckcr,
 	osc->accuracy = accuracy;
 	osc->startup_usec = startup;
 
-	clk = clk_register(NULL, &osc->hw);
-	if (IS_ERR(clk))
+	hw = &osc->hw;
+	ret = clk_hw_register(NULL, &osc->hw);
+	if (ret) {
 		kfree(osc);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np,
 						void __iomem *sckcr)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	u32 frequency = 0;
 	u32 accuracy = 0;
 	u32 startup = 0;

@@ -274,12 +282,12 @@ void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np,
 	of_property_read_u32(np, "clock-accuracy", &accuracy);
 	of_property_read_u32(np, "atmel,startup-time-usec", &startup);
 
-	clk = at91_clk_register_slow_rc_osc(sckcr, name, frequency, accuracy,
+	hw = at91_clk_register_slow_rc_osc(sckcr, name, frequency, accuracy,
 					    startup);
-	if (IS_ERR(clk))
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 
 static int clk_sam9x5_slow_set_parent(struct clk_hw *hw, u8 index)

@@ -321,15 +329,16 @@ static const struct clk_ops sam9x5_slow_ops = {
 	.get_parent = clk_sam9x5_slow_get_parent,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_sam9x5_slow(void __iomem *sckcr,
 			      const char *name,
 			      const char **parent_names,
 			      int num_parents)
 {
 	struct clk_sam9x5_slow *slowck;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	if (!sckcr || !name || !parent_names || !num_parents)
 		return ERR_PTR(-EINVAL);

@@ -348,17 +357,20 @@ at91_clk_register_sam9x5_slow(void __iomem *sckcr,
 	slowck->sckcr = sckcr;
 	slowck->parent = !!(readl(sckcr) & AT91_SCKC_OSCSEL);
 
-	clk = clk_register(NULL, &slowck->hw);
-	if (IS_ERR(clk))
+	hw = &slowck->hw;
+	ret = clk_hw_register(NULL, &slowck->hw);
+	if (ret) {
 		kfree(slowck);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 void __init of_at91sam9x5_clk_slow_setup(struct device_node *np,
 					 void __iomem *sckcr)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *parent_names[2];
 	unsigned int num_parents;
 	const char *name = np->name;

@@ -371,12 +383,12 @@ void __init of_at91sam9x5_clk_slow_setup(struct device_node *np,
 
 	of_property_read_string(np, "clock-output-names", &name);
 
-	clk = at91_clk_register_sam9x5_slow(sckcr, name, parent_names,
+	hw = at91_clk_register_sam9x5_slow(sckcr, name, parent_names,
 					    num_parents);
-	if (IS_ERR(clk))
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 
 static u8 clk_sam9260_slow_get_parent(struct clk_hw *hw)

@@ -393,15 +405,16 @@ static const struct clk_ops sam9260_slow_ops = {
 	.get_parent = clk_sam9260_slow_get_parent,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_sam9260_slow(struct regmap *regmap,
 			       const char *name,
 			       const char **parent_names,
 			       int num_parents)
 {
 	struct clk_sam9260_slow *slowck;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	if (!name)
 		return ERR_PTR(-EINVAL);

@@ -422,16 +435,19 @@ at91_clk_register_sam9260_slow(struct regmap *regmap,
 	slowck->hw.init = &init;
 	slowck->regmap = regmap;
 
-	clk = clk_register(NULL, &slowck->hw);
-	if (IS_ERR(clk))
+	hw = &slowck->hw;
+	ret = clk_hw_register(NULL, &slowck->hw);
+	if (ret) {
 		kfree(slowck);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init of_at91sam9260_clk_slow_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *parent_names[2];
 	unsigned int num_parents;
 	const char *name = np->name;

@@ -448,12 +464,12 @@ static void __init of_at91sam9260_clk_slow_setup(struct device_node *np)
 
 	of_property_read_string(np, "clock-output-names", &name);
 
-	clk = at91_clk_register_sam9260_slow(regmap, name, parent_names,
+	hw = at91_clk_register_sam9260_slow(regmap, name, parent_names,
 					     num_parents);
-	if (IS_ERR(clk))
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 
 CLK_OF_DECLARE(at91sam9260_clk_slow, "atmel,at91sam9260-clk-slow",

drivers/clk/at91/clk-smd.c +13 -9

index 3c04b069d5b8..965c662b90a5 100644
@@ -111,13 +111,14 @@ static const struct clk_ops at91sam9x5_smd_ops = {
 	.set_rate = at91sam9x5_clk_smd_set_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name,
 			    const char **parent_names, u8 num_parents)
 {
 	struct at91sam9x5_clk_smd *smd;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	smd = kzalloc(sizeof(*smd), GFP_KERNEL);
 	if (!smd)

@@ -132,16 +133,19 @@ at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name,
 	smd->hw.init = &init;
 	smd->regmap = regmap;
 
-	clk = clk_register(NULL, &smd->hw);
-	if (IS_ERR(clk))
+	hw = &smd->hw;
+	ret = clk_hw_register(NULL, &smd->hw);
+	if (ret) {
 		kfree(smd);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init of_at91sam9x5_clk_smd_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	unsigned int num_parents;
 	const char *parent_names[SMD_SOURCE_MAX];
 	const char *name = np->name;

@@ -159,12 +163,12 @@ static void __init of_at91sam9x5_clk_smd_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	clk = at91sam9x5_clk_register_smd(regmap, name, parent_names,
+	hw = at91sam9x5_clk_register_smd(regmap, name, parent_names,
 					  num_parents);
-	if (IS_ERR(clk))
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(at91sam9x5_clk_smd, "atmel,at91sam9x5-clk-smd",
 	       of_at91sam9x5_clk_smd_setup);

drivers/clk/at91/clk-system.c +13 -9

index 8f35d8172909..86a36809765d 100644
@@ -88,13 +88,14 @@ static const struct clk_ops system_ops = {
 	.is_prepared = clk_system_is_prepared,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_system(struct regmap *regmap, const char *name,
 			 const char *parent_name, u8 id)
 {
 	struct clk_system *sys;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	if (!parent_name || id > SYSTEM_MAX_ID)
 		return ERR_PTR(-EINVAL);

@@ -113,18 +114,21 @@ at91_clk_register_system(struct regmap *regmap, const char *name,
 	sys->hw.init = &init;
 	sys->regmap = regmap;
 
-	clk = clk_register(NULL, &sys->hw);
-	if (IS_ERR(clk))
+	hw = &sys->hw;
+	ret = clk_hw_register(NULL, &sys->hw);
+	if (ret) {
 		kfree(sys);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init of_at91rm9200_clk_sys_setup(struct device_node *np)
 {
 	int num;
 	u32 id;
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *name;
 	struct device_node *sysclknp;
 	const char *parent_name;

@@ -147,11 +151,11 @@ static void __init of_at91rm9200_clk_sys_setup(struct device_node *np)
 
 		parent_name = of_clk_get_parent_name(sysclknp, 0);
 
-		clk = at91_clk_register_system(regmap, name, parent_name, id);
-		if (IS_ERR(clk))
+		hw = at91_clk_register_system(regmap, name, parent_name, id);
+		if (IS_ERR(hw))
 			continue;
 
-		of_clk_add_provider(sysclknp, of_clk_src_simple_get, clk);
+		of_clk_add_hw_provider(sysclknp, of_clk_hw_simple_get, hw);
 	}
 }
 CLK_OF_DECLARE(at91rm9200_clk_sys, "atmel,at91rm9200-clk-system",

drivers/clk/at91/clk-usb.c +40 ~~-29~~

index d80bdb0a8b02..791770a563fc 100644
@@ -192,13 +192,14 @@ static const struct clk_ops at91sam9n12_usb_ops = {
 	.set_rate = at91sam9x5_clk_usb_set_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name,
 			    const char **parent_names, u8 num_parents)
 {
 	struct at91sam9x5_clk_usb *usb;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	usb = kzalloc(sizeof(*usb), GFP_KERNEL);
 	if (!usb)

@@ -214,20 +215,24 @@ at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name,
 	usb->hw.init = &init;
 	usb->regmap = regmap;
 
-	clk = clk_register(NULL, &usb->hw);
-	if (IS_ERR(clk))
+	hw = &usb->hw;
+	ret = clk_hw_register(NULL, &usb->hw);
+	if (ret) {
 		kfree(usb);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
-static struct clk * __init
+static struct clk_hw * __init
 at91sam9n12_clk_register_usb(struct regmap *regmap, const char *name,
 			     const char *parent_name)
 {
 	struct at91sam9x5_clk_usb *usb;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	usb = kzalloc(sizeof(*usb), GFP_KERNEL);
 	if (!usb)

@@ -242,11 +247,14 @@ at91sam9n12_clk_register_usb(struct regmap *regmap, const char *name,
 	usb->hw.init = &init;
 	usb->regmap = regmap;
 
-	clk = clk_register(NULL, &usb->hw);
-	if (IS_ERR(clk))
+	hw = &usb->hw;
+	ret = clk_hw_register(NULL, &usb->hw);
+	if (ret) {
 		kfree(usb);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static unsigned long at91rm9200_clk_usb_recalc_rate(struct clk_hw *hw,

@@ -334,13 +342,14 @@ static const struct clk_ops at91rm9200_usb_ops = {
 	.set_rate = at91rm9200_clk_usb_set_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91rm9200_clk_register_usb(struct regmap *regmap, const char *name,
 			    const char *parent_name, const u32 *divisors)
 {
 	struct at91rm9200_clk_usb *usb;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	usb = kzalloc(sizeof(*usb), GFP_KERNEL);
 	if (!usb)

@@ -356,16 +365,19 @@ at91rm9200_clk_register_usb(struct regmap *regmap, const char *name,
 	usb->regmap = regmap;
 	memcpy(usb->divisors, divisors, sizeof(usb->divisors));
 
-	clk = clk_register(NULL, &usb->hw);
-	if (IS_ERR(clk))
+	hw = &usb->hw;
+	ret = clk_hw_register(NULL, &usb->hw);
+	if (ret) {
 		kfree(usb);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init of_at91sam9x5_clk_usb_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	unsigned int num_parents;
 	const char *parent_names[USB_SOURCE_MAX];
 	const char *name = np->name;

@@ -383,19 +395,19 @@ static void __init of_at91sam9x5_clk_usb_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	clk = at91sam9x5_clk_register_usb(regmap, name, parent_names,
-					  num_parents);
-	if (IS_ERR(clk))
+	hw = at91sam9x5_clk_register_usb(regmap, name, parent_names,
+					 num_parents);
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(at91sam9x5_clk_usb, "atmel,at91sam9x5-clk-usb",
 	       of_at91sam9x5_clk_usb_setup);
 
 static void __init of_at91sam9n12_clk_usb_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *parent_name;
 	const char *name = np->name;
 	struct regmap *regmap;

@@ -410,18 +422,18 @@ static void __init of_at91sam9n12_clk_usb_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	clk = at91sam9n12_clk_register_usb(regmap, name, parent_name);
-	if (IS_ERR(clk))
+	hw = at91sam9n12_clk_register_usb(regmap, name, parent_name);
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(at91sam9n12_clk_usb, "atmel,at91sam9n12-clk-usb",
 	       of_at91sam9n12_clk_usb_setup);
 
 static void __init of_at91rm9200_clk_usb_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *parent_name;
 	const char *name = np->name;
 	u32 divisors[4] = {0, 0, 0, 0};

@@ -440,12 +452,11 @@ static void __init of_at91rm9200_clk_usb_setup(struct device_node *np)
 	regmap = syscon_node_to_regmap(of_get_parent(np));
 	if (IS_ERR(regmap))
 		return;
-
-	clk = at91rm9200_clk_register_usb(regmap, name, parent_name, divisors);
-	if (IS_ERR(clk))
+	hw = at91rm9200_clk_register_usb(regmap, name, parent_name, divisors);
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(at91rm9200_clk_usb, "atmel,at91rm9200-clk-usb",
 	       of_at91rm9200_clk_usb_setup);

drivers/clk/at91/clk-utmi.c +13 -9

index 61fcf399e58c..aadabd9d1e2b 100644
@@ -77,13 +77,14 @@ static const struct clk_ops utmi_ops = {
 	.recalc_rate = clk_utmi_recalc_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 at91_clk_register_utmi(struct regmap *regmap,
 		       const char *name, const char *parent_name)
 {
 	struct clk_utmi *utmi;
-	struct clk *clk = NULL;
+	struct clk_hw *hw;
 	struct clk_init_data init;
+	int ret;
 
 	utmi = kzalloc(sizeof(*utmi), GFP_KERNEL);
 	if (!utmi)

@@ -98,16 +99,19 @@ at91_clk_register_utmi(struct regmap *regmap,
 	utmi->hw.init = &init;
 	utmi->regmap = regmap;
 
-	clk = clk_register(NULL, &utmi->hw);
-	if (IS_ERR(clk))
+	hw = &utmi->hw;
+	ret = clk_hw_register(NULL, &utmi->hw);
+	if (ret) {
 		kfree(utmi);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init of_at91sam9x5_clk_utmi_setup(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *parent_name;
 	const char *name = np->name;
 	struct regmap *regmap;

@@ -120,11 +124,11 @@ static void __init of_at91sam9x5_clk_utmi_setup(struct device_node *np)
 	if (IS_ERR(regmap))
 		return;
 
-	clk = at91_clk_register_utmi(regmap, name, parent_name);
-	if (IS_ERR(clk))
+	hw = at91_clk_register_utmi(regmap, name, parent_name);
+	if (IS_ERR(hw))
 		return;
 
-	of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 	return;
 }
 CLK_OF_DECLARE(at91sam9x5_clk_utmi, "atmel,at91sam9x5-clk-utmi",

Signature · 1 line

2.7.4

Signature · 3 lines

Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Stephen Boyd

2016-09-15 00:39 UTC #5 lore raw

Re: [PATCH 02/34] clk: at91: Migrate to clk_hw based registration and OF APIs

Quoted 12 lines · Boris Brezillon

Quoted 7 lines

Ok I fixed the alignment and pushed to clk-next.

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #6 lore raw

PATCH 3/34 clk: highbank: Migrate to clk_hw based registration and OF APIs

In reply to Stephen Boyd

Now that we have clk_hw based provider APIs to register clks, we can get rid of struct clk pointers in this driver, allowing us to move closer to a clear split of consumer and provider clk APIs.

Cc Rob Herring <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-highbank.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

drivers/clk/clk-highbank.c +4 -5

index be3a21abb185..727ed8e1bb72 100644
@@ -275,7 +275,6 @@ static const struct clk_ops periclk_ops = {
 static __init struct clk *hb_clk_init(struct device_node *node, const struct clk_ops *ops)
 {
 	u32 reg;
-	struct clk *clk;
 	struct hb_clk *hb_clk;
 	const char *clk_name = node->name;
 	const char *parent_name;

@@ -308,13 +307,13 @@ static __init struct clk *hb_clk_init(struct device_node *node, const struct clk
 
 	hb_clk->hw.init = &init;
 
-	clk = clk_register(NULL, &hb_clk->hw);
-	if (WARN_ON(IS_ERR(clk))) {
+	rc = clk_hw_register(NULL, &hb_clk->hw);
+	if (WARN_ON(rc)) {
 		kfree(hb_clk);
 		return NULL;
 	}
-	rc = of_clk_add_provider(node, of_clk_src_simple_get, clk);
-	return clk;
+	rc = of_clk_add_hw_provider(node, of_clk_hw_simple_get, &hb_clk->hw);
+	return hb_clk->hw.clk;
 }
 
 static void __init hb_pll_init(struct device_node *node)

Signature · 1 line

2.7.4

Rob Herring

Acked-by on v1 3/34

2016-06-02 01:02 UTC #7 lore raw

Re: [PATCH 03/34] clk: highbank: Migrate to clk_hw based registration and OF APIs

Quoted 5 lines · Stephen Boyd

Acked-by Rob Herring <[email protected]>

Quoted 42 lines

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-highbank.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

drivers/clk/clk-highbank.c +4 -6

index be3a21abb185..727ed8e1bb72 100644
@@ -275,7 +275,6 @@ static const struct clk_ops periclk_ops = {
 static __init struct clk *hb_clk_init(struct device_node *node, const struct clk_ops *ops)
 {
        u32 reg;
-       struct clk *clk;
        struct hb_clk *hb_clk;
        const char *clk_name = node->name;
        const char *parent_name;

@@ -308,13 +307,13 @@ static __init struct clk *hb_clk_init(struct device_node *node, const struct clk
 
        hb_clk->hw.init = &init;
 
-       clk = clk_register(NULL, &hb_clk->hw);
-       if (WARN_ON(IS_ERR(clk))) {
+       rc = clk_hw_register(NULL, &hb_clk->hw);
+       if (WARN_ON(rc)) {
                kfree(hb_clk);
                return NULL;
        }
-       rc = of_clk_add_provider(node, of_clk_src_simple_get, clk);
-       return clk;
+       rc = of_clk_add_hw_provider(node, of_clk_hw_simple_get, &hb_clk->hw);
+       return hb_clk->hw.clk;
 }
 
 static void __init hb_pll_init(struct device_node *node)
--

2.7.4

Stephen Boyd

Applied

2016-06-30 19:25 UTC #8 lore raw

Re: [PATCH 03/34] clk: highbank: Migrate to clk_hw based registration and OF APIs

In reply to Stephen Boyd

Quoted 7 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #9 lore raw

PATCH 4/34 clk: bcm2835: Migrate to clk_hw based registration and OF APIs

In reply to Stephen Boyd

Cc Eric Anholt <[email protected]>

Cc Martin Sperl <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/bcm/clk-bcm2835-aux.c | 28 ++++++-------
 drivers/clk/bcm/clk-bcm2835.c     | 83 +++++++++++++++++++++------------------
 2 files changed, 57 insertions(+), 54 deletions(-)

drivers/clk/bcm/clk-bcm2835-aux.c +12 ~~-16~~

index 3a177ade6e6c..bd750cf2238d 100644
@@ -25,7 +25,7 @@
 static int bcm2835_aux_clk_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
-	struct clk_onecell_data *onecell;
+	struct clk_hw_onecell_data *onecell;
 	const char *parent;
 	struct clk *parent_clk;
 	struct resource *res;

@@ -41,28 +41,24 @@ static int bcm2835_aux_clk_probe(struct platform_device *pdev)
 	if (IS_ERR(reg))
 		return PTR_ERR(reg);
 
-	onecell = devm_kmalloc(dev, sizeof(*onecell), GFP_KERNEL);
+	onecell = devm_kmalloc(dev, sizeof(*onecell) + sizeof(*onecell->hws) *
+			       BCM2835_AUX_CLOCK_COUNT, GFP_KERNEL);
 	if (!onecell)
 		return -ENOMEM;
-	onecell->clk_num = BCM2835_AUX_CLOCK_COUNT;
-	onecell->clks = devm_kcalloc(dev, BCM2835_AUX_CLOCK_COUNT,
-				     sizeof(*onecell->clks), GFP_KERNEL);
-	if (!onecell->clks)
-		return -ENOMEM;
+	onecell->num = BCM2835_AUX_CLOCK_COUNT;
 
 	gate = reg + BCM2835_AUXENB;
-	onecell->clks[BCM2835_AUX_CLOCK_UART] =
-		clk_register_gate(dev, "aux_uart", parent, 0, gate, 0, 0, NULL);
-
-	onecell->clks[BCM2835_AUX_CLOCK_SPI1] =
-		clk_register_gate(dev, "aux_spi1", parent, 0, gate, 1, 0, NULL);
+	onecell->hws[BCM2835_AUX_CLOCK_UART] =
+		clk_hw_register_gate(dev, "aux_uart", parent, 0, gate, 0, 0, NULL);
 
-	onecell->clks[BCM2835_AUX_CLOCK_SPI2] =
-		clk_register_gate(dev, "aux_spi2", parent, 0, gate, 2, 0, NULL);
+	onecell->hws[BCM2835_AUX_CLOCK_SPI1] =
+		clk_hw_register_gate(dev, "aux_spi1", parent, 0, gate, 1, 0, NULL);
 
-	of_clk_add_provider(pdev->dev.of_node, of_clk_src_onecell_get, onecell);
+	onecell->hws[BCM2835_AUX_CLOCK_SPI2] =
+		clk_hw_register_gate(dev, "aux_spi2", parent, 0, gate, 2, 0, NULL);
 
-	return 0;
+	return of_clk_add_hw_provider(pdev->dev.of_node, of_clk_hw_onecell_get,
+				      onecell);
 }
 
 static const struct of_device_id bcm2835_aux_clk_of_match[] = {

drivers/clk/bcm/clk-bcm2835.c +45 ~~-38~~

185 lines not on this page · raw message

Signature · 1 line

2.7.4

Eric Anholt

2016-06-02 18:25 UTC #10 lore raw

Re: [PATCH 04/34] clk: bcm2835: Migrate to clk_hw based registration and OF APIs

Quoted 4 lines · Stephen Boyd

This looks good, but it'll conflict with the fixes for 4.7. Could we
land those first and then put this commit on top of that?
-------------- next part --------------
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Stephen Boyd

2016-09-15 00:36 UTC #11 lore raw

Re: [PATCH 04/34] clk: bcm2835: Migrate to clk_hw based registration and OF APIs

Quoted 9 lines · Eric Anholt

Done and merged to clk-next.

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #12 lore raw

PATCH 5/34 clk: bcm: iproc: Migrate to clk_hw based registration and OF APIs

In reply to Stephen Boyd

Cc Ray Jui <[email protected]>

Cc Jon Mason <[email protected]>

Cc Simran Rai <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/bcm/clk-iproc-armpll.c |  9 ++++-----
 drivers/clk/bcm/clk-iproc-asiu.c   | 27 +++++++++++++--------------
 drivers/clk/bcm/clk-iproc-pll.c    | 32 ++++++++++++++++----------------
 3 files changed, 33 insertions(+), 35 deletions(-)

drivers/clk/bcm/clk-iproc-armpll.c +4 -5

index a196ee28a17a..2924abc4470f 100644
@@ -242,7 +242,6 @@ static const struct clk_ops iproc_arm_pll_ops = {
 void __init iproc_armpll_setup(struct device_node *node)
 {
 	int ret;
-	struct clk *clk;
 	struct iproc_arm_pll *pll;
 	struct clk_init_data init;
 	const char *parent_name;

@@ -263,18 +262,18 @@ void __init iproc_armpll_setup(struct device_node *node)
 	init.num_parents = (parent_name ? 1 : 0);
 	pll->hw.init = &init;
 
-	clk = clk_register(NULL, &pll->hw);
-	if (WARN_ON(IS_ERR(clk)))
+	ret = clk_hw_register(NULL, &pll->hw);
+	if (WARN_ON(ret))
 		goto err_iounmap;
 
-	ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);
+	ret = of_clk_add_hw_provider(node, of_clk_hw_simple_get, &pll->hw);
 	if (WARN_ON(ret))
 		goto err_clk_unregister;
 
 	return;
 
 err_clk_unregister:
-	clk_unregister(clk);
+	clk_hw_unregister(&pll->hw);
 err_iounmap:
 	iounmap(pll->base);
 err_free_pll:

drivers/clk/bcm/clk-iproc-asiu.c +13 ~~-14~~

index f630e1bbdcfe..4360e481368b 100644
@@ -37,7 +37,7 @@ struct iproc_asiu {
 	void __iomem *div_base;
 	void __iomem *gate_base;
 
-	struct clk_onecell_data clk_data;
+	struct clk_hw_onecell_data *clk_data;
 	struct iproc_asiu_clk *clks;
 };

@@ -197,11 +197,11 @@ void __init iproc_asiu_setup(struct device_node *node,
 	if (WARN_ON(!asiu))
 		return;
 
-	asiu->clk_data.clk_num = num_clks;
-	asiu->clk_data.clks = kcalloc(num_clks, sizeof(*asiu->clk_data.clks),
-				      GFP_KERNEL);
-	if (WARN_ON(!asiu->clk_data.clks))
+	asiu->clk_data = kzalloc(sizeof(*asiu->clk_data->hws) * num_clks +
+				 sizeof(*asiu->clk_data), GFP_KERNEL);
+	if (WARN_ON(!asiu->clk_data))
 		goto err_clks;
+	asiu->clk_data->num = num_clks;
 
 	asiu->clks = kcalloc(num_clks, sizeof(*asiu->clks), GFP_KERNEL);
 	if (WARN_ON(!asiu->clks))

@@ -217,7 +217,6 @@ void __init iproc_asiu_setup(struct device_node *node,
 
 	for (i = 0; i < num_clks; i++) {
 		struct clk_init_data init;
-		struct clk *clk;
 		const char *parent_name;
 		struct iproc_asiu_clk *asiu_clk;
 		const char *clk_name;

@@ -240,22 +239,22 @@ void __init iproc_asiu_setup(struct device_node *node,
 		init.num_parents = (parent_name ? 1 : 0);
 		asiu_clk->hw.init = &init;
 
-		clk = clk_register(NULL, &asiu_clk->hw);
-		if (WARN_ON(IS_ERR(clk)))
+		ret = clk_hw_register(NULL, &asiu_clk->hw);
+		if (WARN_ON(ret))
 			goto err_clk_register;
-		asiu->clk_data.clks[i] = clk;
+		asiu->clk_data->hws[i] = &asiu_clk->hw;
 	}
 
-	ret = of_clk_add_provider(node, of_clk_src_onecell_get,
-				  &asiu->clk_data);
+	ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get,
+				     asiu->clk_data);
 	if (WARN_ON(ret))
 		goto err_clk_register;
 
 	return;
 
 err_clk_register:
-	for (i = 0; i < num_clks; i++)
-		clk_unregister(asiu->clk_data.clks[i]);
+	while (--i >= 0)
+		clk_hw_unregister(asiu->clk_data->hws[i]);
 	iounmap(asiu->gate_base);
 
 err_iomap_gate:

@@ -265,7 +264,7 @@ err_iomap_div:
 	kfree(asiu->clks);
 
 err_asiu_clks:
-	kfree(asiu->clk_data.clks);
+	kfree(asiu->clk_data);
 
 err_clks:
 	kfree(asiu);

drivers/clk/bcm/clk-iproc-pll.c +16 ~~-16~~

index fd492a5dad12..e04634c46395 100644
@@ -89,7 +89,7 @@ struct iproc_pll {
 	const struct iproc_pll_vco_param *vco_param;
 	unsigned int num_vco_entries;
 
-	struct clk_onecell_data clk_data;
+	struct clk_hw_onecell_data *clk_data;
 	struct iproc_clk *clks;
 };

@@ -625,7 +625,6 @@ void __init iproc_pll_clk_setup(struct device_node *node,
 				unsigned int num_clks)
 {
 	int i, ret;
-	struct clk *clk;
 	struct iproc_pll *pll;
 	struct iproc_clk *iclk;
 	struct clk_init_data init;

@@ -638,11 +637,11 @@ void __init iproc_pll_clk_setup(struct device_node *node,
 	if (WARN_ON(!pll))
 		return;
 
-	pll->clk_data.clk_num = num_clks;
-	pll->clk_data.clks = kcalloc(num_clks, sizeof(*pll->clk_data.clks),
-				     GFP_KERNEL);
-	if (WARN_ON(!pll->clk_data.clks))
+	pll->clk_data = kzalloc(sizeof(*pll->clk_data->hws) * num_clks +
+				sizeof(*pll->clk_data), GFP_KERNEL);
+	if (WARN_ON(!pll->clk_data))
 		goto err_clk_data;
+	pll->clk_data->num = num_clks;
 
 	pll->clks = kcalloc(num_clks, sizeof(*pll->clks), GFP_KERNEL);
 	if (WARN_ON(!pll->clks))

@@ -694,11 +693,11 @@ void __init iproc_pll_clk_setup(struct device_node *node,
 
 	iproc_pll_sw_cfg(pll);
 
-	clk = clk_register(NULL, &iclk->hw);
-	if (WARN_ON(IS_ERR(clk)))
+	ret = clk_hw_register(NULL, &iclk->hw);
+	if (WARN_ON(ret))
 		goto err_pll_register;
 
-	pll->clk_data.clks[0] = clk;
+	pll->clk_data->hws[0] = &iclk->hw;
 
 	/* now initialize and register all leaf clocks */
 	for (i = 1; i < num_clks; i++) {

@@ -724,22 +723,23 @@ void __init iproc_pll_clk_setup(struct device_node *node,
 		init.num_parents = (parent_name ? 1 : 0);
 		iclk->hw.init = &init;
 
-		clk = clk_register(NULL, &iclk->hw);
-		if (WARN_ON(IS_ERR(clk)))
+		ret = clk_hw_register(NULL, &iclk->hw);
+		if (WARN_ON(ret))
 			goto err_clk_register;
 
-		pll->clk_data.clks[i] = clk;
+		pll->clk_data->hws[i] = &iclk->hw;
 	}
 
-	ret = of_clk_add_provider(node, of_clk_src_onecell_get, &pll->clk_data);
+	ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get,
+				     pll->clk_data);
 	if (WARN_ON(ret))
 		goto err_clk_register;
 
 	return;
 
 err_clk_register:
-	for (i = 0; i < num_clks; i++)
-		clk_unregister(pll->clk_data.clks[i]);
+	while (--i >= 0)
+		clk_hw_unregister(pll->clk_data->hws[i]);
 
 err_pll_register:
 	if (pll->status_base != pll->control_base)

@@ -759,7 +759,7 @@ err_pll_iomap:
 	kfree(pll->clks);
 
 err_clks:
-	kfree(pll->clk_data.clks);
+	kfree(pll->clk_data);
 
 err_clk_data:
 	kfree(pll);

Signature · 1 line

2.7.4

Ray Jui

Tested-by on v1 5/34

2016-06-02 17:22 UTC #13 lore raw

Re: [PATCH 05/34] clk: bcm: iproc: Migrate to clk_hw based registration and OF APIs

Hi Stephen,

I sanity tested this patch with v4.7-rc1 on Broadcom Cygnus platform that uses these clocks. All clock providers work as expected.

Tested-by Ray Jui <[email protected]>

Thanks,

Ray

Quoted 222 lines · Stephen Boyd

Cc Ray Jui <[email protected]>

Cc Jon Mason <[email protected]>

Cc Simran Rai <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/bcm/clk-iproc-armpll.c |  9 ++++-----
 drivers/clk/bcm/clk-iproc-asiu.c   | 27 +++++++++++++--------------
 drivers/clk/bcm/clk-iproc-pll.c    | 32 ++++++++++++++++----------------
 3 files changed, 33 insertions(+), 35 deletions(-)

drivers/clk/bcm/clk-iproc-armpll.c +4 -5

index a196ee28a17a..2924abc4470f 100644
@@ -242,7 +242,6 @@ static const struct clk_ops iproc_arm_pll_ops = {
 void __init iproc_armpll_setup(struct device_node *node)
 {
 	int ret;
-	struct clk *clk;
 	struct iproc_arm_pll *pll;
 	struct clk_init_data init;
 	const char *parent_name;

@@ -263,18 +262,18 @@ void __init iproc_armpll_setup(struct device_node *node)
 	init.num_parents = (parent_name ? 1 : 0);
 	pll->hw.init = &init;
 
-	clk = clk_register(NULL, &pll->hw);
-	if (WARN_ON(IS_ERR(clk)))
+	ret = clk_hw_register(NULL, &pll->hw);
+	if (WARN_ON(ret))
 		goto err_iounmap;
 
-	ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);
+	ret = of_clk_add_hw_provider(node, of_clk_hw_simple_get, &pll->hw);
 	if (WARN_ON(ret))
 		goto err_clk_unregister;
 
 	return;
 
 err_clk_unregister:
-	clk_unregister(clk);
+	clk_hw_unregister(&pll->hw);
 err_iounmap:
 	iounmap(pll->base);
 err_free_pll:

drivers/clk/bcm/clk-iproc-asiu.c +13 ~~-14~~

index f630e1bbdcfe..4360e481368b 100644
@@ -37,7 +37,7 @@ struct iproc_asiu {
 	void __iomem *div_base;
 	void __iomem *gate_base;
 
-	struct clk_onecell_data clk_data;
+	struct clk_hw_onecell_data *clk_data;
 	struct iproc_asiu_clk *clks;
 };

@@ -197,11 +197,11 @@ void __init iproc_asiu_setup(struct device_node *node,
 	if (WARN_ON(!asiu))
 		return;
 
-	asiu->clk_data.clk_num = num_clks;
-	asiu->clk_data.clks = kcalloc(num_clks, sizeof(*asiu->clk_data.clks),
-				      GFP_KERNEL);
-	if (WARN_ON(!asiu->clk_data.clks))
+	asiu->clk_data = kzalloc(sizeof(*asiu->clk_data->hws) * num_clks +
+				 sizeof(*asiu->clk_data), GFP_KERNEL);
+	if (WARN_ON(!asiu->clk_data))
 		goto err_clks;
+	asiu->clk_data->num = num_clks;
 
 	asiu->clks = kcalloc(num_clks, sizeof(*asiu->clks), GFP_KERNEL);
 	if (WARN_ON(!asiu->clks))

@@ -217,7 +217,6 @@ void __init iproc_asiu_setup(struct device_node *node,
 
 	for (i = 0; i < num_clks; i++) {
 		struct clk_init_data init;
-		struct clk *clk;
 		const char *parent_name;
 		struct iproc_asiu_clk *asiu_clk;
 		const char *clk_name;

@@ -240,22 +239,22 @@ void __init iproc_asiu_setup(struct device_node *node,
 		init.num_parents = (parent_name ? 1 : 0);
 		asiu_clk->hw.init = &init;
 
-		clk = clk_register(NULL, &asiu_clk->hw);
-		if (WARN_ON(IS_ERR(clk)))
+		ret = clk_hw_register(NULL, &asiu_clk->hw);
+		if (WARN_ON(ret))
 			goto err_clk_register;
-		asiu->clk_data.clks[i] = clk;
+		asiu->clk_data->hws[i] = &asiu_clk->hw;
 	}
 
-	ret = of_clk_add_provider(node, of_clk_src_onecell_get,
-				  &asiu->clk_data);
+	ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get,
+				     asiu->clk_data);
 	if (WARN_ON(ret))
 		goto err_clk_register;
 
 	return;
 
 err_clk_register:
-	for (i = 0; i < num_clks; i++)
-		clk_unregister(asiu->clk_data.clks[i]);
+	while (--i >= 0)
+		clk_hw_unregister(asiu->clk_data->hws[i]);
 	iounmap(asiu->gate_base);
 
 err_iomap_gate:

@@ -265,7 +264,7 @@ err_iomap_div:
 	kfree(asiu->clks);
 
 err_asiu_clks:
-	kfree(asiu->clk_data.clks);
+	kfree(asiu->clk_data);
 
 err_clks:
 	kfree(asiu);

drivers/clk/bcm/clk-iproc-pll.c +16 ~~-16~~

index fd492a5dad12..e04634c46395 100644
@@ -89,7 +89,7 @@ struct iproc_pll {
 	const struct iproc_pll_vco_param *vco_param;
 	unsigned int num_vco_entries;
 
-	struct clk_onecell_data clk_data;
+	struct clk_hw_onecell_data *clk_data;
 	struct iproc_clk *clks;
 };

@@ -625,7 +625,6 @@ void __init iproc_pll_clk_setup(struct device_node *node,
 				unsigned int num_clks)
 {
 	int i, ret;
-	struct clk *clk;
 	struct iproc_pll *pll;
 	struct iproc_clk *iclk;
 	struct clk_init_data init;

@@ -638,11 +637,11 @@ void __init iproc_pll_clk_setup(struct device_node *node,
 	if (WARN_ON(!pll))
 		return;
 
-	pll->clk_data.clk_num = num_clks;
-	pll->clk_data.clks = kcalloc(num_clks, sizeof(*pll->clk_data.clks),
-				     GFP_KERNEL);
-	if (WARN_ON(!pll->clk_data.clks))
+	pll->clk_data = kzalloc(sizeof(*pll->clk_data->hws) * num_clks +
+				sizeof(*pll->clk_data), GFP_KERNEL);
+	if (WARN_ON(!pll->clk_data))
 		goto err_clk_data;
+	pll->clk_data->num = num_clks;
 
 	pll->clks = kcalloc(num_clks, sizeof(*pll->clks), GFP_KERNEL);
 	if (WARN_ON(!pll->clks))

@@ -694,11 +693,11 @@ void __init iproc_pll_clk_setup(struct device_node *node,
 
 	iproc_pll_sw_cfg(pll);
 
-	clk = clk_register(NULL, &iclk->hw);
-	if (WARN_ON(IS_ERR(clk)))
+	ret = clk_hw_register(NULL, &iclk->hw);
+	if (WARN_ON(ret))
 		goto err_pll_register;
 
-	pll->clk_data.clks[0] = clk;
+	pll->clk_data->hws[0] = &iclk->hw;
 
 	/* now initialize and register all leaf clocks */
 	for (i = 1; i < num_clks; i++) {

@@ -724,22 +723,23 @@ void __init iproc_pll_clk_setup(struct device_node *node,
 		init.num_parents = (parent_name ? 1 : 0);
 		iclk->hw.init = &init;
 
-		clk = clk_register(NULL, &iclk->hw);
-		if (WARN_ON(IS_ERR(clk)))
+		ret = clk_hw_register(NULL, &iclk->hw);
+		if (WARN_ON(ret))
 			goto err_clk_register;
 
-		pll->clk_data.clks[i] = clk;
+		pll->clk_data->hws[i] = &iclk->hw;
 	}
 
-	ret = of_clk_add_provider(node, of_clk_src_onecell_get, &pll->clk_data);
+	ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get,
+				     pll->clk_data);
 	if (WARN_ON(ret))
 		goto err_clk_register;
 
 	return;
 
 err_clk_register:
-	for (i = 0; i < num_clks; i++)
-		clk_unregister(pll->clk_data.clks[i]);
+	while (--i >= 0)
+		clk_hw_unregister(pll->clk_data->hws[i]);
 
 err_pll_register:
 	if (pll->status_base != pll->control_base)

@@ -759,7 +759,7 @@ err_pll_iomap:
 	kfree(pll->clks);
 
 err_clks:
-	kfree(pll->clk_data.clks);
+	kfree(pll->clk_data);
 
 err_clk_data:
 	kfree(pll);

Stephen Boyd

Applied

2016-06-30 19:27 UTC #14 lore raw

Re: [PATCH 05/34] clk: bcm: iproc: Migrate to clk_hw based registration and OF APIs

In reply to Stephen Boyd

Quoted 10 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #15 lore raw

PATCH 6/34 clk: bcm: kona: Migrate to clk_hw based registration and OF APIs

In reply to Stephen Boyd

Now that we can use clk_hw pointers we don't need to have two duplicate arrays holding the same mapping of clk index to clk_hw pointer. Implement a custom clk_hw provider function to map the OF specifier to the clk_hw instance for it.

Cc Alex Elder <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/bcm/clk-kona-setup.c | 76 ++++++++++++++++++----------------------
 drivers/clk/bcm/clk-kona.c       |  9 +++--
 drivers/clk/bcm/clk-kona.h       |  7 ++--
 3 files changed, 41 insertions(+), 51 deletions(-)

drivers/clk/bcm/clk-kona-setup.c +35 ~~-41~~

index 526b0b0e9a9f..f2359b3b73bc 100644
@@ -696,77 +696,69 @@ static void bcm_clk_teardown(struct kona_clk *bcm_clk)
 	bcm_clk->type = bcm_clk_none;
 }
 
-static void kona_clk_teardown(struct clk *clk)
+static void kona_clk_teardown(struct clk_hw *hw)
 {
-	struct clk_hw *hw;
 	struct kona_clk *bcm_clk;
 
-	if (!clk)
+	if (!hw)
 		return;
 
-	hw = __clk_get_hw(clk);
-	if (!hw) {
-		pr_err("%s: clk %p has null hw pointer\n", __func__, clk);
-		return;
-	}
-	clk_unregister(clk);
+	clk_hw_unregister(hw);
 
 	bcm_clk = to_kona_clk(hw);
 	bcm_clk_teardown(bcm_clk);
 }
 
-struct clk *kona_clk_setup(struct kona_clk *bcm_clk)
+static int kona_clk_setup(struct kona_clk *bcm_clk)
 {
+	int ret;
 	struct clk_init_data *init_data = &bcm_clk->init_data;
-	struct clk *clk = NULL;
 
 	switch (bcm_clk->type) {
 	case bcm_clk_peri:
-		if (peri_clk_setup(bcm_clk->u.data, init_data))
-			return NULL;
+		ret = peri_clk_setup(bcm_clk->u.data, init_data);
+		if (ret)
+			return ret;
 		break;
 	default:
 		pr_err("%s: clock type %d invalid for %s\n", __func__,
 			(int)bcm_clk->type, init_data->name);
-		return NULL;
+		return -EINVAL;
 	}
 
 	/* Make sure everything makes sense before we set it up */
 	if (!kona_clk_valid(bcm_clk)) {
 		pr_err("%s: clock data invalid for %s\n", __func__,
 			init_data->name);
+		ret = -EINVAL;
 		goto out_teardown;
 	}
 
 	bcm_clk->hw.init = init_data;
-	clk = clk_register(NULL, &bcm_clk->hw);
-	if (IS_ERR(clk)) {
-		pr_err("%s: error registering clock %s (%ld)\n", __func__,
-			init_data->name, PTR_ERR(clk));
+	ret = clk_hw_register(NULL, &bcm_clk->hw);
+	if (ret) {
+		pr_err("%s: error registering clock %s (%d)\n", __func__,
+			init_data->name, ret);
 		goto out_teardown;
 	}
-	BUG_ON(!clk);
 
-	return clk;
+	return 0;
 out_teardown:
 	bcm_clk_teardown(bcm_clk);
 
-	return NULL;
+	return ret;
 }
 
 static void ccu_clks_teardown(struct ccu_data *ccu)
 {
 	u32 i;
 
-	for (i = 0; i < ccu->clk_data.clk_num; i++)
-		kona_clk_teardown(ccu->clk_data.clks[i]);
-	kfree(ccu->clk_data.clks);
+	for (i = 0; i < ccu->clk_num; i++)
+		kona_clk_teardown(&ccu->kona_clks[i].hw);
 }
 
 static void kona_ccu_teardown(struct ccu_data *ccu)
 {
-	kfree(ccu->clk_data.clks);
-	ccu->clk_data.clks = NULL;
 	if (!ccu->base)
 		return;

@@ -793,6 +785,20 @@ static bool ccu_data_valid(struct ccu_data *ccu)
 	return true;
 }
 
+static struct clk_hw *
+of_clk_kona_onecell_get(struct of_phandle_args *clkspec, void *data)
+{
+	struct ccu_data *ccu = data;
+	unsigned int idx = clkspec->args[0];
+
+	if (idx >= ccu->clk_num) {
+		pr_err("%s: invalid index %u\n", __func__, idx);
+		return ERR_PTR(-EINVAL);
+	}
+
+	return &ccu->kona_clks[idx].hw;
+}
+
 /*
  * Set up a CCU.  Call the provided ccu_clks_setup callback to
  * initialize the array of clocks provided by the CCU.

@@ -805,18 +811,6 @@ void __init kona_dt_ccu_setup(struct ccu_data *ccu,
 	unsigned int i;
 	int ret;
 
-	if (ccu->clk_data.clk_num) {
-		size_t size;
-
-		size = ccu->clk_data.clk_num * sizeof(*ccu->clk_data.clks);
-		ccu->clk_data.clks = kzalloc(size, GFP_KERNEL);
-		if (!ccu->clk_data.clks) {
-			pr_err("%s: unable to allocate %u clocks for %s\n",
-				__func__, ccu->clk_data.clk_num, node->name);
-			return;
-		}
-	}
-
 	ret = of_address_to_resource(node, 0, &res);
 	if (ret) {
 		pr_err("%s: no valid CCU registers found for %s\n", __func__,

@@ -851,13 +845,13 @@ void __init kona_dt_ccu_setup(struct ccu_data *ccu,
 	 * the clock framework clock array (in ccu->data).  Then
 	 * register as a provider for these clocks.
 	 */
-	for (i = 0; i < ccu->clk_data.clk_num; i++) {
+	for (i = 0; i < ccu->clk_num; i++) {
 		if (!ccu->kona_clks[i].ccu)
 			continue;
-		ccu->clk_data.clks[i] = kona_clk_setup(&ccu->kona_clks[i]);
+		kona_clk_setup(&ccu->kona_clks[i]);
 	}
 
-	ret = of_clk_add_provider(node, of_clk_src_onecell_get, &ccu->clk_data);
+	ret = of_clk_add_hw_provider(node, of_clk_kona_onecell_get, ccu);
 	if (ret) {
 		pr_err("%s: error adding ccu %s as provider (%d)\n", __func__,
 				node->name, ret);

drivers/clk/bcm/clk-kona.c +4 -5

index 3a15347b4233..eee64b9e5d10 100644
@@ -1256,19 +1256,18 @@ bool __init kona_ccu_init(struct ccu_data *ccu)
 {
 	unsigned long flags;
 	unsigned int which;
-	struct clk **clks = ccu->clk_data.clks;
 	struct kona_clk *kona_clks = ccu->kona_clks;
 	bool success = true;
 
 	flags = ccu_lock(ccu);
 	__ccu_write_enable(ccu);
 
-	for (which = 0; which < ccu->clk_data.clk_num; which++) {
-		struct kona_clk *bcm_clk;
+	for (which = 0; which < ccu->clk_num; which++) {
+		struct kona_clk *bcm_clk = &kona_clks[which];
 
-		if (!clks[which])
+		if (!bcm_clk->ccu)
 			continue;
-		bcm_clk = &kona_clks[which];
+
 		success &= __kona_clk_init(bcm_clk);
 	}

drivers/clk/bcm/clk-kona.h +2 -5

index 906576ec97b6..f4b39bb5558a 100644
@@ -481,7 +481,7 @@ struct ccu_data {
 	bool write_enabled;	/* write access is currently enabled */
 	struct ccu_policy policy;
 	struct device_node *node;
-	struct clk_onecell_data clk_data;
+	size_t clk_num;
 	const char *name;
 	u32 range;		/* byte range of address space */
 	struct kona_clk kona_clks[];	/* must be last */

@@ -491,9 +491,7 @@ struct ccu_data {
 #define KONA_CCU_COMMON(_prefix, _name, _ccuname)			    \
 	.name		= #_name "_ccu",				    \
 	.lock		= __SPIN_LOCK_UNLOCKED(_name ## _ccu_data.lock),    \
-	.clk_data	= {						    \
-		.clk_num = _prefix ## _ ## _ccuname ## _CCU_CLOCK_COUNT,    \
-	}
+	.clk_num	= _prefix ## _ ## _ccuname ## _CCU_CLOCK_COUNT
 
 /* Exported globals */

@@ -505,7 +503,6 @@ extern u64 scaled_div_max(struct bcm_clk_div *div);
 extern u64 scaled_div_build(struct bcm_clk_div *div, u32 div_value,
 				u32 billionths);
 
-extern struct clk *kona_clk_setup(struct kona_clk *bcm_clk);
 extern void __init kona_dt_ccu_setup(struct ccu_data *ccu,
 				struct device_node *node);
 extern bool __init kona_ccu_init(struct ccu_data *ccu);

Signature · 1 line

2.7.4

Stephen Boyd

Applied

2016-08-24 23:08 UTC #16 lore raw

Re: [PATCH 06/34] clk: bcm: kona: Migrate to clk_hw based registration and OF APIs

Quoted 8 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #17 lore raw

PATCH 7/34 clk: berlin: Migrate to clk_hw based registration and OF APIs

In reply to Stephen Boyd

Cc Jisheng Zhang <[email protected]>

Cc Alexandre Belloni <[email protected]>

Cc Sebastian Hesselbarth <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/berlin/berlin2-avpll.c | 12 ++---
 drivers/clk/berlin/berlin2-avpll.h |  8 +---
 drivers/clk/berlin/berlin2-div.c   |  4 +-
 drivers/clk/berlin/berlin2-div.h   |  4 +-
 drivers/clk/berlin/berlin2-pll.c   |  6 +--
 drivers/clk/berlin/berlin2-pll.h   |  5 +-
 drivers/clk/berlin/bg2.c           | 98 ++++++++++++++++++++------------------
 drivers/clk/berlin/bg2q.c          | 39 ++++++++-------
 8 files changed, 90 insertions(+), 86 deletions(-)

drivers/clk/berlin/berlin2-avpll.c +6 -6

index fd0f26c38465..5b0e4213b3ae 100644
@@ -188,7 +188,7 @@ static const struct clk_ops berlin2_avpll_vco_ops = {
 	.recalc_rate	= berlin2_avpll_vco_recalc_rate,
 };
 
-struct clk * __init berlin2_avpll_vco_register(void __iomem *base,
+int __init berlin2_avpll_vco_register(void __iomem *base,
 			       const char *name, const char *parent_name,
 			       u8 vco_flags, unsigned long flags)
 {

@@ -197,7 +197,7 @@ struct clk * __init berlin2_avpll_vco_register(void __iomem *base,
 
 	vco = kzalloc(sizeof(*vco), GFP_KERNEL);
 	if (!vco)
-		return ERR_PTR(-ENOMEM);
+		return -ENOMEM;
 
 	vco->base = base;
 	vco->flags = vco_flags;

@@ -208,7 +208,7 @@ struct clk * __init berlin2_avpll_vco_register(void __iomem *base,
 	init.num_parents = 1;
 	init.flags = flags;
 
-	return clk_register(NULL, &vco->hw);
+	return clk_hw_register(NULL, &vco->hw);
 }
 
 struct berlin2_avpll_channel {

@@ -364,7 +364,7 @@ static const struct clk_ops berlin2_avpll_channel_ops = {
  */
 static const u8 quirk_index[] __initconst = { 0, 6, 5, 4, 3, 2, 1, 7 };
 
-struct clk * __init berlin2_avpll_channel_register(void __iomem *base,
+int __init berlin2_avpll_channel_register(void __iomem *base,
 			   const char *name, u8 index, const char *parent_name,
 			   u8 ch_flags, unsigned long flags)
 {

@@ -373,7 +373,7 @@ struct clk * __init berlin2_avpll_channel_register(void __iomem *base,
 
 	ch = kzalloc(sizeof(*ch), GFP_KERNEL);
 	if (!ch)
-		return ERR_PTR(-ENOMEM);
+		return ENOMEM;
 
 	ch->base = base;
 	if (ch_flags & BERLIN2_AVPLL_SCRAMBLE_QUIRK)

@@ -389,5 +389,5 @@ struct clk * __init berlin2_avpll_channel_register(void __iomem *base,
 	init.num_parents = 1;
 	init.flags = flags;
 
-	return clk_register(NULL, &ch->hw);
+	return clk_hw_register(NULL, &ch->hw);
 }

drivers/clk/berlin/berlin2-avpll.h +2 -6

index a37f5068d299..17e311153b42 100644
@@ -19,17 +19,13 @@
 #ifndef __BERLIN2_AVPLL_H
 #define __BERLIN2_AVPLL_H
 
-struct clk;
-
 #define BERLIN2_AVPLL_BIT_QUIRK		BIT(0)
 #define BERLIN2_AVPLL_SCRAMBLE_QUIRK	BIT(1)
 
-struct clk * __init
-berlin2_avpll_vco_register(void __iomem *base, const char *name,
+int berlin2_avpll_vco_register(void __iomem *base, const char *name,
 	   const char *parent_name, u8 vco_flags, unsigned long flags);
 
-struct clk * __init
-berlin2_avpll_channel_register(void __iomem *base, const char *name,
+int berlin2_avpll_channel_register(void __iomem *base, const char *name,
 		       u8 index, const char *parent_name, u8 ch_flags,
 		       unsigned long flags);

drivers/clk/berlin/berlin2-div.c +2 -2

index 81ff97f8aa0b..41ab2d392c57 100644
@@ -234,7 +234,7 @@ static const struct clk_ops berlin2_div_mux_ops = {
 	.get_parent	= berlin2_div_get_parent,
 };
 
-struct clk * __init
+struct clk_hw * __init
 berlin2_div_register(const struct berlin2_div_map *map,
 		     void __iomem *base, const char *name, u8 div_flags,
 		     const char **parent_names, int num_parents,

@@ -259,7 +259,7 @@ berlin2_div_register(const struct berlin2_div_map *map,
 	if ((div_flags & BERLIN2_DIV_HAS_MUX) == 0)
 		mux_ops = NULL;
 
-	return clk_register_composite(NULL, name, parent_names, num_parents,
+	return clk_hw_register_composite(NULL, name, parent_names, num_parents,
 				      &div->hw, mux_ops, &div->hw, rate_ops,
 				      &div->hw, gate_ops, flags);
 }

drivers/clk/berlin/berlin2-div.h +2 -2

index 15e3384f3116..10d608eb8716 100644
@@ -19,7 +19,7 @@
 #ifndef __BERLIN2_DIV_H
 #define __BERLIN2_DIV_H
 
-struct clk;
+struct clk_hw;
 
 #define BERLIN2_DIV_HAS_GATE		BIT(0)
 #define BERLIN2_DIV_HAS_MUX		BIT(1)

@@ -80,7 +80,7 @@ struct berlin2_div_data {
 	u8 div_flags;
 };
 
-struct clk * __init
+struct clk_hw * __init
 berlin2_div_register(const struct berlin2_div_map *map,
 	     void __iomem *base,  const char *name, u8 div_flags,
 	     const char **parent_names, int num_parents,

drivers/clk/berlin/berlin2-pll.c +3 -3

index 1c2294d3ba85..4ffbe80f6323 100644
@@ -84,7 +84,7 @@ static const struct clk_ops berlin2_pll_ops = {
 	.recalc_rate	= berlin2_pll_recalc_rate,
 };
 
-struct clk * __init
+int __init
 berlin2_pll_register(const struct berlin2_pll_map *map,
 		     void __iomem *base, const char *name,
 		     const char *parent_name, unsigned long flags)

@@ -94,7 +94,7 @@ berlin2_pll_register(const struct berlin2_pll_map *map,
 
 	pll = kzalloc(sizeof(*pll), GFP_KERNEL);
 	if (!pll)
-		return ERR_PTR(-ENOMEM);
+		return -ENOMEM;
 
 	/* copy pll_map to allow __initconst */
 	memcpy(&pll->map, map, sizeof(*map));

@@ -106,5 +106,5 @@ berlin2_pll_register(const struct berlin2_pll_map *map,
 	init.num_parents = 1;
 	init.flags = flags;
 
-	return clk_register(NULL, &pll->hw);
+	return clk_hw_register(NULL, &pll->hw);
 }

drivers/clk/berlin/berlin2-pll.h +1 -4

index 8831ce27ac1e..796874facc4c 100644
@@ -19,8 +19,6 @@
 #ifndef __BERLIN2_PLL_H
 #define __BERLIN2_PLL_H
 
-struct clk;
-
 struct berlin2_pll_map {
 	const u8 vcodiv[16];
 	u8 mult;

@@ -29,8 +27,7 @@ struct berlin2_pll_map {
 	u8 divsel_shift;
 };
 
-struct clk * __init
-berlin2_pll_register(const struct berlin2_pll_map *map,
+int berlin2_pll_register(const struct berlin2_pll_map *map,
 		     void __iomem *base, const char *name,
 		     const char *parent_name, unsigned long flags);

drivers/clk/berlin/bg2.c +52 ~~-46~~

220 lines not on this page · raw message

drivers/clk/berlin/bg2q.c +22 ~~-17~~

index f144547cf76c..0718e831475f 100644
@@ -46,8 +46,7 @@
 #define REG_SDIO1XIN_CLKCTL	0x015c
 
 #define	MAX_CLKS 28
-static struct clk *clks[MAX_CLKS];
-static struct clk_onecell_data clk_data;
+static struct clk_hw_onecell_data *clk_data;
 static DEFINE_SPINLOCK(lock);
 static void __iomem *gbase;
 static void __iomem *cpupll_base;

@@ -293,7 +292,15 @@ static void __init berlin2q_clock_setup(struct device_node *np)
 	struct device_node *parent_np = of_get_parent(np);
 	const char *parent_names[9];
 	struct clk *clk;
-	int n;
+	struct clk_hw **hws;
+	int n, ret;
+
+	clk_data = kzalloc(sizeof(*clk_data) +
+			   sizeof(*clk_data->hws) * MAX_CLKS, GFP_KERNEL);
+	if (!clk_data)
+		return;
+	clk_data->num = MAX_CLKS;
+	hws = clk_data->hws;
 
 	gbase = of_iomap(parent_np, 0);
 	if (!gbase) {

@@ -317,14 +324,14 @@ static void __init berlin2q_clock_setup(struct device_node *np)
 	}
 
 	/* simple register PLLs */
-	clk = berlin2_pll_register(&bg2q_pll_map, gbase + REG_SYSPLLCTL0,
+	ret = berlin2_pll_register(&bg2q_pll_map, gbase + REG_SYSPLLCTL0,
 				   clk_names[SYSPLL], clk_names[REFCLK], 0);
-	if (IS_ERR(clk))
+	if (ret)
 		goto bg2q_fail;
 
-	clk = berlin2_pll_register(&bg2q_pll_map, cpupll_base,
+	ret = berlin2_pll_register(&bg2q_pll_map, cpupll_base,
 				   clk_names[CPUPLL], clk_names[REFCLK], 0);
-	if (IS_ERR(clk))
+	if (ret)
 		goto bg2q_fail;
 
 	/* TODO: add BG2Q AVPLL */

@@ -342,7 +349,7 @@ static void __init berlin2q_clock_setup(struct device_node *np)
 		for (k = 0; k < dd->num_parents; k++)
 			parent_names[k] = clk_names[dd->parent_ids[k]];
 
-		clks[CLKID_SYS + n] = berlin2_div_register(&dd->map, gbase,
+		hws[CLKID_SYS + n] = berlin2_div_register(&dd->map, gbase,
 				dd->name, dd->div_flags, parent_names,
 				dd->num_parents, dd->flags, &lock);
 	}

@@ -351,22 +358,22 @@ static void __init berlin2q_clock_setup(struct device_node *np)
 	for (n = 0; n < ARRAY_SIZE(bg2q_gates); n++) {
 		const struct berlin2_gate_data *gd = &bg2q_gates[n];
 
-		clks[CLKID_GFX2DAXI + n] = clk_register_gate(NULL, gd->name,
+		hws[CLKID_GFX2DAXI + n] = clk_hw_register_gate(NULL, gd->name,
 			    gd->parent_name, gd->flags, gbase + REG_CLKENABLE,
 			    gd->bit_idx, 0, &lock);
 	}
 
 	/* cpuclk divider is fixed to 1 */
-	clks[CLKID_CPU] =
-		clk_register_fixed_factor(NULL, "cpu", clk_names[CPUPLL],
+	hws[CLKID_CPU] =
+		clk_hw_register_fixed_factor(NULL, "cpu", clk_names[CPUPLL],
 					  0, 1, 1);
 	/* twdclk is derived from cpu/3 */
-	clks[CLKID_TWD] =
-		clk_register_fixed_factor(NULL, "twd", "cpu", 0, 1, 3);
+	hws[CLKID_TWD] =
+		clk_hw_register_fixed_factor(NULL, "twd", "cpu", 0, 1, 3);
 
 	/* check for errors on leaf clocks */
 	for (n = 0; n < MAX_CLKS; n++) {
-		if (!IS_ERR(clks[n]))
+		if (!IS_ERR(hws[n]))
 			continue;
 
 		pr_err("%s: Unable to register leaf clock %d\n",

@@ -375,9 +382,7 @@ static void __init berlin2q_clock_setup(struct device_node *np)
 	}
 
 	/* register clk-provider */
-	clk_data.clks = clks;
-	clk_data.clk_num = MAX_CLKS;
-	of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
+	of_clk_add_hw_provider(np, of_clk_hw_onecell_get, &clk_data);
 
 	return;

Signature · 1 line

2.7.4

Alexandre Belloni

2016-06-05 17:41 UTC #18 lore raw

Re: [PATCH 07/34] clk: berlin: Migrate to clk_hw based registration and OF APIs

Hi,

The main drawback of those patches is that they break the alignment (checkpatch.pl --strict complains).

Quoted 6 lines · Stephen Boyd

drivers/clk/berlin/berlin2-avpll.h +0 -0

index a37f5068d299..17e311153b42 100644
@@ -19,17 +19,13 @@
 #ifndef __BERLIN2_AVPLL_H

drivers/clk/berlin/berlin2-avpll.h line 25

Quoted 10 lines

drivers/clk/berlin/berlin2-avpll.h +1 -4

 #define __BERLIN2_AVPLL_H
 
-struct clk;
-
 #define BERLIN2_AVPLL_BIT_QUIRK		BIT(0)
 #define BERLIN2_AVPLL_SCRAMBLE_QUIRK	BIT(1)
 
-struct clk * __init
-berlin2_avpll_vco_register(void __iomem *base, const char *name,
+int berlin2_avpll_vco_register(void __iomem *base, const char *name,

This is missing __init.

drivers/clk/berlin/berlin2-avpll.h line 28

Quoted 5 lines

drivers/clk/berlin/berlin2-avpll.h +1 -2

 	   const char *parent_name, u8 vco_flags, unsigned long flags);
 
-struct clk * __init
-berlin2_avpll_channel_register(void __iomem *base, const char *name,
+int berlin2_avpll_channel_register(void __iomem *base, const char *name,

Ditto.

Quoted 17 lines

drivers/clk/berlin/berlin2-avpll.h +0 -0

 		       u8 index, const char *parent_name, u8 ch_flags,
 		       unsigned long flags);

drivers/clk/berlin/berlin2-pll.h +0 -2

index 8831ce27ac1e..796874facc4c 100644
@@ -19,8 +19,6 @@
 #ifndef __BERLIN2_PLL_H
 #define __BERLIN2_PLL_H
 
-struct clk;
-
 struct berlin2_pll_map {
 	const u8 vcodiv[16];
 	u8 mult;

drivers/clk/berlin/berlin2-pll.h struct berlin2_pll_map { · line 30

Quoted 6 lines

drivers/clk/berlin/berlin2-pll.h +1 -2

@@ -29,8 +27,7 @@ struct berlin2_pll_map {
 	u8 divsel_shift;
 };
 
-struct clk * __init
-berlin2_pll_register(const struct berlin2_pll_map *map,
+int berlin2_pll_register(const struct berlin2_pll_map *map,

Ditto.

Quoted 3 lines

drivers/clk/berlin/berlin2-pll.h +0 -0

 		     void __iomem *base, const char *name,
 		     const char *parent_name, unsigned long flags);

Signature · 3 lines

Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

Stephen Boyd

author

2016-06-07 08:40 UTC #19 lore raw

PATCH 7/34 clk: berlin: Migrate to clk_hw based registration and OF APIs

Quoting Alexandre Belloni (2016-06-05 10:41:57)

Quoted 4 lines

Didn't checkpatch --strict already warn on these files though? I'm not sure I've done anything to break the alignment style here.

Quoted 15 lines · Stephen Boyd

Quoted 13 lines

drivers/clk/berlin/berlin2-avpll.h +0 -2

index a37f5068d299..17e311153b42 100644
@@ -19,17 +19,13 @@
 #ifndef __BERLIN2_AVPLL_H
 #define __BERLIN2_AVPLL_H
 
-struct clk;
-
 #define BERLIN2_AVPLL_BIT_QUIRK              BIT(0)
 #define BERLIN2_AVPLL_SCRAMBLE_QUIRK BIT(1)

Quoted 5 lines

Ah I also removed __init in the header file here because it doesn't do anything. I guess I should mention that in the commit text.

Alexandre Belloni

2016-06-07 16:33 UTC #20 lore raw

Re: [PATCH 07/34] clk: berlin: Migrate to clk_hw based registration and OF APIs

Quoted 9 lines · Stephen Boyd

As you change the function return value, the function arguments are no longer aligned with the opening parenthesis.
I would agree that keeping the alignment will make the change quit bigger though.

Quoted 15 lines

Quoted 15 lines · Stephen Boyd

Quoted 13 lines

drivers/clk/berlin/berlin2-avpll.h +0 -2

index a37f5068d299..17e311153b42 100644
@@ -19,17 +19,13 @@
 #ifndef __BERLIN2_AVPLL_H
 #define __BERLIN2_AVPLL_H
 
-struct clk;
-
 #define BERLIN2_AVPLL_BIT_QUIRK              BIT(0)
 #define BERLIN2_AVPLL_SCRAMBLE_QUIRK BIT(1)

Quoted 8 lines

Indeed, you are right.

Signature · 3 lines

Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

Stephen Boyd

author

2016-06-01 23:15 UTC #21 lore raw

PATCH 8/34 clk: asm9260: Migrate to clk_hw based registration and OF APIs

In reply to Stephen Boyd

Cc Oleksij Rempel <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-asm9260.c | 31 ++++++++++++++++++-------------
 1 file changed, 18 insertions(+), 13 deletions(-)

drivers/clk/clk-asm9260.c +18 ~~-13~~

index 90897af8d9f7..ea8568536193 100644
@@ -68,8 +68,7 @@
 #define HW_LCDCLKDIV		0x01fc
 #define HW_ADCANACLKDIV		0x0200
 
-static struct clk *clks[MAX_CLKS];
-static struct clk_onecell_data clk_data;
+static struct clk_hw_onecell_data *clk_data;
 static DEFINE_SPINLOCK(asm9260_clk_lock);
 
 struct asm9260_div_clk {

@@ -267,12 +266,20 @@ static struct asm9260_mux_clock asm9260_mux_clks[] __initdata = {
 
 static void __init asm9260_acc_init(struct device_node *np)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
+	struct clk_hw **hws;
 	const char *ref_clk, *pll_clk = "pll";
 	u32 rate;
 	int n;
 	u32 accuracy = 0;
 
+	clk_data = kzalloc(sizeof(*clk_data) +
+			   sizeof(*clk_data->hws) * MAX_CLKS, GFP_KERNEL);
+	if (!clk_data)
+		return;
+	clk_data->num = MAX_CLKS;
+	hws = clk_data->hws;
+
 	base = of_io_request_and_map(np, 0, np->name);
 	if (IS_ERR(base))
 		panic("%s: unable to map resource", np->name);

@@ -282,10 +289,10 @@ static void __init asm9260_acc_init(struct device_node *np)
 
 	ref_clk = of_clk_get_parent_name(np, 0);
 	accuracy = clk_get_accuracy(__clk_lookup(ref_clk));
-	clk = clk_register_fixed_rate_with_accuracy(NULL, pll_clk,
+	hw = clk_hw_register_fixed_rate_with_accuracy(NULL, pll_clk,
 			ref_clk, 0, rate, accuracy);
 
-	if (IS_ERR(clk))
+	if (IS_ERR(hw))
 		panic("%s: can't register REFCLK. Check DT!", np->name);
 
 	for (n = 0; n < ARRAY_SIZE(asm9260_mux_clks); n++) {

@@ -293,7 +300,7 @@ static void __init asm9260_acc_init(struct device_node *np)
 
 		mc->parent_names[0] = ref_clk;
 		mc->parent_names[1] = pll_clk;
-		clk = clk_register_mux_table(NULL, mc->name, mc->parent_names,
+		hw = clk_hw_register_mux_table(NULL, mc->name, mc->parent_names,
 				mc->num_parents, mc->flags, base + mc->offset,
 				0, mc->mask, 0, mc->table, &asm9260_clk_lock);
 	}

@@ -302,7 +309,7 @@ static void __init asm9260_acc_init(struct device_node *np)
 	for (n = 0; n < ARRAY_SIZE(asm9260_mux_gates); n++) {
 		const struct asm9260_gate_data *gd = &asm9260_mux_gates[n];
 
-		clk = clk_register_gate(NULL, gd->name,
+		hw = clk_hw_register_gate(NULL, gd->name,
 			gd->parent_name, gd->flags | CLK_SET_RATE_PARENT,
 			base + gd->reg, gd->bit_idx, 0, &asm9260_clk_lock);
 	}

@@ -311,7 +318,7 @@ static void __init asm9260_acc_init(struct device_node *np)
 	for (n = 0; n < ARRAY_SIZE(asm9260_div_clks); n++) {
 		const struct asm9260_div_clk *dc = &asm9260_div_clks[n];
 
-		clks[dc->idx] = clk_register_divider(NULL, dc->name,
+		hws[dc->idx] = clk_hw_register_divider(NULL, dc->name,
 				dc->parent_name, CLK_SET_RATE_PARENT,
 				base + dc->reg, 0, 8, CLK_DIVIDER_ONE_BASED,
 				&asm9260_clk_lock);

@@ -321,14 +328,14 @@ static void __init asm9260_acc_init(struct device_node *np)
 	for (n = 0; n < ARRAY_SIZE(asm9260_ahb_gates); n++) {
 		const struct asm9260_gate_data *gd = &asm9260_ahb_gates[n];
 
-		clks[gd->idx] = clk_register_gate(NULL, gd->name,
+		hws[gd->idx] = clk_hw_register_gate(NULL, gd->name,
 				gd->parent_name, gd->flags, base + gd->reg,
 				gd->bit_idx, 0, &asm9260_clk_lock);
 	}
 
 	/* check for errors on leaf clocks */
 	for (n = 0; n < MAX_CLKS; n++) {
-		if (!IS_ERR(clks[n]))
+		if (!IS_ERR(hws[n]))
 			continue;
 
 		pr_err("%s: Unable to register leaf clock %d\n",

@@ -337,9 +344,7 @@ static void __init asm9260_acc_init(struct device_node *np)
 	}
 
 	/* register clk-provider */
-	clk_data.clks = clks;
-	clk_data.clk_num = MAX_CLKS;
-	of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
+	of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_data);
 	return;
 fail:
 	iounmap(base);

Signature · 1 line

2.7.4

Stephen Boyd

Applied

2016-08-24 23:09 UTC #22 lore raw

Re: [PATCH 08/34] clk: asm9260: Migrate to clk_hw based registration and OF APIs

Quoted 8 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

Applied

2016-08-24 23:10 UTC #23 lore raw

Re: [PATCH 08/34] clk: asm9260: Migrate to clk_hw based registration and OF APIs

In reply to Stephen Boyd

Quoted 8 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #24 lore raw

PATCH 9/34 clk: axi-clkgen: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Cc Lars-Peter Clausen <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-axi-clkgen.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

drivers/clk/clk-axi-clkgen.c +6 -6

index 3294db3b4e4e..5e918e7afaba 100644
@@ -392,8 +392,8 @@ static int axi_clkgen_probe(struct platform_device *pdev)
 	const char *parent_names[2];
 	const char *clk_name;
 	struct resource *mem;
-	struct clk *clk;
 	unsigned int i;
+	int ret;
 
 	if (!pdev->dev.of_node)
 		return -ENODEV;

@@ -433,12 +433,12 @@ static int axi_clkgen_probe(struct platform_device *pdev)
 	axi_clkgen_mmcm_enable(axi_clkgen, false);
 
 	axi_clkgen->clk_hw.init = &init;
-	clk = devm_clk_register(&pdev->dev, &axi_clkgen->clk_hw);
-	if (IS_ERR(clk))
-		return PTR_ERR(clk);
+	ret = devm_clk_hw_register(&pdev->dev, &axi_clkgen->clk_hw);
+	if (ret)
+		return ret;
 
-	return of_clk_add_provider(pdev->dev.of_node, of_clk_src_simple_get,
-				    clk);
+	return of_clk_add_hw_provider(pdev->dev.of_node, of_clk_hw_simple_get,
+				      &axi_clkgen->clk_hw);
 }
 
 static int axi_clkgen_remove(struct platform_device *pdev)

Signature · 1 line

2.7.4

Stephen Boyd

Applied

2016-08-24 23:11 UTC #25 lore raw

Re: [PATCH 09/34] clk: axi-clkgen: Migrate to clk_hw based OF and registration APIs

Quoted 8 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #26 lore raw

PATCH 10/34 clk: axm5516: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Now that we have clk_hw based provider APIs to register clks, we can get rid of struct clk pointers while registering clks in these drivers, allowing us to move closer to a clear split of consumer and provider clk APIs. Make thing simple by using the existing clk_hw array and implementing a custom DT clk provider get function to map the clk spec id to a clk_hw pointer.

Cc Anders Berg <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-axm5516.c | 39 +++++++++++++++++----------------------
 1 file changed, 17 insertions(+), 22 deletions(-)

drivers/clk/clk-axm5516.c +17 ~~-22~~

index c7c91a5ecf8b..5d7ae333257e 100644
@@ -516,6 +516,19 @@ static struct axxia_clk *axmclk_clocks[] = {
 	[AXXIA_CLK_MMC]      = &clk_mmc_mux.aclk,
 };
 
+static struct clk_hw *
+of_clk_axmclk_get(struct of_phandle_args *clkspec, void *unused)
+{
+	unsigned int idx = clkspec->args[0];
+
+	if (idx >= ARRAY_SIZE(axmclk_clocks)) {
+		pr_err("%s: invalid index %u\n", __func__, idx);
+		return ERR_PTR(-EINVAL);
+	}
+
+	return &axmclk_clocks[idx]->hw;
+}
+
 static const struct regmap_config axmclk_regmap_config = {
 	.reg_bits	= 32,
 	.reg_stride	= 4,

@@ -530,21 +543,14 @@ static const struct of_device_id axmclk_match_table[] = {
 };
 MODULE_DEVICE_TABLE(of, axmclk_match_table);
 
-struct axmclk_priv {
-	struct clk_onecell_data onecell;
-	struct clk *clks[];
-};
-
 static int axmclk_probe(struct platform_device *pdev)
 {
 	void __iomem *base;
 	struct resource *res;
 	int i, ret;
 	struct device *dev = &pdev->dev;
-	struct clk *clk;
 	struct regmap *regmap;
 	size_t num_clks;
-	struct axmclk_priv *priv;
 
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	base = devm_ioremap_resource(dev, res);

@@ -557,29 +563,18 @@ static int axmclk_probe(struct platform_device *pdev)
 
 	num_clks = ARRAY_SIZE(axmclk_clocks);
 	pr_info("axmclk: supporting %zu clocks\n", num_clks);
-	priv = devm_kzalloc(dev, sizeof(*priv) + sizeof(*priv->clks) * num_clks,
-			    GFP_KERNEL);
-	if (!priv)
-		return -ENOMEM;
-
-	priv->onecell.clks = priv->clks;
-	priv->onecell.clk_num = num_clks;
 
 	/* Update each entry with the allocated regmap and register the clock
 	 * with the common clock framework
 	 */
 	for (i = 0; i < num_clks; i++) {
 		axmclk_clocks[i]->regmap = regmap;
-		clk = devm_clk_register(dev, &axmclk_clocks[i]->hw);
-		if (IS_ERR(clk))
-			return PTR_ERR(clk);
-		priv->clks[i] = clk;
+		ret = devm_clk_hw_register(dev, &axmclk_clocks[i]->hw);
+		if (ret)
+			return ret;
 	}
 
-	ret = of_clk_add_provider(dev->of_node,
-				  of_clk_src_onecell_get, &priv->onecell);
-
-	return ret;
+	return of_clk_add_hw_provider(dev->of_node, of_clk_axmclk_get, NULL);
 }
 
 static int axmclk_remove(struct platform_device *pdev)

Signature · 1 line

2.7.4

Stephen Boyd

Applied

2016-08-24 23:12 UTC #27 lore raw

Re: [PATCH 10/34] clk: axm5516: Migrate to clk_hw based OF and registration APIs

Quoted 10 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #28 lore raw

PATCH 11/34 clk: cdce: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Cc Max Filippov <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-cdce706.c | 40 ++++++++++++++++++++++------------------
 1 file changed, 22 insertions(+), 18 deletions(-)

drivers/clk/clk-cdce706.c +22 ~~-18~~

index 01877f64eff6..f21d9092564f 100644
@@ -71,7 +71,6 @@ struct cdce706_hw_data {
 	struct cdce706_dev_data *dev_data;
 	unsigned idx;
 	unsigned parent;
-	struct clk *clk;
 	struct clk_hw hw;
 	unsigned div;
 	unsigned mul;

@@ -81,8 +80,6 @@ struct cdce706_hw_data {
 struct cdce706_dev_data {
 	struct i2c_client *client;
 	struct regmap *regmap;
-	struct clk_onecell_data onecell;
-	struct clk *clks[6];
 	struct clk *clkin_clk[2];
 	const char *clkin_name[2];
 	struct cdce706_hw_data clkin[1];

@@ -455,18 +452,19 @@ static int cdce706_register_hw(struct cdce706_dev_data *cdce,
 			       struct clk_init_data *init)
 {
 	unsigned i;
+	int ret;
 
 	for (i = 0; i < num_hw; ++i, ++hw) {
 		init->name = clk_names[i];
 		hw->dev_data = cdce;
 		hw->idx = i;
 		hw->hw.init = init;
-		hw->clk = devm_clk_register(&cdce->client->dev,
+		ret = devm_clk_hw_register(&cdce->client->dev,
 					    &hw->hw);
-		if (IS_ERR(hw->clk)) {
+		if (ret) {
 			dev_err(&cdce->client->dev, "Failed to register %s\n",
 				clk_names[i]);
-			return PTR_ERR(hw->clk);
+			return ret;
 		}
 	}
 	return 0;

@@ -613,13 +611,23 @@ static int cdce706_register_clkouts(struct cdce706_dev_data *cdce)
 			cdce->clkout[i].parent);
 	}
 
-	ret = cdce706_register_hw(cdce, cdce->clkout,
-				  ARRAY_SIZE(cdce->clkout),
-				  cdce706_clkout_name, &init);
-	for (i = 0; i < ARRAY_SIZE(cdce->clkout); ++i)
-		cdce->clks[i] = cdce->clkout[i].clk;
+	return cdce706_register_hw(cdce, cdce->clkout,
+				   ARRAY_SIZE(cdce->clkout),
+				   cdce706_clkout_name, &init);
+}
 
-	return ret;
+static struct clk_hw *
+of_clk_cdce_get(struct of_phandle_args *clkspec, void *data)
+{
+	struct cdce706_dev_data *cdce = data;
+	unsigned int idx = clkspec->args[0];
+
+	if (idx >= ARRAY_SIZE(cdce->clkout)) {
+		pr_err("%s: invalid index %u\n", __func__, idx);
+		return ERR_PTR(-EINVAL);
+	}
+
+	return &cdce->clkout[idx].hw;
 }
 
 static int cdce706_probe(struct i2c_client *client,

@@ -657,12 +665,8 @@ static int cdce706_probe(struct i2c_client *client,
 	ret = cdce706_register_clkouts(cdce);
 	if (ret < 0)
 		return ret;
-	cdce->onecell.clks = cdce->clks;
-	cdce->onecell.clk_num = ARRAY_SIZE(cdce->clks);
-	ret = of_clk_add_provider(client->dev.of_node, of_clk_src_onecell_get,
-				  &cdce->onecell);
-
-	return ret;
+	return of_clk_add_hw_provider(client->dev.of_node, of_clk_cdce_get,
+				      cdce);
 }
 
 static int cdce706_remove(struct i2c_client *client)

Signature · 1 line

2.7.4

Stephen Boyd

Applied

2016-08-24 23:13 UTC #29 lore raw

Re: [PATCH 11/34] clk: cdce: Migrate to clk_hw based OF and registration APIs

Quoted 8 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #30 lore raw

PATCH 12/34 clk: cdce925: Migrate to clk_hw based OF and provider APIs

In reply to Stephen Boyd

Cc Mike Looijmans <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-cdce925.c | 42 +++++++++++++++++++++++-------------------
 1 file changed, 23 insertions(+), 19 deletions(-)

drivers/clk/clk-cdce925.c +23 ~~-19~~

index 089bf88ffa8d..b8459c14a1b7 100644
@@ -62,8 +62,6 @@ struct clk_cdce925_chip {
 	struct i2c_client *i2c_client;
 	struct clk_cdce925_pll pll[NUMBER_OF_PLLS];
 	struct clk_cdce925_output clk[NUMBER_OF_OUTPUTS];
-	struct clk *dt_clk[NUMBER_OF_OUTPUTS];
-	struct clk_onecell_data onecell;
 };
 
 /* ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** */

@@ -557,6 +555,20 @@ static int cdce925_regmap_i2c_read(void *context,
 		return -EIO;
 }
 
+static struct clk_hw *
+of_clk_cdce925_get(struct of_phandle_args *clkspec, void *_data)
+{
+	struct clk_cdce925_chip *data = _data;
+	unsigned int idx = clkspec->args[0];
+
+	if (idx >= ARRAY_SIZE(data->clk)) {
+		pr_err("%s: invalid index %u\n", __func__, idx);
+		return ERR_PTR(-EINVAL);
+	}
+
+	return &data->clk[idx].hw;
+}
+
 /* The CDCE925 uses a funky way to read/write registers. Bulk mode is
  * just weird, so just use the single byte mode exclusively. */
 static struct regmap_bus regmap_cdce925_bus = {

@@ -572,7 +584,6 @@ static int cdce925_probe(struct i2c_client *client,
 	const char *parent_name;
 	const char *pll_clk_name[NUMBER_OF_PLLS] = {NULL,};
 	struct clk_init_data init;
-	struct clk *clk;
 	u32 value;
 	int i;
 	int err;

@@ -622,10 +633,9 @@ static int cdce925_probe(struct i2c_client *client,
 		data->pll[i].chip = data;
 		data->pll[i].hw.init = &init;
 		data->pll[i].index = i;
-		clk = devm_clk_register(&client->dev, &data->pll[i].hw);
-		if (IS_ERR(clk)) {
+		err = devm_clk_hw_register(&client->dev, &data->pll[i].hw);
+		if (err) {
 			dev_err(&client->dev, "Failed register PLL %d\n", i);
-			err = PTR_ERR(clk);
 			goto error;
 		}
 		sprintf(child_name, "PLL%d", i+1);

@@ -634,7 +644,7 @@ static int cdce925_probe(struct i2c_client *client,
 			continue;
 		if (!of_property_read_u32(np_output,
 			"clock-frequency", &value)) {
-			err = clk_set_rate(clk, value);
+			err = clk_set_rate(data->pll[i].hw.clk, value);
 			if (err)
 				dev_err(&client->dev,
 					"unable to set PLL frequency %ud\n",

@@ -663,14 +673,12 @@ static int cdce925_probe(struct i2c_client *client,
 	data->clk[0].hw.init = &init;
 	data->clk[0].index = 0;
 	data->clk[0].pdiv = 1;
-	clk = devm_clk_register(&client->dev, &data->clk[0].hw);
+	err = devm_clk_hw_register(&client->dev, &data->clk[0].hw);
 	kfree(init.name); /* clock framework made a copy of the name */
-	if (IS_ERR(clk)) {
+	if (err) {
 		dev_err(&client->dev, "clock registration Y1 failed\n");
-		err = PTR_ERR(clk);
 		goto error;
 	}
-	data->dt_clk[0] = clk;
 
 	/* Register output clocks Y2 .. Y5*/
 	init.ops = &cdce925_clk_ops;

@@ -695,21 +703,17 @@ static int cdce925_probe(struct i2c_client *client,
 			init.parent_names = &pll_clk_name[1];
 			break;
 		}
-		clk = devm_clk_register(&client->dev, &data->clk[i].hw);
+		err = devm_clk_hw_register(&client->dev, &data->clk[i].hw);
 		kfree(init.name); /* clock framework made a copy of the name */
-		if (IS_ERR(clk)) {
+		if (err) {
 			dev_err(&client->dev, "clock registration failed\n");
-			err = PTR_ERR(clk);
 			goto error;
 		}
-		data->dt_clk[i] = clk;
 	}
 
 	/* Register the output clocks */
-	data->onecell.clk_num = NUMBER_OF_OUTPUTS;
-	data->onecell.clks = data->dt_clk;
-	err = of_clk_add_provider(client->dev.of_node, of_clk_src_onecell_get,
-		&data->onecell);
+	err = of_clk_add_hw_provider(client->dev.of_node, of_clk_cdce925_get,
+				  data);
 	if (err)
 		dev_err(&client->dev, "unable to add OF clock provider\n");

Signature · 1 line

2.7.4

Stephen Boyd

Applied

2016-08-25 00:19 UTC #31 lore raw

Re: [PATCH 12/34] clk: cdce925: Migrate to clk_hw based OF and provider APIs

Quoted 8 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #32 lore raw

PATCH 13/34 clk: clps711x: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Cc Alexander Shiyan <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-clps711x.c | 78 +++++++++++++++++++++++-----------------------
 1 file changed, 39 insertions(+), 39 deletions(-)

drivers/clk/clk-clps711x.c +39 ~~-39~~

index 1f60b02416a7..9b57050b8f19 100644
@@ -40,9 +40,8 @@ static const struct clk_div_table timer_div_table[] = {
 };
 
 struct clps711x_clk {
-	struct clk_onecell_data	clk_data;
-	spinlock_t		lock;
-	struct clk		*clks[CLPS711X_CLK_MAX];
+	spinlock_t			lock;
+	struct clk_hw_onecell_data	clk_data;
 };
 
 static struct clps711x_clk * __init _clps711x_clk_init(void __iomem *base,

@@ -55,7 +54,9 @@ static struct clps711x_clk * __init _clps711x_clk_init(void __iomem *base,
 	if (!base)
 		return ERR_PTR(-ENOMEM);
 
-	clps711x_clk = kzalloc(sizeof(*clps711x_clk), GFP_KERNEL);
+	clps711x_clk = kzalloc(sizeof(*clps711x_clk) +
+			sizeof(*clps711x_clk->clk_data.hws) * CLPS711X_CLK_MAX,
+			GFP_KERNEL);
 	if (!clps711x_clk)
 		return ERR_PTR(-ENOMEM);

@@ -106,40 +107,40 @@ static struct clps711x_clk * __init _clps711x_clk_init(void __iomem *base,
 	tmp |= SYSCON1_TC2M | SYSCON1_TC2S;
 	writel(tmp, base + CLPS711X_SYSCON1);
 
-	clps711x_clk->clks[CLPS711X_CLK_DUMMY] =
-		clk_register_fixed_rate(NULL, "dummy", NULL, 0, 0);
-	clps711x_clk->clks[CLPS711X_CLK_CPU] =
-		clk_register_fixed_rate(NULL, "cpu", NULL, 0, f_cpu);
-	clps711x_clk->clks[CLPS711X_CLK_BUS] =
-		clk_register_fixed_rate(NULL, "bus", NULL, 0, f_bus);
-	clps711x_clk->clks[CLPS711X_CLK_PLL] =
-		clk_register_fixed_rate(NULL, "pll", NULL, 0, f_pll);
-	clps711x_clk->clks[CLPS711X_CLK_TIMERREF] =
-		clk_register_fixed_rate(NULL, "timer_ref", NULL, 0, f_tim);
-	clps711x_clk->clks[CLPS711X_CLK_TIMER1] =
-		clk_register_divider_table(NULL, "timer1", "timer_ref", 0,
+	clps711x_clk->clk_data.hws[CLPS711X_CLK_DUMMY] =
+		clk_hw_register_fixed_rate(NULL, "dummy", NULL, 0, 0);
+	clps711x_clk->clk_data.hws[CLPS711X_CLK_CPU] =
+		clk_hw_register_fixed_rate(NULL, "cpu", NULL, 0, f_cpu);
+	clps711x_clk->clk_data.hws[CLPS711X_CLK_BUS] =
+		clk_hw_register_fixed_rate(NULL, "bus", NULL, 0, f_bus);
+	clps711x_clk->clk_data.hws[CLPS711X_CLK_PLL] =
+		clk_hw_register_fixed_rate(NULL, "pll", NULL, 0, f_pll);
+	clps711x_clk->clk_data.hws[CLPS711X_CLK_TIMERREF] =
+		clk_hw_register_fixed_rate(NULL, "timer_ref", NULL, 0, f_tim);
+	clps711x_clk->clk_data.hws[CLPS711X_CLK_TIMER1] =
+		clk_hw_register_divider_table(NULL, "timer1", "timer_ref", 0,
 					   base + CLPS711X_SYSCON1, 5, 1, 0,
 					   timer_div_table, &clps711x_clk->lock);
-	clps711x_clk->clks[CLPS711X_CLK_TIMER2] =
-		clk_register_divider_table(NULL, "timer2", "timer_ref", 0,
+	clps711x_clk->clk_data.hws[CLPS711X_CLK_TIMER2] =
+		clk_hw_register_divider_table(NULL, "timer2", "timer_ref", 0,
 					   base + CLPS711X_SYSCON1, 7, 1, 0,
 					   timer_div_table, &clps711x_clk->lock);
-	clps711x_clk->clks[CLPS711X_CLK_PWM] =
-		clk_register_fixed_rate(NULL, "pwm", NULL, 0, f_pwm);
-	clps711x_clk->clks[CLPS711X_CLK_SPIREF] =
-		clk_register_fixed_rate(NULL, "spi_ref", NULL, 0, f_spi);
-	clps711x_clk->clks[CLPS711X_CLK_SPI] =
-		clk_register_divider_table(NULL, "spi", "spi_ref", 0,
+	clps711x_clk->clk_data.hws[CLPS711X_CLK_PWM] =
+		clk_hw_register_fixed_rate(NULL, "pwm", NULL, 0, f_pwm);
+	clps711x_clk->clk_data.hws[CLPS711X_CLK_SPIREF] =
+		clk_hw_register_fixed_rate(NULL, "spi_ref", NULL, 0, f_spi);
+	clps711x_clk->clk_data.hws[CLPS711X_CLK_SPI] =
+		clk_hw_register_divider_table(NULL, "spi", "spi_ref", 0,
 					   base + CLPS711X_SYSCON1, 16, 2, 0,
 					   spi_div_table, &clps711x_clk->lock);
-	clps711x_clk->clks[CLPS711X_CLK_UART] =
-		clk_register_fixed_factor(NULL, "uart", "bus", 0, 1, 10);
-	clps711x_clk->clks[CLPS711X_CLK_TICK] =
-		clk_register_fixed_rate(NULL, "tick", NULL, 0, 64);
+	clps711x_clk->clk_data.hws[CLPS711X_CLK_UART] =
+		clk_hw_register_fixed_factor(NULL, "uart", "bus", 0, 1, 10);
+	clps711x_clk->clk_data.hws[CLPS711X_CLK_TICK] =
+		clk_hw_register_fixed_rate(NULL, "tick", NULL, 0, 64);
 	for (i = 0; i < CLPS711X_CLK_MAX; i++)
-		if (IS_ERR(clps711x_clk->clks[i]))
+		if (IS_ERR(clps711x_clk->clk_data.hws[i]))
 			pr_err("clk %i: register failed with %ld\n",
-			       i, PTR_ERR(clps711x_clk->clks[i]));
+			       i, PTR_ERR(clps711x_clk->clk_data.hws[i]));
 
 	return clps711x_clk;
 }

@@ -153,17 +154,17 @@ void __init clps711x_clk_init(void __iomem *base)
 	BUG_ON(IS_ERR(clps711x_clk));
 
 	/* Clocksource */
-	clk_register_clkdev(clps711x_clk->clks[CLPS711X_CLK_TIMER1],
+	clk_hw_register_clkdev(clps711x_clk->clk_data.hws[CLPS711X_CLK_TIMER1],
 			    NULL, "clps711x-timer.0");
-	clk_register_clkdev(clps711x_clk->clks[CLPS711X_CLK_TIMER2],
+	clk_hw_register_clkdev(clps711x_clk->clk_data.hws[CLPS711X_CLK_TIMER2],
 			    NULL, "clps711x-timer.1");
 
 	/* Drivers */
-	clk_register_clkdev(clps711x_clk->clks[CLPS711X_CLK_PWM],
+	clk_hw_register_clkdev(clps711x_clk->clk_data.hws[CLPS711X_CLK_PWM],
 			    NULL, "clps711x-pwm");
-	clk_register_clkdev(clps711x_clk->clks[CLPS711X_CLK_UART],
+	clk_hw_register_clkdev(clps711x_clk->clk_data.hws[CLPS711X_CLK_UART],
 			    NULL, "clps711x-uart.0");
-	clk_register_clkdev(clps711x_clk->clks[CLPS711X_CLK_UART],
+	clk_hw_register_clkdev(clps711x_clk->clk_data.hws[CLPS711X_CLK_UART],
 			    NULL, "clps711x-uart.1");
 }

@@ -179,10 +180,9 @@ static void __init clps711x_clk_init_dt(struct device_node *np)
 	clps711x_clk = _clps711x_clk_init(base, fref);
 	BUG_ON(IS_ERR(clps711x_clk));
 
-	clps711x_clk->clk_data.clks = clps711x_clk->clks;
-	clps711x_clk->clk_data.clk_num = CLPS711X_CLK_MAX;
-	of_clk_add_provider(np, of_clk_src_onecell_get,
-			    &clps711x_clk->clk_data);
+	clps711x_clk->clk_data.num = CLPS711X_CLK_MAX;
+	of_clk_add_hw_provider(np, of_clk_hw_onecell_get,
+			       &clps711x_clk->clk_data);
 }
 CLK_OF_DECLARE(clps711x, "cirrus,clps711x-clk", clps711x_clk_init_dt);
 #endif

Signature · 1 line

2.7.4

Stephen Boyd

Applied

2016-08-25 00:20 UTC #33 lore raw

Re: [PATCH 13/34] clk: clps711x: Migrate to clk_hw based OF and registration APIs

Quoted 8 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #34 lore raw

PATCH 14/34 clk: cs2000: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Cc Kuninori Morimoto <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-cs2000-cp.c | 16 ++++++----------
 1 file changed, 6 insertions(+), 10 deletions(-)

drivers/clk/clk-cs2000-cp.c +6 ~~-10~~

index 7379de8dc894..021f3daf34e1 100644
@@ -59,7 +59,6 @@ struct cs2000_priv {
 	struct i2c_client *client;
 	struct clk *clk_in;
 	struct clk *ref_clk;
-	struct clk *clk_out;
 };
 
 static const struct of_device_id cs2000_of_match[] = {

@@ -371,7 +370,6 @@ static int cs2000_clk_register(struct cs2000_priv *priv)
 	struct device_node *np = dev->of_node;
 	struct clk_init_data init;
 	const char *name = np->name;
-	struct clk *clk;
 	static const char *parent_names[CLK_MAX];
 	int ch = 0; /* it uses ch0 only at this point */
 	int rate;

@@ -400,18 +398,16 @@ static int cs2000_clk_register(struct cs2000_priv *priv)
 
 	priv->hw.init = &init;
 
-	clk = clk_register(dev, &priv->hw);
-	if (IS_ERR(clk))
-		return PTR_ERR(clk);
+	ret = clk_hw_register(dev, &priv->hw);
+	if (ret)
+		return ret;
 
-	ret = of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	ret = of_clk_add_hw_provider(np, of_clk_hw_simple_get, &priv->hw);
 	if (ret < 0) {
-		clk_unregister(clk);
+		clk_hw_unregister(&priv->hw);
 		return ret;
 	}
 
-	priv->clk_out = clk;
-
 	return 0;
 }

@@ -454,7 +450,7 @@ static int cs2000_remove(struct i2c_client *client)
 
 	of_clk_del_provider(np);
 
-	clk_unregister(priv->clk_out);
+	clk_hw_unregister(&priv->hw);
 
 	return 0;
 }

Signature · 1 line

2.7.4

Stephen Boyd

Applied

2016-08-25 00:21 UTC #35 lore raw

Re: [PATCH 14/34] clk: cs2000: Migrate to clk_hw based OF and registration APIs

Quoted 8 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #36 lore raw

PATCH 15/34 clk: efm32gg: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Cc Uwe Kleine-K?nig <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-efm32gg.c | 63 ++++++++++++++++++++++++++---------------------
 1 file changed, 35 insertions(+), 28 deletions(-)

drivers/clk/clk-efm32gg.c +35 ~~-28~~

index 22e4c659704e..8802a2dd56ac 100644
@@ -10,24 +10,31 @@
 #include <linux/clk-provider.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
+#include <linux/slab.h>
 
 #include <dt-bindings/clock/efm32-cmu.h>
 
 #define CMU_HFPERCLKEN0		0x44
+#define CMU_MAX_CLKS		37
 
-static struct clk *clk[37];
-static struct clk_onecell_data clk_data = {
-	.clks = clk,
-	.clk_num = ARRAY_SIZE(clk),
-};
+static struct clk_hw_onecell_data *clk_data;
 
 static void __init efm32gg_cmu_init(struct device_node *np)
 {
 	int i;
 	void __iomem *base;
+	struct clk_hw **hws;
 
-	for (i = 0; i < ARRAY_SIZE(clk); ++i)
-		clk[i] = ERR_PTR(-ENOENT);
+	clk_data = kzalloc(sizeof(*clk_data) +
+			   sizeof(*clk_data->hws) * CMU_MAX_CLKS, GFP_KERNEL);
+
+	if (!clk_data)
+		return;
+
+	hws = clk_data->hws;
+
+	for (i = 0; i < CMU_MAX_CLKS; ++i)
+		hws[i] = ERR_PTR(-ENOENT);
 
 	base = of_iomap(np, 0);
 	if (!base) {

@@ -35,46 +42,46 @@ static void __init efm32gg_cmu_init(struct device_node *np)
 		return;
 	}
 
-	clk[clk_HFXO] = clk_register_fixed_rate(NULL, "HFXO", NULL,
-			0, 48000000);
+	hws[clk_HFXO] = clk_hw_register_fixed_rate(NULL, "HFXO", NULL, 0,
+						   48000000);
 
-	clk[clk_HFPERCLKUSART0] = clk_register_gate(NULL, "HFPERCLK.USART0",
+	hws[clk_HFPERCLKUSART0] = clk_hw_register_gate(NULL, "HFPERCLK.USART0",
 			"HFXO", 0, base + CMU_HFPERCLKEN0, 0, 0, NULL);
-	clk[clk_HFPERCLKUSART1] = clk_register_gate(NULL, "HFPERCLK.USART1",
+	hws[clk_HFPERCLKUSART1] = clk_hw_register_gate(NULL, "HFPERCLK.USART1",
 			"HFXO", 0, base + CMU_HFPERCLKEN0, 1, 0, NULL);
-	clk[clk_HFPERCLKUSART2] = clk_register_gate(NULL, "HFPERCLK.USART2",
+	hws[clk_HFPERCLKUSART2] = clk_hw_register_gate(NULL, "HFPERCLK.USART2",
 			"HFXO", 0, base + CMU_HFPERCLKEN0, 2, 0, NULL);
-	clk[clk_HFPERCLKUART0] = clk_register_gate(NULL, "HFPERCLK.UART0",
+	hws[clk_HFPERCLKUART0] = clk_hw_register_gate(NULL, "HFPERCLK.UART0",
 			"HFXO", 0, base + CMU_HFPERCLKEN0, 3, 0, NULL);
-	clk[clk_HFPERCLKUART1] = clk_register_gate(NULL, "HFPERCLK.UART1",
+	hws[clk_HFPERCLKUART1] = clk_hw_register_gate(NULL, "HFPERCLK.UART1",
 			"HFXO", 0, base + CMU_HFPERCLKEN0, 4, 0, NULL);
-	clk[clk_HFPERCLKTIMER0] = clk_register_gate(NULL, "HFPERCLK.TIMER0",
+	hws[clk_HFPERCLKTIMER0] = clk_hw_register_gate(NULL, "HFPERCLK.TIMER0",
 			"HFXO", 0, base + CMU_HFPERCLKEN0, 5, 0, NULL);
-	clk[clk_HFPERCLKTIMER1] = clk_register_gate(NULL, "HFPERCLK.TIMER1",
+	hws[clk_HFPERCLKTIMER1] = clk_hw_register_gate(NULL, "HFPERCLK.TIMER1",
 			"HFXO", 0, base + CMU_HFPERCLKEN0, 6, 0, NULL);
-	clk[clk_HFPERCLKTIMER2] = clk_register_gate(NULL, "HFPERCLK.TIMER2",
+	hws[clk_HFPERCLKTIMER2] = clk_hw_register_gate(NULL, "HFPERCLK.TIMER2",
 			"HFXO", 0, base + CMU_HFPERCLKEN0, 7, 0, NULL);
-	clk[clk_HFPERCLKTIMER3] = clk_register_gate(NULL, "HFPERCLK.TIMER3",
+	hws[clk_HFPERCLKTIMER3] = clk_hw_register_gate(NULL, "HFPERCLK.TIMER3",
 			"HFXO", 0, base + CMU_HFPERCLKEN0, 8, 0, NULL);
-	clk[clk_HFPERCLKACMP0] = clk_register_gate(NULL, "HFPERCLK.ACMP0",
+	hws[clk_HFPERCLKACMP0] = clk_hw_register_gate(NULL, "HFPERCLK.ACMP0",
 			"HFXO", 0, base + CMU_HFPERCLKEN0, 9, 0, NULL);
-	clk[clk_HFPERCLKACMP1] = clk_register_gate(NULL, "HFPERCLK.ACMP1",
+	hws[clk_HFPERCLKACMP1] = clk_hw_register_gate(NULL, "HFPERCLK.ACMP1",
 			"HFXO", 0, base + CMU_HFPERCLKEN0, 10, 0, NULL);
-	clk[clk_HFPERCLKI2C0] = clk_register_gate(NULL, "HFPERCLK.I2C0",
+	hws[clk_HFPERCLKI2C0] = clk_hw_register_gate(NULL, "HFPERCLK.I2C0",
 			"HFXO", 0, base + CMU_HFPERCLKEN0, 11, 0, NULL);
-	clk[clk_HFPERCLKI2C1] = clk_register_gate(NULL, "HFPERCLK.I2C1",
+	hws[clk_HFPERCLKI2C1] = clk_hw_register_gate(NULL, "HFPERCLK.I2C1",
 			"HFXO", 0, base + CMU_HFPERCLKEN0, 12, 0, NULL);
-	clk[clk_HFPERCLKGPIO] = clk_register_gate(NULL, "HFPERCLK.GPIO",
+	hws[clk_HFPERCLKGPIO] = clk_hw_register_gate(NULL, "HFPERCLK.GPIO",
 			"HFXO", 0, base + CMU_HFPERCLKEN0, 13, 0, NULL);
-	clk[clk_HFPERCLKVCMP] = clk_register_gate(NULL, "HFPERCLK.VCMP",
+	hws[clk_HFPERCLKVCMP] = clk_hw_register_gate(NULL, "HFPERCLK.VCMP",
 			"HFXO", 0, base + CMU_HFPERCLKEN0, 14, 0, NULL);
-	clk[clk_HFPERCLKPRS] = clk_register_gate(NULL, "HFPERCLK.PRS",
+	hws[clk_HFPERCLKPRS] = clk_hw_register_gate(NULL, "HFPERCLK.PRS",
 			"HFXO", 0, base + CMU_HFPERCLKEN0, 15, 0, NULL);
-	clk[clk_HFPERCLKADC0] = clk_register_gate(NULL, "HFPERCLK.ADC0",
+	hws[clk_HFPERCLKADC0] = clk_hw_register_gate(NULL, "HFPERCLK.ADC0",
 			"HFXO", 0, base + CMU_HFPERCLKEN0, 16, 0, NULL);
-	clk[clk_HFPERCLKDAC0] = clk_register_gate(NULL, "HFPERCLK.DAC0",
+	hws[clk_HFPERCLKDAC0] = clk_hw_register_gate(NULL, "HFPERCLK.DAC0",
 			"HFXO", 0, base + CMU_HFPERCLKEN0, 17, 0, NULL);
 
-	of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
+	of_clk_add_hw_provider(np, of_clk_hw_onecell_get, &clk_data);
 }
 CLK_OF_DECLARE(efm32ggcmu, "efm32gg,cmu", efm32gg_cmu_init);

Signature · 1 line

2.7.4

Stephen Boyd

Applied

2016-08-25 00:22 UTC #37 lore raw

Re: [PATCH 15/34] clk: efm32gg: Migrate to clk_hw based OF and registration APIs

Quoted 8 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #38 lore raw

PATCH 16/34 clk: ls1x: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Cc Kelvin Cheung <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-ls1x.c | 69 +++++++++++++++++++++++++-------------------------
 1 file changed, 35 insertions(+), 34 deletions(-)

drivers/clk/clk-ls1x.c +35 ~~-34~~

index 5097831387ff..c1cc427d2b78 100644
@@ -48,13 +48,13 @@ static const struct clk_ops ls1x_pll_clk_ops = {
 	.recalc_rate = ls1x_pll_recalc_rate,
 };
 
-static struct clk *__init clk_register_pll(struct device *dev,
-					   const char *name,
-					   const char *parent_name,
-					   unsigned long flags)
+static struct clk_hw *__init clk_hw_register_pll(struct device *dev,
+						 const char *name,
+						 const char *parent_name,
+						 unsigned long flags)
 {
+	int ret;
 	struct clk_hw *hw;
-	struct clk *clk;
 	struct clk_init_data init;
 
 	/* allocate the divider */

@@ -72,12 +72,13 @@ static struct clk *__init clk_register_pll(struct device *dev,
 	hw->init = &init;
 
 	/* register the clock */
-	clk = clk_register(dev, hw);
-
-	if (IS_ERR(clk))
+	ret = clk_hw_register(dev, hw);
+	if (ret) {
 		kfree(hw);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static const char * const cpu_parents[] = { "cpu_clk_div", "osc_33m_clk", };

@@ -86,14 +87,14 @@ static const char * const dc_parents[] = { "dc_clk_div", "osc_33m_clk", };
 
 void __init ls1x_clk_init(void)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 
-	clk = clk_register_fixed_rate(NULL, "osc_33m_clk", NULL, 0, OSC);
-	clk_register_clkdev(clk, "osc_33m_clk", NULL);
+	hw = clk_hw_register_fixed_rate(NULL, "osc_33m_clk", NULL, 0, OSC);
+	clk_hw_register_clkdev(clk, "osc_33m_clk", NULL);
 
 	/* clock derived from 33 MHz OSC clk */
-	clk = clk_register_pll(NULL, "pll_clk", "osc_33m_clk", 0);
-	clk_register_clkdev(clk, "pll_clk", NULL);
+	hw = clk_hw_register_pll(NULL, "pll_clk", "osc_33m_clk", 0);
+	clk_hw_register_clkdev(hw, "pll_clk", NULL);
 
 	/* clock derived from PLL clk */
 	/*                                 _____

@@ -102,17 +103,17 @@ void __init ls1x_clk_init(void)
 	 *        \___ PLL ___ CPU DIV ___|     |
 	 *                                |_____|
 	 */
-	clk = clk_register_divider(NULL, "cpu_clk_div", "pll_clk",
+	hw = clk_hw_register_divider(NULL, "cpu_clk_div", "pll_clk",
 				   CLK_GET_RATE_NOCACHE, LS1X_CLK_PLL_DIV,
 				   DIV_CPU_SHIFT, DIV_CPU_WIDTH,
 				   CLK_DIVIDER_ONE_BASED |
 				   CLK_DIVIDER_ROUND_CLOSEST, &_lock);
-	clk_register_clkdev(clk, "cpu_clk_div", NULL);
-	clk = clk_register_mux(NULL, "cpu_clk", cpu_parents,
+	clk_hw_register_clkdev(hw, "cpu_clk_div", NULL);
+	hw = clk_hw_register_mux(NULL, "cpu_clk", cpu_parents,
 			       ARRAY_SIZE(cpu_parents),
 			       CLK_SET_RATE_NO_REPARENT, LS1X_CLK_PLL_DIV,
 			       BYPASS_CPU_SHIFT, BYPASS_CPU_WIDTH, 0, &_lock);
-	clk_register_clkdev(clk, "cpu_clk", NULL);
+	clk_hw_register_clkdev(hw, "cpu_clk", NULL);
 
 	/*                                 _____
 	 *         _______________________|     |

@@ -120,15 +121,15 @@ void __init ls1x_clk_init(void)
 	 *        \___ PLL ___ DC  DIV ___|     |
 	 *                                |_____|
 	 */
-	clk = clk_register_divider(NULL, "dc_clk_div", "pll_clk",
+	hw = clk_hw_register_divider(NULL, "dc_clk_div", "pll_clk",
 				   0, LS1X_CLK_PLL_DIV, DIV_DC_SHIFT,
 				   DIV_DC_WIDTH, CLK_DIVIDER_ONE_BASED, &_lock);
-	clk_register_clkdev(clk, "dc_clk_div", NULL);
-	clk = clk_register_mux(NULL, "dc_clk", dc_parents,
+	clk_hw_register_clkdev(hw, "dc_clk_div", NULL);
+	hw = clk_hw_register_mux(NULL, "dc_clk", dc_parents,
 			       ARRAY_SIZE(dc_parents),
 			       CLK_SET_RATE_NO_REPARENT, LS1X_CLK_PLL_DIV,
 			       BYPASS_DC_SHIFT, BYPASS_DC_WIDTH, 0, &_lock);
-	clk_register_clkdev(clk, "dc_clk", NULL);
+	clk_hw_register_clkdev(hw, "dc_clk", NULL);
 
 	/*                                 _____
 	 *         _______________________|     |

@@ -136,26 +137,26 @@ void __init ls1x_clk_init(void)
 	 *        \___ PLL ___ DDR DIV ___|     |
 	 *                                |_____|
 	 */
-	clk = clk_register_divider(NULL, "ahb_clk_div", "pll_clk",
+	hw = clk_hw_register_divider(NULL, "ahb_clk_div", "pll_clk",
 				   0, LS1X_CLK_PLL_DIV, DIV_DDR_SHIFT,
 				   DIV_DDR_WIDTH, CLK_DIVIDER_ONE_BASED,
 				   &_lock);
-	clk_register_clkdev(clk, "ahb_clk_div", NULL);
-	clk = clk_register_mux(NULL, "ahb_clk", ahb_parents,
+	clk_hw_register_clkdev(hw, "ahb_clk_div", NULL);
+	hw = clk_hw_register_mux(NULL, "ahb_clk", ahb_parents,
 			       ARRAY_SIZE(ahb_parents),
 			       CLK_SET_RATE_NO_REPARENT, LS1X_CLK_PLL_DIV,
 			       BYPASS_DDR_SHIFT, BYPASS_DDR_WIDTH, 0, &_lock);
-	clk_register_clkdev(clk, "ahb_clk", NULL);
-	clk_register_clkdev(clk, "stmmaceth", NULL);
+	clk_hw_register_clkdev(hw, "ahb_clk", NULL);
+	clk_hw_register_clkdev(hw, "stmmaceth", NULL);
 
 	/* clock derived from AHB clk */
 	/* APB clk is always half of the AHB clk */
-	clk = clk_register_fixed_factor(NULL, "apb_clk", "ahb_clk", 0, 1,
+	hw = clk_hw_register_fixed_factor(NULL, "apb_clk", "ahb_clk", 0, 1,
 					DIV_APB);
-	clk_register_clkdev(clk, "apb_clk", NULL);
-	clk_register_clkdev(clk, "ls1x_i2c", NULL);
-	clk_register_clkdev(clk, "ls1x_pwmtimer", NULL);
-	clk_register_clkdev(clk, "ls1x_spi", NULL);
-	clk_register_clkdev(clk, "ls1x_wdt", NULL);
-	clk_register_clkdev(clk, "serial8250", NULL);
+	clk_hw_register_clkdev(hw, "apb_clk", NULL);
+	clk_hw_register_clkdev(hw, "ls1x_i2c", NULL);
+	clk_hw_register_clkdev(hw, "ls1x_pwmtimer", NULL);
+	clk_hw_register_clkdev(hw, "ls1x_spi", NULL);
+	clk_hw_register_clkdev(hw, "ls1x_wdt", NULL);
+	clk_hw_register_clkdev(hw, "serial8250", NULL);
 }

Signature · 1 line

2.7.4

Stephen Boyd

2016-08-19 00:09 UTC #39 lore raw

Re: [PATCH 16/34] clk: ls1x: Migrate to clk_hw based OF and registration APIs

Quoted 8 lines · Stephen Boyd

Applied to clk-next + a small fix to get it to compile

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #40 lore raw

PATCH 17/34 clk: maxgen: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Cc Javier Martinez Canillas <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-max-gen.c | 64 +++++++++++++++++++++++------------------------
 1 file changed, 31 insertions(+), 33 deletions(-)

drivers/clk/clk-max-gen.c +31 ~~-33~~

index 35af9cb6da4f..4bb53fcf8639 100644
@@ -40,6 +40,11 @@ struct max_gen_clk {
 	struct clk_hw hw;
 };
 
+struct max_gen_data {
+	size_t num;
+	struct max_gen_clk clks[];
+};
+
 static struct max_gen_clk *to_max_gen_clk(struct clk_hw *hw)
 {
 	return container_of(hw, struct max_gen_clk, hw);

@@ -89,43 +94,48 @@ struct clk_ops max_gen_clk_ops = {
 };
 EXPORT_SYMBOL_GPL(max_gen_clk_ops);
 
-static struct clk *max_gen_clk_register(struct device *dev,
-					struct max_gen_clk *max_gen)
+static int max_gen_clk_register(struct device *dev, struct max_gen_clk *max_gen)
 {
-	struct clk *clk;
 	struct clk_hw *hw = &max_gen->hw;
 	int ret;
 
-	clk = devm_clk_register(dev, hw);
-	if (IS_ERR(clk))
-		return clk;
+	ret = devm_clk_hw_register(dev, hw);
+	if (ret)
+		return ret;
+
+	return clk_hw_register_clkdev(hw, hw->init->name, NULL);
+}
 
-	ret = clk_register_clkdev(clk, hw->init->name, NULL);
+static struct clk_hw *
+of_clk_max_gen_get(struct of_phandle_args *clkspec, void *data)
+{
+	struct max_gen_data *max_gen_data = data;
+	unsigned int idx = clkspec->args[0];
 
-	if (ret)
-		return ERR_PTR(ret);
+	if (idx >= max_gen_data->num) {
+		pr_err("%s: invalid index %u\n", __func__, idx);
+		return ERR_PTR(-EINVAL);
+	}
 
-	return clk;
+	return &max_gen_data->clks[idx].hw;
 }
 
 int max_gen_clk_probe(struct platform_device *pdev, struct regmap *regmap,
 		      u32 reg, struct clk_init_data *clks_init, int num_init)
 {
 	int i, ret;
+	struct max_gen_data *max_gen_data;
 	struct max_gen_clk *max_gen_clks;
-	struct clk **clocks;
 	struct device *dev = pdev->dev.parent;
 	const char *clk_name;
 	struct clk_init_data *init;
 
-	clocks = devm_kzalloc(dev, sizeof(struct clk *) * num_init, GFP_KERNEL);
-	if (!clocks)
+	max_gen_data = devm_kzalloc(dev, sizeof(*max_gen_data) +
+			sizeof(*max_gen_data->clks) * num_init, GFP_KERNEL);
+	if (!max_gen_data)
 		return -ENOMEM;
 
-	max_gen_clks = devm_kzalloc(dev, sizeof(struct max_gen_clk)
-				    * num_init, GFP_KERNEL);
-	if (!max_gen_clks)
-		return -ENOMEM;
+	max_gen_clks = max_gen_data->clks;
 
 	for (i = 0; i < num_init; i++) {
 		max_gen_clks[i].regmap = regmap;

@@ -149,29 +159,17 @@ int max_gen_clk_probe(struct platform_device *pdev, struct regmap *regmap,
 
 		max_gen_clks[i].hw.init = init;
 
-		clocks[i] = max_gen_clk_register(dev, &max_gen_clks[i]);
-		if (IS_ERR(clocks[i])) {
-			ret = PTR_ERR(clocks[i]);
+		ret = max_gen_clk_register(dev, &max_gen_clks[i]);
+		if (ret) {
 			dev_err(dev, "failed to register %s\n",
 				max_gen_clks[i].hw.init->name);
 			return ret;
 		}
 	}
 
-	platform_set_drvdata(pdev, clocks);
-
 	if (dev->of_node) {
-		struct clk_onecell_data *of_data;
-
-		of_data = devm_kzalloc(dev, sizeof(*of_data), GFP_KERNEL);
-		if (!of_data)
-			return -ENOMEM;
-
-		of_data->clks = clocks;
-		of_data->clk_num = num_init;
-		ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
-					  of_data);
-
+		ret = of_clk_add_hw_provider(dev->of_node, of_clk_max_gen_get,
+					     max_gen_clks);
 		if (ret) {
 			dev_err(dev, "failed to register OF clock provider\n");
 			return ret;

Signature · 1 line

2.7.4

Javier Martinez Canillas

2016-06-07 18:50 UTC #41 lore raw

Re: [PATCH 17/34] clk: maxgen: Migrate to clk_hw based OF and registration APIs

Hello Stephen,

Quoted 6 lines · Stephen Boyd

This email address doesn't exist anymore, you can use javier at osg.samsung.com instead.

Quoted 6 lines

I tried this patch on top of linux-next and my Peach Pi Chromebook (that has a max77802 chip) failed to boot. Following is the relevant parts from the boot log:

[    3.096860] WARNING: CPU: 1 PID: 121 at include/linux/kref.h:46
__clk_get+0x90/0x98
[    3.096882] Modules linked in:
[    3.096896] CPU: 1 PID: 121 Comm: kworker/u16:2 Not tainted
4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[    3.096905] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[    3.096926] Workqueue: deferwq deferred_probe_work_func
[    3.096956] [<c010e1ac>] (unwind_backtrace) from [<c010af38>]
(show_stack+0x10/0x14)
[    3.096971] [<c010af38>] (show_stack) from [<c032479c>]
(dump_stack+0x88/0x9c)
[    3.096986] [<c032479c>] (dump_stack) from [<c011a82c>] (__warn+0xe8/0x100)
[    3.096997] [<c011a82c>] (__warn) from [<c011a8f4>]
(warn_slowpath_null+0x20/0x28)
[    3.097009] [<c011a8f4>] (warn_slowpath_null) from [<c05528dc>]
(__clk_get+0x90/0x98)
[    3.097024] [<c05528dc>] (__clk_get) from [<c0552a40>]
(__of_clk_get_from_provider+0x70/0x10c)
[    3.097041] [<c0552a40>] (__of_clk_get_from_provider) from
[<c054f160>] (__of_clk_get_by_name+0xf0/0x108)
[    3.097055] [<c054f160>] (__of_clk_get_by_name) from [<c054f1c0>]
(clk_get+0x2c/0x5c)
[    3.097070] [<c054f1c0>] (clk_get) from [<c054ed54>] (devm_clk_get+0x3c/0x78)
[    3.097086] [<c054ed54>] (devm_clk_get) from [<c04e4798>]
(s3c_rtc_probe+0x2bc/0x438)
[    3.097101] [<c04e4798>] (s3c_rtc_probe) from [<c03fc040>]
(platform_drv_probe+0x4c/0xb0)
[    3.097115] [<c03fc040>] (platform_drv_probe) from [<c03fa794>]
(driver_probe_device+0x214/0x2c0)
[    3.097136] [<c03fa794>] (driver_probe_device) from [<c03f8bb4>]
(bus_for_each_drv+0x60/0x94)
[    3.097149] [<c03f8bb4>] (bus_for_each_drv) from [<c03fa4a0>]
(__device_attach+0xb0/0x114)
[    3.097163] [<c03fa4a0>] (__device_attach) from [<c03f9adc>]
(bus_probe_device+0x84/0x8c)
[    3.097174] [<c03f9adc>] (bus_probe_device) from [<c03f9f6c>]
(deferred_probe_work_func+0x68/0x98)
[    3.097193] [<c03f9f6c>] (deferred_probe_work_func) from
[<c012ff2c>] (process_one_work+0x124/0x338)
[    3.097208] [<c012ff2c>] (process_one_work) from [<c0130178>]
(worker_thread+0x38/0x4d4)
[    3.097224] [<c0130178>] (worker_thread) from [<c0135454>]
(kthread+0xdc/0xf4)
[    3.097239] [<c0135454>] (kthread) from [<c0107978>]
(ret_from_fork+0x14/0x3c)
[    3.097251] ---[ end trace c79e2db53b5a7881 ]---
[    3.097286] Unable to handle kernel NULL pointer dereference at
virtual address 0000003f
[    3.097293] pgd = c0004000
[    3.097312] [0000003f] *pgd=00000000
[    3.097324] Internal error: Oops: 5 [#1] PREEMPT SMP ARM
[    3.097342] Modules linked in:
[    3.097354] CPU: 1 PID: 121 Comm: kworker/u16:2 Tainted: G        W
      4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[    3.097364] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[    3.097384] Workqueue: deferwq deferred_probe_work_func
[    3.097394] task: ed22b200 ti: c3b9c000 task.ti: c3b9c000
[    3.097408] PC is at clk_core_enable+0x10/0x98
[    3.097420] LR is at clk_core_enable+0x40/0x98
[    3.097430] pc : [<c054fc84>]    lr : [<c054fcb4>]    psr: a0000093
[    3.097430] sp : c3b9dde8  ip : 00000000  fp : c3abed80
[    3.097442] r10: edc1a800  r9 : 00000004  r8 : 00000000
[    3.097453] r7 : edd72734  r6 : ede32a10  r5 : a0000013  r4 : ffffffff
[    3.097462] r3 : 00000000  r2 : 00000001  r1 : 00000001  r0 : ffffffff
[    3.097474] Flags: NzCv  IRQs off  FIQs on  Mode SVC_32  ISA ARM
Segment none
[    3.097484] Control: 10c5387d  Table: 2000406a  DAC: 00000051
[    3.097495] Process kworker/u16:2 (pid: 121, stack limit = 0xc3b9c210)
[    3.097508] Stack: (0xc3b9dde8 to 0xc3b9e000)
[    3.097520] dde0:                   c3894340 a0000013 ede32a10
c054fcb4 edd75a40 a0000013
[    3.097532] de00: ede32a10 c0550720 edd72710 edd75a40 ede32a10
c04e48bc ede1f550 00000001
[    3.097546] de20: c089ff18 00000004 ede1f550 c3a88d70 00000000
ede1f550 00000001 c089ff18
[    3.097558] de40: edd74d70 ede32a10 ede32a10 ede32a10 ede32a10
ede32a10 ede32a10 c0b2a504
[    3.097570] de60: fffffdfb c03fc040 ede32a10 c0b8308c c0b83094
c0b2a504 00000000 c03fa794
[    3.097582] de80: 00000000 c3b9deb8 c03fa924 00000001 00000000
00000000 edc1a800 c03f8bb4
[    3.097594] dea0: edc05894 c3a69644 ede32a10 ede32a44 c0b211f0
c03fa4a0 ede32a10 00000001
[    3.097603] dec0: c0b473a8 ede32a10 ede32a10 c0b211f0 c3b5ad00
c03f9adc ede32a10 c0b20f9c
[    3.097615] dee0: c0b20fc8 c03f9f6c c3abed80 c0b20fe8 edc1a800
c012ff2c c3abed80 edc1a824
[    3.097628] df00: edc1a800 c3abed98 00000088 edc1a824 c0b02100
c3b9c000 edc1a800 c0130178
[    3.097638] df20: c3b9c000 c3ac26c0 c3abed80 00000000 c3ac26c0
c3abed80 c0130140 00000000
[    3.097649] df40: 00000000 00000000 00000000 c0135454 e7fddef0
00000000 e7fddef0 c3abed80
[    3.097663] df60: 00000000 00000000 dead4ead ffffffff ffffffff
c3b9df74 c3b9df74 00000000
[    3.097675] df80: 00000000 dead4ead ffffffff ffffffff c3b9df90
c3b9df90 c3b9dfac c3ac26c0
[    3.097688] dfa0: c0135378 00000000 00000000 c0107978 00000000
00000000 00000000 00000000
[    3.097700] dfc0: 00000000 00000000 00000000 00000000 00000000
00000000 00000000 00000000
[    3.097710] dfe0: 00000000 00000000 00000000 00000000 00000013
00000000 e7fddef0 e7fddef0
[    3.097725] [<c054fc84>] (clk_core_enable) from [<c054fcb4>]
(clk_core_enable+0x40/0x98)
[    3.097741] [<c054fcb4>] (clk_core_enable) from [<c0550720>]
(clk_enable+0x20/0x34)
[    3.097754] [<c0550720>] (clk_enable) from [<c04e48bc>]
(s3c_rtc_probe+0x3e0/0x438)
[    3.097767] [<c04e48bc>] (s3c_rtc_probe) from [<c03fc040>]
(platform_drv_probe+0x4c/0xb0)
[    3.097781] [<c03fc040>] (platform_drv_probe) from [<c03fa794>]
(driver_probe_device+0x214/0x2c0)
[    3.097792] [<c03fa794>] (driver_probe_device) from [<c03f8bb4>]
(bus_for_each_drv+0x60/0x94)
[    3.097802] [<c03f8bb4>] (bus_for_each_drv) from [<c03fa4a0>]
(__device_attach+0xb0/0x114)
[    3.097815] [<c03fa4a0>] (__device_attach) from [<c03f9adc>]
(bus_probe_device+0x84/0x8c)
[    3.097827] [<c03f9adc>] (bus_probe_device) from [<c03f9f6c>]
(deferred_probe_work_func+0x68/0x98)
[    3.097841] [<c03f9f6c>] (deferred_probe_work_func) from
[<c012ff2c>] (process_one_work+0x124/0x338)
[    3.097857] [<c012ff2c>] (process_one_work) from [<c0130178>]
(worker_thread+0x38/0x4d4)
[    3.097870] [<c0130178>] (worker_thread) from [<c0135454>]
(kthread+0xdc/0xf4)
[    3.097882] [<c0135454>] (kthread) from [<c0107978>]
(ret_from_fork+0x14/0x3c)
[    3.097897] Code: e3500000 012fff1e e92d4070 e1a04000 (e5903040)
[    3.097915] ---[ end trace c79e2db53b5a7882 ]---
[    3.097929] note: kworker/u16:2[121] exited with preempt_count 1
[    3.098019] Unable to handle kernel paging request at virtual
address ffffffe0
[    3.098029] pgd = c0004000
[    3.098064] [ffffffe0] *pgd=4fffd861, *pte=00000000, *ppte=00000000
[    3.098075] Internal error: Oops: 37 [#2] PREEMPT SMP ARM
[    3.098094] Modules linked in:
[    3.098107] CPU: 1 PID: 121 Comm: kworker/u16:2 Tainted: G      D W
      4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[    3.098117] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[    3.098133] task: ed22b200 ti: c3b9c000 task.ti: c3b9c000
[    3.098143] PC is at kthread_data+0x4/0xc
[    3.098155] LR is at wq_worker_sleeping+0x8/0xc8
[    3.098166] pc : [<c0135a58>]    lr : [<c0130dbc>]    psr: 00000193
[    3.098166] sp : c3b9dc20  ip : 00000400  fp : c3b9dc4c
[    3.098175] r10: ed22b200  r9 : 00000000  r8 : c0b0261c
[    3.098185] r7 : ed22b54c  r6 : ed22b200  r5 : ee34c000  r4 : c0a64000
[    3.098195] r3 : 00000000  r2 : 00000000  r1 : ed22b200  r0 : ed22b200
[    3.098205] Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM
Segment none
[    3.098214] Control: 10c5387d  Table: 2000406a  DAC: 00000051
[    3.098224] Process kworker/u16:2 (pid: 121, stack limit = 0xc3b9c210)
[    3.098234] Stack: (0xc3b9dc20 to 0xc3b9e000)
[    3.098246] dc20: c0a64000 c06cf400 ed22b200 ee34c640 c3b9c000
c3b9d98c 00000001 edc88000
[    3.098260] dc40: c3b9dc60 ed22b4b8 c3b9dc5c c06cf61c ed22b200
c3b9d98c c3abed80 c011cf54
[    3.098270] dc60: c3b9dc60 c3b9dc60 c3b9c000 c0b45404 0000000b
c0878584 00000005 60000193
[    3.098282] dc80: c0b0680c ed22b200 c3abed80 c010b168 c3b9c210
0000000b 0000003f c3b9dd98
[    3.098296] dca0: 00000005 00000000 0000003f 00000004 edc1a800
c0114f58 00000005 c0110a08
[    3.098308] dcc0: 00000000 00000000 60000013 00000000 ffffffff
c0b06a4c 00000005 c0110aa4
[    3.098318] dce0: 0000003f c3b9dd98 00000004 edc1a800 c3abed80
c0101334 c087ac10 c3b9dd24
[    3.098329] dd00: c3abed80 c01955b8 c3abed80 c3b9dd24 00000000
00000000 00000000 c011a7e4
[    3.098343] dd20: c087ac10 ffde7db5 3b5a7881 c79e2db5 0000002e
c05528dc 00000001 00000001
[    3.098354] dd40: c0b2ff84 c3b9dd50 c0b473a8 c06d1f70 00000001
c3b9dd50 00000000 edd75a40
[    3.098366] dd60: c38944c0 c3b9dd90 ede1e380 c0552a50 ede1e380
c08c57a8 ee3a74a8 00000001
[    3.098378] dd80: c054fc84 a0000093 ffffffff c3b9ddcc 00000000
c010b960 ffffffff 00000001
[    3.098391] dda0: 00000001 00000000 ffffffff a0000013 ede32a10
edd72734 00000000 00000004
[    3.098401] ddc0: edc1a800 c3abed80 00000000 c3b9dde8 c054fcb4
c054fc84 a0000093 ffffffff
[    3.098414] dde0: 00000051 a0000013 c3894340 a0000013 ede32a10
c054fcb4 edd75a40 a0000013
[    3.098426] de00: ede32a10 c0550720 edd72710 edd75a40 ede32a10
c04e48bc ede1f550 00000001
[    3.098436] de20: c089ff18 00000004 ede1f550 c3a88d70 00000000
ede1f550 00000001 c089ff18
[    3.098450] de40: edd74d70 ede32a10 ede32a10 ede32a10 ede32a10
ede32a10 ede32a10 c0b2a504
[    3.098465] de60: fffffdfb c03fc040 ede32a10 c0b8308c c0b83094
c0b2a504 00000000 c03fa794
[    3.098478] de80: 00000000 c3b9deb8 c03fa924 00000001 00000000
00000000 edc1a800 c03f8bb4
[    3.098488] dea0: edc05894 c3a69644 ede32a10 ede32a44 c0b211f0
c03fa4a0 ede32a10 00000001
[    3.098501] dec0: c0b473a8 ede32a10 ede32a10 c0b211f0 c3b5ad00
c03f9adc ede32a10 c0b20f9c
[    3.098513] dee0: c0b20fc8 c03f9f6c c3abed80 c0b20fe8 edc1a800
c012ff2c c3abed80 edc1a824
[    3.098526] df00: edc1a800 c3abed98 00000088 edc1a824 c0b02100
c3b9c000 edc1a800 c0130178
[    3.098538] df20: c3b9c000 c3ac26c0 c3abed80 00000000 c3ac26c0
c3abed80 c0130140 00000000
[    3.098549] df40: 00000000 00000000 00000000 c0135454 e7fddef0
00000000 e7fddef0 c3abed80
[    3.098562] df60: 00000000 00000000 dead4ead ffffffff ffffffff
c3b9df74 c3b9df74 00000001
[    3.098574] df80: 00010001 dead4ead ffffffff ffffffff c3b9df90
c3b9df90 c3b9dfac c3ac26c0
[    3.098580] dfa0: c0135378 00000000 00000000 c0107978 00000000
00000000 00000000 00000000
[    3.098588] dfc0: 00000000 00000000 00000000 00000000 00000000
00000000 00000000 00000000
[    3.098593] dfe0: 00000000 00000000 00000000 00000000 00000013
00000000 e7fddef0 e7fddef0
[    3.098602] [<c0135a58>] (kthread_data) from [<c0130dbc>]
(wq_worker_sleeping+0x8/0xc8)
[    3.098619] [<c0130dbc>] (wq_worker_sleeping) from [<c06cf400>]
(__schedule+0x2d4/0x4a4)
[    3.098629] [<c06cf400>] (__schedule) from [<c06cf61c>] (schedule+0x4c/0xac)
[    3.098641] [<c06cf61c>] (schedule) from [<c011cf54>] (do_exit+0x66c/0xa44)
[    3.098655] [<c011cf54>] (do_exit) from [<c010b168>] (die+0x22c/0x2ec)
[    3.098669] [<c010b168>] (die) from [<c0114f58>]
(__do_kernel_fault.part.0+0x64/0x1e4)
[    3.098687] [<c0114f58>] (__do_kernel_fault.part.0) from
[<c0110a08>] (do_bad_area+0x0/0x8c)
[    3.098702] [<c0110a08>] (do_bad_area) from [<c0110aa4>]
(do_translation_fault+0x0/0xac)
[    3.098712] [<c0110aa4>] (do_translation_fault) from [<edc1a800>]
(0xedc1a800)
[    3.098725] Code: e3a02002 e0431101 eaffff8e e5903310 (e5130020)
[    3.098744] ---[ end trace c79e2db53b5a7883 ]---
[    3.098754] Fixing recursive fault but reboot is needed!
[    3.104585] smsc95xx 5-1.1:1.0 eth0: register 'smsc95xx' at
usb-xhci-hcd.6.auto-1.1, smsc95xx USB 2.0 Ethernet, 94:eb:2c:00:03:c0
[   43.484379] BUG: spinlock lockup suspected on CPU#1, kworker/u16:2/121
[   43.489456]  lock: 0xee34c000, .magic: dead4ead, .owner:
kworker/u16:2/121, .owner_cpu: 1
[   43.497614] CPU: 1 PID: 121 Comm: kworker/u16:2 Tainted: G      D W
      4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   43.508631] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   43.514707] [<c010e1ac>] (unwind_backtrace) from [<c010af38>]
(show_stack+0x10/0x14)
[   43.522425] [<c010af38>] (show_stack) from [<c032479c>]
(dump_stack+0x88/0x9c)
[   43.529627] [<c032479c>] (dump_stack) from [<c01582a4>]
(do_raw_spin_lock+0xfc/0x1b0)
[   43.537435] [<c01582a4>] (do_raw_spin_lock) from [<c06cf1b0>]
(__schedule+0x84/0x4a4)
[   43.545243] [<c06cf1b0>] (__schedule) from [<c06cf61c>] (schedule+0x4c/0xac)
[   43.552263] [<c06cf61c>] (schedule) from [<c011d16c>] (do_exit+0x884/0xa44)
[   43.559205] [<c011d16c>] (do_exit) from [<c010b168>] (die+0x22c/0x2ec)
[   43.565709] [<c010b168>] (die) from [<c0114f58>]
(__do_kernel_fault.part.0+0x64/0x1e4)
[   43.573607] [<c0114f58>] (__do_kernel_fault.part.0) from
[<c0110a08>] (do_bad_area+0x0/0x8c)
[   43.582023] [<c0110a08>] (do_bad_area) from [<c0110764>]
(do_page_fault+0x0/0x2a4)
[   43.589569] [<c0110764>] (do_page_fault) from [<00000030>] (0x30)
[   43.595635] Sending NMI to all CPUs:
[   43.599187] NMI backtrace for cpu 1
[   43.602663] CPU: 1 PID: 121 Comm: kworker/u16:2 Tainted: G      D W
      4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   43.613686] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   43.619759] [<c010e1ac>] (unwind_backtrace) from [<c010af38>]
(show_stack+0x10/0x14)
[   43.627482] [<c010af38>] (show_stack) from [<c032479c>]
(dump_stack+0x88/0x9c)
[   43.634683] [<c032479c>] (dump_stack) from [<c03280f0>]
(nmi_cpu_backtrace+0x78/0x7c)
[   43.642487] [<c03280f0>] (nmi_cpu_backtrace) from [<c010cb4c>]
(raise_nmi+0x60/0x64)
[   43.650208] [<c010cb4c>] (raise_nmi) from [<c0328064>]
(nmi_trigger_all_cpu_backtrace+0x118/0x12c)
[   43.659144] [<c0328064>] (nmi_trigger_all_cpu_backtrace) from
[<c01582ac>] (do_raw_spin_lock+0x104/0x1b0)
[   43.668688] [<c01582ac>] (do_raw_spin_lock) from [<c06cf1b0>]
(__schedule+0x84/0x4a4)
[   43.676494] [<c06cf1b0>] (__schedule) from [<c06cf61c>] (schedule+0x4c/0xac)
[   43.683517] [<c06cf61c>] (schedule) from [<c011d16c>] (do_exit+0x884/0xa44)
[   43.690456] [<c011d16c>] (do_exit) from [<c010b168>] (die+0x22c/0x2ec)
[   43.696963] [<c010b168>] (die) from [<c0114f58>]
(__do_kernel_fault.part.0+0x64/0x1e4)
[   43.704861] [<c0114f58>] (__do_kernel_fault.part.0) from
[<c0110a08>] (do_bad_area+0x0/0x8c)
[   43.713277] [<c0110a08>] (do_bad_area) from [<c0110764>]
(do_page_fault+0x0/0x2a4)
[   43.720821] [<c0110764>] (do_page_fault) from [<00000030>] (0x30)
[   43.727331] NMI backtrace for cpu 3
[   43.730399] CPU: 3 PID: 0 Comm: swapper/3 Tainted: G      D W
4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   43.740901] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   43.746960] task: edc8c600 ti: edcc4000 task.ti: edcc4000
[   43.752343] PC is at arch_cpu_idle+0x38/0x3c
[   43.756592] LR is at arch_cpu_idle+0x34/0x3c
[   43.760844] pc : [<c01083bc>]    lr : [<c01083b8>]    psr: 60000113
[   43.767090] sp : edcc5fd8  ip : ee363f74  fp : c0b024b8
[   43.772296] r10: c0b024c0  r9 : c0a633f8  r8 : 00000000
[   43.777499] r7 : 00000000  r6 : 00000008  r5 : c0b02454  r4 : edcc4000
[   43.784007] r3 : c0113e40  r2 : 00000000  r1 : 00000000  r0 : 00000001
[   43.790515] Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
[   43.797628] Control: 10c5387d  Table: 2000406a  DAC: 00000051
[   43.803354] CPU: 3 PID: 0 Comm: swapper/3 Tainted: G      D W
4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   43.813858] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   43.819924] [<c010e1ac>] (unwind_backtrace) from [<c010af38>]
(show_stack+0x10/0x14)
[   43.827647] [<c010af38>] (show_stack) from [<c032479c>]
(dump_stack+0x88/0x9c)
[   43.834848] [<c032479c>] (dump_stack) from [<c03280d4>]
(nmi_cpu_backtrace+0x5c/0x7c)
[   43.842655] [<c03280d4>] (nmi_cpu_backtrace) from [<c010d398>]
(handle_IPI+0xd8/0x1ac)
[   43.850552] [<c010d398>] (handle_IPI) from [<c01014e4>]
(gic_handle_irq+0x94/0x98)
[   43.858096] [<c01014e4>] (gic_handle_irq) from [<c010b9d4>]
(__irq_svc+0x54/0x90)
[   43.865558] Exception stack(0xedcc5f88 to 0xedcc5fd0)
[   43.870583] 5f80:                   00000001 00000000 00000000
c0113e40 edcc4000 c0b02454
[   43.878744] 5fa0: 00000008 00000000 00000000 c0a633f8 c0b024c0
c0b024b8 ee363f74 edcc5fd8
[   43.886900] 5fc0: c01083b8 c01083bc 60000113 ffffffff
[   43.891923] [<c010b9d4>] (__irq_svc) from [<c01083bc>]
(arch_cpu_idle+0x38/0x3c)
[   43.899301] [<c01083bc>] (arch_cpu_idle) from [<c0151900>]
(cpu_startup_entry+0x1cc/0x250)
[   43.907546] [<c0151900>] (cpu_startup_entry) from [<2010158c>] (0x2010158c)
[   43.914488] NMI backtrace for cpu 4
[   43.917940] CPU: 4 PID: 0 Comm: swapper/4 Tainted: G      D W
4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   43.928436] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   43.934492] task: edc8cb00 ti: edcc6000 task.ti: edcc6000
[   43.939869] PC is at arch_cpu_idle+0x38/0x3c
[   43.944117] LR is at arch_cpu_idle+0x34/0x3c
[   43.948369] pc : [<c01083bc>]    lr : [<c01083b8>]    psr: 60000013
[   43.954617] sp : edcc7fd8  ip : 0000abe0  fp : c0b024b8
[   43.959821] r10: c0b024c0  r9 : c0a633f8  r8 : 00000000
[   43.965028] r7 : 00000000  r6 : 00000010  r5 : c0b02454  r4 : edcc6000
[   43.971537] r3 : c0113e40  r2 : 00000000  r1 : 00000000  r0 : 00000001
[   43.978041] Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
[   43.985154] Control: 10c5387d  Table: 2000406a  DAC: 00000051
[   43.990880] CPU: 4 PID: 0 Comm: swapper/4 Tainted: G      D W
4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   44.001390] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   44.007450] [<c010e1ac>] (unwind_backtrace) from [<c010af38>]
(show_stack+0x10/0x14)
[   44.015180] [<c010af38>] (show_stack) from [<c032479c>]
(dump_stack+0x88/0x9c)
[   44.022380] [<c032479c>] (dump_stack) from [<c03280d4>]
(nmi_cpu_backtrace+0x5c/0x7c)
[   44.030189] [<c03280d4>] (nmi_cpu_backtrace) from [<c010d398>]
(handle_IPI+0xd8/0x1ac)
[   44.038083] [<c010d398>] (handle_IPI) from [<c01014e4>]
(gic_handle_irq+0x94/0x98)
[   44.045630] [<c01014e4>] (gic_handle_irq) from [<c010b9d4>]
(__irq_svc+0x54/0x90)
[   44.053090] Exception stack(0xedcc7f88 to 0xedcc7fd0)
[   44.058109] 7f80:                   00000001 00000000 00000000
c0113e40 edcc6000 c0b02454
[   44.066277] 7fa0: 00000010 00000000 00000000 c0a633f8 c0b024c0
c0b024b8 0000abe0 edcc7fd8
[   44.074432] 7fc0: c01083b8 c01083bc 60000013 ffffffff
[   44.079450] [<c010b9d4>] (__irq_svc) from [<c01083bc>]
(arch_cpu_idle+0x38/0x3c)
[   44.086835] [<c01083bc>] (arch_cpu_idle) from [<c0151900>]
(cpu_startup_entry+0x1cc/0x250)
[   44.095079] [<c0151900>] (cpu_startup_entry) from [<2010158c>] (0x2010158c)
[   44.102013] NMI backtrace for cpu 6
[   44.105473] CPU: 6 PID: 0 Comm: swapper/6 Tainted: G      D W
4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   44.115985] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   44.122040] task: edc8d500 ti: edcca000 task.ti: edcca000
[   44.127418] PC is at arch_cpu_idle+0x38/0x3c
[   44.131665] LR is at arch_cpu_idle+0x34/0x3c
[   44.135918] pc : [<c01083bc>]    lr : [<c01083b8>]    psr: 60000013
[   44.142168] sp : edccbfd8  ip : 0000abe0  fp : c0b024b8
[   44.147369] r10: c0b024c0  r9 : c0a633f8  r8 : 00000000
[   44.152575] r7 : 00000000  r6 : 00000040  r5 : c0b02454  r4 : edcca000
[   44.159080] r3 : c0113e40  r2 : 00000000  r1 : 00000000  r0 : 00000001
[   44.165589] Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
[   44.172705] Control: 10c5387d  Table: 2000406a  DAC: 00000051
[   44.178429] CPU: 6 PID: 0 Comm: swapper/6 Tainted: G      D W
4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   44.188942] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   44.194997] [<c010e1ac>] (unwind_backtrace) from [<c010af38>]
(show_stack+0x10/0x14)
[   44.202729] [<c010af38>] (show_stack) from [<c032479c>]
(dump_stack+0x88/0x9c)
[   44.209929] [<c032479c>] (dump_stack) from [<c03280d4>]
(nmi_cpu_backtrace+0x5c/0x7c)
[   44.217742] [<c03280d4>] (nmi_cpu_backtrace) from [<c010d398>]
(handle_IPI+0xd8/0x1ac)
[   44.225633] [<c010d398>] (handle_IPI) from [<c01014e4>]
(gic_handle_irq+0x94/0x98)
[   44.233179] [<c01014e4>] (gic_handle_irq) from [<c010b9d4>]
(__irq_svc+0x54/0x90)
[   44.240639] Exception stack(0xedccbf88 to 0xedccbfd0)
[   44.245656] bf80:                   00000001 00000000 00000000
c0113e40 edcca000 c0b02454
[   44.253827] bfa0: 00000040 00000000 00000000 c0a633f8 c0b024c0
c0b024b8 0000abe0 edccbfd8
[   44.261982] bfc0: c01083b8 c01083bc 60000013 ffffffff
[   44.266998] [<c010b9d4>] (__irq_svc) from [<c01083bc>]
(arch_cpu_idle+0x38/0x3c)
[   44.274387] [<c01083bc>] (arch_cpu_idle) from [<c0151900>]
(cpu_startup_entry+0x1cc/0x250)
[   44.282629] [<c0151900>] (cpu_startup_entry) from [<2010158c>] (0x2010158c)
[   81.055964] BUG: spinlock lockup suspected on CPU#0, kworker/0:0/4
[   81.060688]  lock: enable_lock+0x0/0x10, .magic: dead4ead, .owner:
kworker/u16:2/121, .owner_cpu: 1
[   81.069700] CPU: 0 PID: 4 Comm: kworker/0:0 Tainted: G      D W
  4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   81.070847] BUG: spinlock lockup suspected on CPU#2, kworker/2:1/108
[   81.070861]  lock: enable_lock+0x0/0x10, .magic: dead4ead, .owner:
kworker/u16:2/121, .owner_cpu: 1
[   81.095720] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   81.101790] Workqueue: events dbs_work_handler
[   81.106215] [<c010e1ac>] (unwind_backtrace) from [<c010af38>]
(show_stack+0x10/0x14)
[   81.113942] [<c010af38>] (show_stack) from [<c032479c>]
(dump_stack+0x88/0x9c)
[   81.121141] [<c032479c>] (dump_stack) from [<c01582a4>]
(do_raw_spin_lock+0xfc/0x1b0)
[   81.128951] [<c01582a4>] (do_raw_spin_lock) from [<c06d3fdc>]
(_raw_spin_lock_irqsave+0x20/0x28)
[   81.137713] [<c06d3fdc>] (_raw_spin_lock_irqsave) from [<c054fdd4>]
(clk_enable_lock+0x58/0x110)
[   81.146474] [<c054fdd4>] (clk_enable_lock) from [<c0550714>]
(clk_enable+0x14/0x34)
[   81.154113] [<c0550714>] (clk_enable) from [<c04eb04c>]
(exynos5_i2c_xfer+0x28/0x2f4)
[   81.161915] [<c04eb04c>] (exynos5_i2c_xfer) from [<c04e6bc8>]
(__i2c_transfer+0x13c/0x278)
[   81.170156] [<c04e6bc8>] (__i2c_transfer) from [<c04e6d70>]
(i2c_transfer+0x6c/0xa8)
[   81.177876] [<c04e6d70>] (i2c_transfer) from [<c04e6de8>]
(i2c_master_send+0x3c/0x4c)
[   81.185685] [<c04e6de8>] (i2c_master_send) from [<c0415d30>]
(regmap_i2c_write+0x10/0x2c)
[   81.193847] [<c0415d30>] (regmap_i2c_write) from [<c0411dd0>]
(_regmap_raw_write+0x514/0x5f0)
[   81.202342] [<c0411dd0>] (_regmap_raw_write) from [<c0411154>]
(_regmap_update_bits+0xc0/0xc4)
[   81.210929] [<c0411154>] (_regmap_update_bits) from [<c04120c0>]
(regmap_update_bits_base+0x50/0x74)
[   81.220047] [<c04120c0>] (regmap_update_bits_base) from
[<c037d910>] (regulator_set_voltage_sel_regmap+0x4c/0x9c)
[   81.230277] [<c037d910>] (regulator_set_voltage_sel_regmap) from
[<c03799e4>] (_regulator_do_set_voltage+0x288/0x358)
[   81.240859] [<c03799e4>] (_regulator_do_set_voltage) from
[<c037a624>] (regulator_set_voltage_unlocked+0x1d8/0x22c)
[   81.251268] [<c037a624>] (regulator_set_voltage_unlocked) from
[<c037a6a0>] (regulator_set_voltage+0x28/0x54)
[   81.261166] [<c037a6a0>] (regulator_set_voltage) from [<c0408868>]
(_set_opp_voltage+0x30/0x98)
[   81.269834] [<c0408868>] (_set_opp_voltage) from [<c0408fa8>]
(dev_pm_opp_set_rate+0x10c/0x2b4)
[   81.278513] [<c0408fa8>] (dev_pm_opp_set_rate) from [<c050dbdc>]
(__cpufreq_driver_target+0x170/0x2d4)
[   81.287792] [<c050dbdc>] (__cpufreq_driver_target) from
[<c0510ec8>] (od_dbs_timer+0x9c/0x168)
[   81.296377] [<c0510ec8>] (od_dbs_timer) from [<c0511474>]
(dbs_work_handler+0x2c/0x60)
[   81.304271] [<c0511474>] (dbs_work_handler) from [<c012ff2c>]
(process_one_work+0x124/0x338)
[   81.312686] [<c012ff2c>] (process_one_work) from [<c0130178>]
(worker_thread+0x38/0x4d4)
[   81.320755] [<c0130178>] (worker_thread) from [<c0135454>]
(kthread+0xdc/0xf4)
[   81.327954] [<c0135454>] (kthread) from [<c0107978>]
(ret_from_fork+0x14/0x3c)
[   81.335151] Sending NMI to all CPUs:
[   81.335155] CPU: 2 PID: 108 Comm: kworker/2:1 Tainted: G      D W
    4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   81.335160] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   81.335178] Workqueue: pm pm_runtime_work
[   81.335192] [<c010e1ac>] (unwind_backtrace) from [<c010af38>]
(show_stack+0x10/0x14)
[   81.335203] [<c010af38>] (show_stack) from [<c032479c>]
(dump_stack+0x88/0x9c)
[   81.335213] [<c032479c>] (dump_stack) from [<c01582a4>]
(do_raw_spin_lock+0xfc/0x1b0)
[   81.335224] [<c01582a4>] (do_raw_spin_lock) from [<c06d3fdc>]
(_raw_spin_lock_irqsave+0x20/0x28)
[   81.335235] [<c06d3fdc>] (_raw_spin_lock_irqsave) from [<c054fdd4>]
(clk_enable_lock+0x58/0x110)
[   81.335246] [<c054fdd4>] (clk_enable_lock) from [<c05507e4>]
(clk_disable+0x1c/0x34)
[   81.335257] [<c05507e4>] (clk_disable) from [<c0372774>]
(amba_pm_runtime_suspend+0x50/0x58)
[   81.335268] [<c0372774>] (amba_pm_runtime_suspend) from
[<c0402d18>] (__rpm_callback+0x2c/0x60)
[   81.335278] [<c0402d18>] (__rpm_callback) from [<c0402d6c>]
(rpm_callback+0x20/0x80)
[   81.335289] [<c0402d6c>] (rpm_callback) from [<c0403234>]
(rpm_suspend+0xdc/0x4c0)
[   81.335299] [<c0403234>] (rpm_suspend) from [<c040453c>]
(pm_runtime_work+0x74/0xa8)
[   81.335311] [<c040453c>] (pm_runtime_work) from [<c012ff2c>]
(process_one_work+0x124/0x338)
[   81.335323] [<c012ff2c>] (process_one_work) from [<c0130178>]
(worker_thread+0x38/0x4d4)
[   81.335334] [<c0130178>] (worker_thread) from [<c0135454>]
(kthread+0xdc/0xf4)
[   81.335345] [<c0135454>] (kthread) from [<c0107978>]
(ret_from_fork+0x14/0x3c)
[   81.478460] NMI backtrace for cpu 0
[   81.481925] CPU: 0 PID: 4 Comm: kworker/0:0 Tainted: G      D W
  4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   81.492602] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   81.498669] Workqueue: events dbs_work_handler
[   81.503094] [<c010e1ac>] (unwind_backtrace) from [<c010af38>]
(show_stack+0x10/0x14)
[   81.510822] [<c010af38>] (show_stack) from [<c032479c>]
(dump_stack+0x88/0x9c)
[   81.518022] [<c032479c>] (dump_stack) from [<c03280f0>]
(nmi_cpu_backtrace+0x78/0x7c)
[   81.525829] [<c03280f0>] (nmi_cpu_backtrace) from [<c010cb4c>]
(raise_nmi+0x60/0x64)
[   81.533551] [<c010cb4c>] (raise_nmi) from [<c0328064>]
(nmi_trigger_all_cpu_backtrace+0x118/0x12c)
[   81.542487] [<c0328064>] (nmi_trigger_all_cpu_backtrace) from
[<c01582ac>] (do_raw_spin_lock+0x104/0x1b0)
[   81.552029] [<c01582ac>] (do_raw_spin_lock) from [<c06d3fdc>]
(_raw_spin_lock_irqsave+0x20/0x28)
[   81.560791] [<c06d3fdc>] (_raw_spin_lock_irqsave) from [<c054fdd4>]
(clk_enable_lock+0x58/0x110)
[   81.569553] [<c054fdd4>] (clk_enable_lock) from [<c0550714>]
(clk_enable+0x14/0x34)
[   81.577187] [<c0550714>] (clk_enable) from [<c04eb04c>]
(exynos5_i2c_xfer+0x28/0x2f4)
[   81.584994] [<c04eb04c>] (exynos5_i2c_xfer) from [<c04e6bc8>]
(__i2c_transfer+0x13c/0x278)
[   81.593234] [<c04e6bc8>] (__i2c_transfer) from [<c04e6d70>]
(i2c_transfer+0x6c/0xa8)
[   81.600955] [<c04e6d70>] (i2c_transfer) from [<c04e6de8>]
(i2c_master_send+0x3c/0x4c)
[   81.608762] [<c04e6de8>] (i2c_master_send) from [<c0415d30>]
(regmap_i2c_write+0x10/0x2c)
[   81.616918] [<c0415d30>] (regmap_i2c_write) from [<c0411dd0>]
(_regmap_raw_write+0x514/0x5f0)
[   81.625420] [<c0411dd0>] (_regmap_raw_write) from [<c0411154>]
(_regmap_update_bits+0xc0/0xc4)
[   81.634008] [<c0411154>] (_regmap_update_bits) from [<c04120c0>]
(regmap_update_bits_base+0x50/0x74)
[   81.643118] [<c04120c0>] (regmap_update_bits_base) from
[<c037d910>] (regulator_set_voltage_sel_regmap+0x4c/0x9c)
[   81.653355] [<c037d910>] (regulator_set_voltage_sel_regmap) from
[<c03799e4>] (_regulator_do_set_voltage+0x288/0x358)
[   81.663937] [<c03799e4>] (_regulator_do_set_voltage) from
[<c037a624>] (regulator_set_voltage_unlocked+0x1d8/0x22c)
[   81.674348] [<c037a624>] (regulator_set_voltage_unlocked) from
[<c037a6a0>] (regulator_set_voltage+0x28/0x54)
[   81.684238] [<c037a6a0>] (regulator_set_voltage) from [<c0408868>]
(_set_opp_voltage+0x30/0x98)
[   81.692912] [<c0408868>] (_set_opp_voltage) from [<c0408fa8>]
(dev_pm_opp_set_rate+0x10c/0x2b4)
[   81.701587] [<c0408fa8>] (dev_pm_opp_set_rate) from [<c050dbdc>]
(__cpufreq_driver_target+0x170/0x2d4)
[   81.710870] [<c050dbdc>] (__cpufreq_driver_target) from
[<c0510ec8>] (od_dbs_timer+0x9c/0x168)
[   81.719456] [<c0510ec8>] (od_dbs_timer) from [<c0511474>]
(dbs_work_handler+0x2c/0x60)
[   81.727350] [<c0511474>] (dbs_work_handler) from [<c012ff2c>]
(process_one_work+0x124/0x338)
[   81.735766] [<c012ff2c>] (process_one_work) from [<c0130178>]
(worker_thread+0x38/0x4d4)
[   81.743834] [<c0130178>] (worker_thread) from [<c0135454>]
(kthread+0xdc/0xf4)
[   81.751033] [<c0135454>] (kthread) from [<c0107978>]
(ret_from_fork+0x14/0x3c)
[   81.758426] NMI backtrace for cpu 3
[   81.761710] CPU: 3 PID: 0 Comm: swapper/3 Tainted: G      D W
4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   81.772212] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   81.778277] task: edc8c600 ti: edcc4000 task.ti: edcc4000
[   81.783655] PC is at arch_cpu_idle+0x38/0x3c
[   81.787905] LR is at arch_cpu_idle+0x34/0x3c
[   81.792155] pc : [<c01083bc>]    lr : [<c01083b8>]    psr: 60000113
[   81.798403] sp : edcc5fd8  ip : ee363f74  fp : c0b024b8
[   81.803608] r10: c0b024c0  r9 : c0a633f8  r8 : 00000000
[   81.808813] r7 : 00000000  r6 : 00000008  r5 : c0b02454  r4 : edcc4000
[   81.815320] r3 : c0113e40  r2 : 00000000  r1 : 00000000  r0 : 00000001
[   81.821826] Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
[   81.828940] Control: 10c5387d  Table: 2000406a  DAC: 00000051
[   81.834666] CPU: 3 PID: 0 Comm: swapper/3 Tainted: G      D W
4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   81.845168] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   81.851233] [<c010e1ac>] (unwind_backtrace) from [<c010af38>]
(show_stack+0x10/0x14)
[   81.858960] [<c010af38>] (show_stack) from [<c032479c>]
(dump_stack+0x88/0x9c)
[   81.866160] [<c032479c>] (dump_stack) from [<c03280d4>]
(nmi_cpu_backtrace+0x5c/0x7c)
[   81.873967] [<c03280d4>] (nmi_cpu_backtrace) from [<c010d398>]
(handle_IPI+0xd8/0x1ac)
[   81.881861] [<c010d398>] (handle_IPI) from [<c01014e4>]
(gic_handle_irq+0x94/0x98)
[   81.889409] [<c01014e4>] (gic_handle_irq) from [<c010b9d4>]
(__irq_svc+0x54/0x90)
[   81.896869] Exception stack(0xedcc5f88 to 0xedcc5fd0)
[   81.901895] 5f80:                   00000001 00000000 00000000
c0113e40 edcc4000 c0b02454
[   81.910056] 5fa0: 00000008 00000000 00000000 c0a633f8 c0b024c0
c0b024b8 ee363f74 edcc5fd8
[   81.918210] 5fc0: c01083b8 c01083bc 60000113 ffffffff
[   81.923236] [<c010b9d4>] (__irq_svc) from [<c01083bc>]
(arch_cpu_idle+0x38/0x3c)
[   81.930615] [<c01083bc>] (arch_cpu_idle) from [<c0151900>]
(cpu_startup_entry+0x1cc/0x250)
[   81.938857] [<c0151900>] (cpu_startup_entry) from [<2010158c>] (0x2010158c)

Javier Martinez Canillas

2016-06-07 18:55 UTC #42 lore raw

Re: [PATCH 17/34] clk: maxgen: Migrate to clk_hw based OF and registration APIs

Quoted 16 lines · Javier Martinez Canillas

Quoted 8 lines

It seems the mailer did a mess with the line wrapping so here's another attempt:

[    3.096860] WARNING: CPU: 1 PID: 121 at include/linux/kref.h:46 __clk_get+0x90/0x98
[    3.096882] Modules linked in:
[    3.096896] CPU: 1 PID: 121 Comm: kworker/u16:2 Not tainted 4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[    3.096905] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[    3.096926] Workqueue: deferwq deferred_probe_work_func
[    3.096956] [<c010e1ac>] (unwind_backtrace) from [<c010af38>] (show_stack+0x10/0x14)
[    3.096971] [<c010af38>] (show_stack) from [<c032479c>] (dump_stack+0x88/0x9c)
[    3.096986] [<c032479c>] (dump_stack) from [<c011a82c>] (__warn+0xe8/0x100)
[    3.096997] [<c011a82c>] (__warn) from [<c011a8f4>] (warn_slowpath_null+0x20/0x28)
[    3.097009] [<c011a8f4>] (warn_slowpath_null) from [<c05528dc>] (__clk_get+0x90/0x98)
[    3.097024] [<c05528dc>] (__clk_get) from [<c0552a40>] (__of_clk_get_from_provider+0x70/0x10c)
[    3.097041] [<c0552a40>] (__of_clk_get_from_provider) from [<c054f160>] (__of_clk_get_by_name+0xf0/0x108)
[    3.097055] [<c054f160>] (__of_clk_get_by_name) from [<c054f1c0>] (clk_get+0x2c/0x5c)
[    3.097070] [<c054f1c0>] (clk_get) from [<c054ed54>] (devm_clk_get+0x3c/0x78)
[    3.097086] [<c054ed54>] (devm_clk_get) from [<c04e4798>] (s3c_rtc_probe+0x2bc/0x438)
[    3.097101] [<c04e4798>] (s3c_rtc_probe) from [<c03fc040>] (platform_drv_probe+0x4c/0xb0)
[    3.097115] [<c03fc040>] (platform_drv_probe) from [<c03fa794>] (driver_probe_device+0x214/0x2c0)
[    3.097136] [<c03fa794>] (driver_probe_device) from [<c03f8bb4>] (bus_for_each_drv+0x60/0x94)
[    3.097149] [<c03f8bb4>] (bus_for_each_drv) from [<c03fa4a0>] (__device_attach+0xb0/0x114)
[    3.097163] [<c03fa4a0>] (__device_attach) from [<c03f9adc>] (bus_probe_device+0x84/0x8c)
[    3.097174] [<c03f9adc>] (bus_probe_device) from [<c03f9f6c>] (deferred_probe_work_func+0x68/0x98)
[    3.097193] [<c03f9f6c>] (deferred_probe_work_func) from [<c012ff2c>] (process_one_work+0x124/0x338)
[    3.097208] [<c012ff2c>] (process_one_work) from [<c0130178>] (worker_thread+0x38/0x4d4)
[    3.097224] [<c0130178>] (worker_thread) from [<c0135454>] (kthread+0xdc/0xf4)
[    3.097239] [<c0135454>] (kthread) from [<c0107978>] (ret_from_fork+0x14/0x3c)
[    3.097251] ---[ end trace c79e2db53b5a7881 ]---
[    3.097286] Unable to handle kernel NULL pointer dereference at virtual address 0000003f
[    3.097293] pgd = c0004000
[    3.097312] [0000003f] *pgd=00000000
[    3.097324] Internal error: Oops: 5 [#1] PREEMPT SMP ARM
[    3.097342] Modules linked in:
[    3.097354] CPU: 1 PID: 121 Comm: kworker/u16:2 Tainted: G        W       4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[    3.097364] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[    3.097384] Workqueue: deferwq deferred_probe_work_func
[    3.097394] task: ed22b200 ti: c3b9c000 task.ti: c3b9c000
[    3.097408] PC is at clk_core_enable+0x10/0x98
[    3.097420] LR is at clk_core_enable+0x40/0x98
[    3.097430] pc : [<c054fc84>]    lr : [<c054fcb4>]    psr: a0000093
[    3.097430] sp : c3b9dde8  ip : 00000000  fp : c3abed80
[    3.097442] r10: edc1a800  r9 : 00000004  r8 : 00000000
[    3.097453] r7 : edd72734  r6 : ede32a10  r5 : a0000013  r4 : ffffffff
[    3.097462] r3 : 00000000  r2 : 00000001  r1 : 00000001  r0 : ffffffff
[    3.097474] Flags: NzCv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment none
[    3.097484] Control: 10c5387d  Table: 2000406a  DAC: 00000051
[    3.097495] Process kworker/u16:2 (pid: 121, stack limit = 0xc3b9c210)
[    3.097508] Stack: (0xc3b9dde8 to 0xc3b9e000)
[    3.097520] dde0:                   c3894340 a0000013 ede32a10 c054fcb4 edd75a40 a0000013
[    3.097532] de00: ede32a10 c0550720 edd72710 edd75a40 ede32a10 c04e48bc ede1f550 00000001
[    3.097546] de20: c089ff18 00000004 ede1f550 c3a88d70 00000000 ede1f550 00000001 c089ff18
[    3.097558] de40: edd74d70 ede32a10 ede32a10 ede32a10 ede32a10 ede32a10 ede32a10 c0b2a504
[    3.097570] de60: fffffdfb c03fc040 ede32a10 c0b8308c c0b83094 c0b2a504 00000000 c03fa794
[    3.097582] de80: 00000000 c3b9deb8 c03fa924 00000001 00000000 00000000 edc1a800 c03f8bb4
[    3.097594] dea0: edc05894 c3a69644 ede32a10 ede32a44 c0b211f0 c03fa4a0 ede32a10 00000001
[    3.097603] dec0: c0b473a8 ede32a10 ede32a10 c0b211f0 c3b5ad00 c03f9adc ede32a10 c0b20f9c
[    3.097615] dee0: c0b20fc8 c03f9f6c c3abed80 c0b20fe8 edc1a800 c012ff2c c3abed80 edc1a824
[    3.097628] df00: edc1a800 c3abed98 00000088 edc1a824 c0b02100 c3b9c000 edc1a800 c0130178
[    3.097638] df20: c3b9c000 c3ac26c0 c3abed80 00000000 c3ac26c0 c3abed80 c0130140 00000000
[    3.097649] df40: 00000000 00000000 00000000 c0135454 e7fddef0 00000000 e7fddef0 c3abed80
[    3.097663] df60: 00000000 00000000 dead4ead ffffffff ffffffff c3b9df74 c3b9df74 00000000
[    3.097675] df80: 00000000 dead4ead ffffffff ffffffff c3b9df90 c3b9df90 c3b9dfac c3ac26c0
[    3.097688] dfa0: c0135378 00000000 00000000 c0107978 00000000 00000000 00000000 00000000
[    3.097700] dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[    3.097710] dfe0: 00000000 00000000 00000000 00000000 00000013 00000000 e7fddef0 e7fddef0
[    3.097725] [<c054fc84>] (clk_core_enable) from [<c054fcb4>] (clk_core_enable+0x40/0x98)
[    3.097741] [<c054fcb4>] (clk_core_enable) from [<c0550720>] (clk_enable+0x20/0x34)
[    3.097754] [<c0550720>] (clk_enable) from [<c04e48bc>] (s3c_rtc_probe+0x3e0/0x438)
[    3.097767] [<c04e48bc>] (s3c_rtc_probe) from [<c03fc040>] (platform_drv_probe+0x4c/0xb0)
[    3.097781] [<c03fc040>] (platform_drv_probe) from [<c03fa794>] (driver_probe_device+0x214/0x2c0)
[    3.097792] [<c03fa794>] (driver_probe_device) from [<c03f8bb4>] (bus_for_each_drv+0x60/0x94)
[    3.097802] [<c03f8bb4>] (bus_for_each_drv) from [<c03fa4a0>] (__device_attach+0xb0/0x114)
[    3.097815] [<c03fa4a0>] (__device_attach) from [<c03f9adc>] (bus_probe_device+0x84/0x8c)
[    3.097827] [<c03f9adc>] (bus_probe_device) from [<c03f9f6c>] (deferred_probe_work_func+0x68/0x98)
[    3.097841] [<c03f9f6c>] (deferred_probe_work_func) from [<c012ff2c>] (process_one_work+0x124/0x338)
[    3.097857] [<c012ff2c>] (process_one_work) from [<c0130178>] (worker_thread+0x38/0x4d4)
[    3.097870] [<c0130178>] (worker_thread) from [<c0135454>] (kthread+0xdc/0xf4)
[    3.097882] [<c0135454>] (kthread) from [<c0107978>] (ret_from_fork+0x14/0x3c)
[    3.097897] Code: e3500000 012fff1e e92d4070 e1a04000 (e5903040) 
[    3.097915] ---[ end trace c79e2db53b5a7882 ]---
[    3.097929] note: kworker/u16:2[121] exited with preempt_count 1
[    3.098019] Unable to handle kernel paging request at virtual address ffffffe0
[    3.098029] pgd = c0004000
[    3.098064] [ffffffe0] *pgd=4fffd861, *pte=00000000, *ppte=00000000
[    3.098075] Internal error: Oops: 37 [#2] PREEMPT SMP ARM
[    3.098094] Modules linked in:
[    3.098107] CPU: 1 PID: 121 Comm: kworker/u16:2 Tainted: G      D W       4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[    3.098117] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[    3.098133] task: ed22b200 ti: c3b9c000 task.ti: c3b9c000
[    3.098143] PC is at kthread_data+0x4/0xc
[    3.098155] LR is at wq_worker_sleeping+0x8/0xc8
[    3.098166] pc : [<c0135a58>]    lr : [<c0130dbc>]    psr: 00000193
[    3.098166] sp : c3b9dc20  ip : 00000400  fp : c3b9dc4c
[    3.098175] r10: ed22b200  r9 : 00000000  r8 : c0b0261c
[    3.098185] r7 : ed22b54c  r6 : ed22b200  r5 : ee34c000  r4 : c0a64000
[    3.098195] r3 : 00000000  r2 : 00000000  r1 : ed22b200  r0 : ed22b200
[    3.098205] Flags: nzcv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment none
[    3.098214] Control: 10c5387d  Table: 2000406a  DAC: 00000051
[    3.098224] Process kworker/u16:2 (pid: 121, stack limit = 0xc3b9c210)
[    3.098234] Stack: (0xc3b9dc20 to 0xc3b9e000)
[    3.098246] dc20: c0a64000 c06cf400 ed22b200 ee34c640 c3b9c000 c3b9d98c 00000001 edc88000
[    3.098260] dc40: c3b9dc60 ed22b4b8 c3b9dc5c c06cf61c ed22b200 c3b9d98c c3abed80 c011cf54
[    3.098270] dc60: c3b9dc60 c3b9dc60 c3b9c000 c0b45404 0000000b c0878584 00000005 60000193
[    3.098282] dc80: c0b0680c ed22b200 c3abed80 c010b168 c3b9c210 0000000b 0000003f c3b9dd98
[    3.098296] dca0: 00000005 00000000 0000003f 00000004 edc1a800 c0114f58 00000005 c0110a08
[    3.098308] dcc0: 00000000 00000000 60000013 00000000 ffffffff c0b06a4c 00000005 c0110aa4
[    3.098318] dce0: 0000003f c3b9dd98 00000004 edc1a800 c3abed80 c0101334 c087ac10 c3b9dd24
[    3.098329] dd00: c3abed80 c01955b8 c3abed80 c3b9dd24 00000000 00000000 00000000 c011a7e4
[    3.098343] dd20: c087ac10 ffde7db5 3b5a7881 c79e2db5 0000002e c05528dc 00000001 00000001
[    3.098354] dd40: c0b2ff84 c3b9dd50 c0b473a8 c06d1f70 00000001 c3b9dd50 00000000 edd75a40
[    3.098366] dd60: c38944c0 c3b9dd90 ede1e380 c0552a50 ede1e380 c08c57a8 ee3a74a8 00000001
[    3.098378] dd80: c054fc84 a0000093 ffffffff c3b9ddcc 00000000 c010b960 ffffffff 00000001
[    3.098391] dda0: 00000001 00000000 ffffffff a0000013 ede32a10 edd72734 00000000 00000004
[    3.098401] ddc0: edc1a800 c3abed80 00000000 c3b9dde8 c054fcb4 c054fc84 a0000093 ffffffff
[    3.098414] dde0: 00000051 a0000013 c3894340 a0000013 ede32a10 c054fcb4 edd75a40 a0000013
[    3.098426] de00: ede32a10 c0550720 edd72710 edd75a40 ede32a10 c04e48bc ede1f550 00000001
[    3.098436] de20: c089ff18 00000004 ede1f550 c3a88d70 00000000 ede1f550 00000001 c089ff18
[    3.098450] de40: edd74d70 ede32a10 ede32a10 ede32a10 ede32a10 ede32a10 ede32a10 c0b2a504
[    3.098465] de60: fffffdfb c03fc040 ede32a10 c0b8308c c0b83094 c0b2a504 00000000 c03fa794
[    3.098478] de80: 00000000 c3b9deb8 c03fa924 00000001 00000000 00000000 edc1a800 c03f8bb4
[    3.098488] dea0: edc05894 c3a69644 ede32a10 ede32a44 c0b211f0 c03fa4a0 ede32a10 00000001
[    3.098501] dec0: c0b473a8 ede32a10 ede32a10 c0b211f0 c3b5ad00 c03f9adc ede32a10 c0b20f9c
[    3.098513] dee0: c0b20fc8 c03f9f6c c3abed80 c0b20fe8 edc1a800 c012ff2c c3abed80 edc1a824
[    3.098526] df00: edc1a800 c3abed98 00000088 edc1a824 c0b02100 c3b9c000 edc1a800 c0130178
[    3.098538] df20: c3b9c000 c3ac26c0 c3abed80 00000000 c3ac26c0 c3abed80 c0130140 00000000
[    3.098549] df40: 00000000 00000000 00000000 c0135454 e7fddef0 00000000 e7fddef0 c3abed80
[    3.098562] df60: 00000000 00000000 dead4ead ffffffff ffffffff c3b9df74 c3b9df74 00000001
[    3.098574] df80: 00010001 dead4ead ffffffff ffffffff c3b9df90 c3b9df90 c3b9dfac c3ac26c0
[    3.098580] dfa0: c0135378 00000000 00000000 c0107978 00000000 00000000 00000000 00000000
[    3.098588] dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[    3.098593] dfe0: 00000000 00000000 00000000 00000000 00000013 00000000 e7fddef0 e7fddef0
[    3.098602] [<c0135a58>] (kthread_data) from [<c0130dbc>] (wq_worker_sleeping+0x8/0xc8)
[    3.098619] [<c0130dbc>] (wq_worker_sleeping) from [<c06cf400>] (__schedule+0x2d4/0x4a4)
[    3.098629] [<c06cf400>] (__schedule) from [<c06cf61c>] (schedule+0x4c/0xac)
[    3.098641] [<c06cf61c>] (schedule) from [<c011cf54>] (do_exit+0x66c/0xa44)
[    3.098655] [<c011cf54>] (do_exit) from [<c010b168>] (die+0x22c/0x2ec)
[    3.098669] [<c010b168>] (die) from [<c0114f58>] (__do_kernel_fault.part.0+0x64/0x1e4)
[    3.098687] [<c0114f58>] (__do_kernel_fault.part.0) from [<c0110a08>] (do_bad_area+0x0/0x8c)
[    3.098702] [<c0110a08>] (do_bad_area) from [<c0110aa4>] (do_translation_fault+0x0/0xac)
[    3.098712] [<c0110aa4>] (do_translation_fault) from [<edc1a800>] (0xedc1a800)
[    3.098725] Code: e3a02002 e0431101 eaffff8e e5903310 (e5130020) 
[    3.098744] ---[ end trace c79e2db53b5a7883 ]---
[    3.098754] Fixing recursive fault but reboot is needed!
[    3.104585] smsc95xx 5-1.1:1.0 eth0: register 'smsc95xx' at usb-xhci-hcd.6.auto-1.1, smsc95xx USB 2.0 Ethernet, 94:eb:2c:00:03:c0
[   43.484379] BUG: spinlock lockup suspected on CPU#1, kworker/u16:2/121
[   43.489456]  lock: 0xee34c000, .magic: dead4ead, .owner: kworker/u16:2/121, .owner_cpu: 1
[   43.497614] CPU: 1 PID: 121 Comm: kworker/u16:2 Tainted: G      D W       4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   43.508631] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   43.514707] [<c010e1ac>] (unwind_backtrace) from [<c010af38>] (show_stack+0x10/0x14)
[   43.522425] [<c010af38>] (show_stack) from [<c032479c>] (dump_stack+0x88/0x9c)
[   43.529627] [<c032479c>] (dump_stack) from [<c01582a4>] (do_raw_spin_lock+0xfc/0x1b0)
[   43.537435] [<c01582a4>] (do_raw_spin_lock) from [<c06cf1b0>] (__schedule+0x84/0x4a4)
[   43.545243] [<c06cf1b0>] (__schedule) from [<c06cf61c>] (schedule+0x4c/0xac)
[   43.552263] [<c06cf61c>] (schedule) from [<c011d16c>] (do_exit+0x884/0xa44)
[   43.559205] [<c011d16c>] (do_exit) from [<c010b168>] (die+0x22c/0x2ec)
[   43.565709] [<c010b168>] (die) from [<c0114f58>] (__do_kernel_fault.part.0+0x64/0x1e4)
[   43.573607] [<c0114f58>] (__do_kernel_fault.part.0) from [<c0110a08>] (do_bad_area+0x0/0x8c)
[   43.582023] [<c0110a08>] (do_bad_area) from [<c0110764>] (do_page_fault+0x0/0x2a4)
[   43.589569] [<c0110764>] (do_page_fault) from [<00000030>] (0x30)
[   43.595635] Sending NMI to all CPUs:
[   43.599187] NMI backtrace for cpu 1
[   43.602663] CPU: 1 PID: 121 Comm: kworker/u16:2 Tainted: G      D W       4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   43.613686] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   43.619759] [<c010e1ac>] (unwind_backtrace) from [<c010af38>] (show_stack+0x10/0x14)
[   43.627482] [<c010af38>] (show_stack) from [<c032479c>] (dump_stack+0x88/0x9c)
[   43.634683] [<c032479c>] (dump_stack) from [<c03280f0>] (nmi_cpu_backtrace+0x78/0x7c)
[   43.642487] [<c03280f0>] (nmi_cpu_backtrace) from [<c010cb4c>] (raise_nmi+0x60/0x64)
[   43.650208] [<c010cb4c>] (raise_nmi) from [<c0328064>] (nmi_trigger_all_cpu_backtrace+0x118/0x12c)
[   43.659144] [<c0328064>] (nmi_trigger_all_cpu_backtrace) from [<c01582ac>] (do_raw_spin_lock+0x104/0x1b0)
[   43.668688] [<c01582ac>] (do_raw_spin_lock) from [<c06cf1b0>] (__schedule+0x84/0x4a4)
[   43.676494] [<c06cf1b0>] (__schedule) from [<c06cf61c>] (schedule+0x4c/0xac)
[   43.683517] [<c06cf61c>] (schedule) from [<c011d16c>] (do_exit+0x884/0xa44)
[   43.690456] [<c011d16c>] (do_exit) from [<c010b168>] (die+0x22c/0x2ec)
[   43.696963] [<c010b168>] (die) from [<c0114f58>] (__do_kernel_fault.part.0+0x64/0x1e4)
[   43.704861] [<c0114f58>] (__do_kernel_fault.part.0) from [<c0110a08>] (do_bad_area+0x0/0x8c)
[   43.713277] [<c0110a08>] (do_bad_area) from [<c0110764>] (do_page_fault+0x0/0x2a4)
[   43.720821] [<c0110764>] (do_page_fault) from [<00000030>] (0x30)
[   43.727331] NMI backtrace for cpu 3
[   43.730399] CPU: 3 PID: 0 Comm: swapper/3 Tainted: G      D W       4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   43.740901] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   43.746960] task: edc8c600 ti: edcc4000 task.ti: edcc4000
[   43.752343] PC is at arch_cpu_idle+0x38/0x3c
[   43.756592] LR is at arch_cpu_idle+0x34/0x3c
[   43.760844] pc : [<c01083bc>]    lr : [<c01083b8>]    psr: 60000113
[   43.767090] sp : edcc5fd8  ip : ee363f74  fp : c0b024b8
[   43.772296] r10: c0b024c0  r9 : c0a633f8  r8 : 00000000
[   43.777499] r7 : 00000000  r6 : 00000008  r5 : c0b02454  r4 : edcc4000
[   43.784007] r3 : c0113e40  r2 : 00000000  r1 : 00000000  r0 : 00000001
[   43.790515] Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
[   43.797628] Control: 10c5387d  Table: 2000406a  DAC: 00000051
[   43.803354] CPU: 3 PID: 0 Comm: swapper/3 Tainted: G      D W       4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   43.813858] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   43.819924] [<c010e1ac>] (unwind_backtrace) from [<c010af38>] (show_stack+0x10/0x14)
[   43.827647] [<c010af38>] (show_stack) from [<c032479c>] (dump_stack+0x88/0x9c)
[   43.834848] [<c032479c>] (dump_stack) from [<c03280d4>] (nmi_cpu_backtrace+0x5c/0x7c)
[   43.842655] [<c03280d4>] (nmi_cpu_backtrace) from [<c010d398>] (handle_IPI+0xd8/0x1ac)
[   43.850552] [<c010d398>] (handle_IPI) from [<c01014e4>] (gic_handle_irq+0x94/0x98)
[   43.858096] [<c01014e4>] (gic_handle_irq) from [<c010b9d4>] (__irq_svc+0x54/0x90)
[   43.865558] Exception stack(0xedcc5f88 to 0xedcc5fd0)
[   43.870583] 5f80:                   00000001 00000000 00000000 c0113e40 edcc4000 c0b02454
[   43.878744] 5fa0: 00000008 00000000 00000000 c0a633f8 c0b024c0 c0b024b8 ee363f74 edcc5fd8
[   43.886900] 5fc0: c01083b8 c01083bc 60000113 ffffffff
[   43.891923] [<c010b9d4>] (__irq_svc) from [<c01083bc>] (arch_cpu_idle+0x38/0x3c)
[   43.899301] [<c01083bc>] (arch_cpu_idle) from [<c0151900>] (cpu_startup_entry+0x1cc/0x250)
[   43.907546] [<c0151900>] (cpu_startup_entry) from [<2010158c>] (0x2010158c)
[   43.914488] NMI backtrace for cpu 4
[   43.917940] CPU: 4 PID: 0 Comm: swapper/4 Tainted: G      D W       4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   43.928436] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   43.934492] task: edc8cb00 ti: edcc6000 task.ti: edcc6000
[   43.939869] PC is at arch_cpu_idle+0x38/0x3c
[   43.944117] LR is at arch_cpu_idle+0x34/0x3c
[   43.948369] pc : [<c01083bc>]    lr : [<c01083b8>]    psr: 60000013
[   43.954617] sp : edcc7fd8  ip : 0000abe0  fp : c0b024b8
[   43.959821] r10: c0b024c0  r9 : c0a633f8  r8 : 00000000
[   43.965028] r7 : 00000000  r6 : 00000010  r5 : c0b02454  r4 : edcc6000
[   43.971537] r3 : c0113e40  r2 : 00000000  r1 : 00000000  r0 : 00000001
[   43.978041] Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
[   43.985154] Control: 10c5387d  Table: 2000406a  DAC: 00000051
[   43.990880] CPU: 4 PID: 0 Comm: swapper/4 Tainted: G      D W       4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   44.001390] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   44.007450] [<c010e1ac>] (unwind_backtrace) from [<c010af38>] (show_stack+0x10/0x14)
[   44.015180] [<c010af38>] (show_stack) from [<c032479c>] (dump_stack+0x88/0x9c)
[   44.022380] [<c032479c>] (dump_stack) from [<c03280d4>] (nmi_cpu_backtrace+0x5c/0x7c)
[   44.030189] [<c03280d4>] (nmi_cpu_backtrace) from [<c010d398>] (handle_IPI+0xd8/0x1ac)
[   44.038083] [<c010d398>] (handle_IPI) from [<c01014e4>] (gic_handle_irq+0x94/0x98)
[   44.045630] [<c01014e4>] (gic_handle_irq) from [<c010b9d4>] (__irq_svc+0x54/0x90)
[   44.053090] Exception stack(0xedcc7f88 to 0xedcc7fd0)
[   44.058109] 7f80:                   00000001 00000000 00000000 c0113e40 edcc6000 c0b02454
[   44.066277] 7fa0: 00000010 00000000 00000000 c0a633f8 c0b024c0 c0b024b8 0000abe0 edcc7fd8
[   44.074432] 7fc0: c01083b8 c01083bc 60000013 ffffffff
[   44.079450] [<c010b9d4>] (__irq_svc) from [<c01083bc>] (arch_cpu_idle+0x38/0x3c)
[   44.086835] [<c01083bc>] (arch_cpu_idle) from [<c0151900>] (cpu_startup_entry+0x1cc/0x250)
[   44.095079] [<c0151900>] (cpu_startup_entry) from [<2010158c>] (0x2010158c)
[   44.102013] NMI backtrace for cpu 6
[   44.105473] CPU: 6 PID: 0 Comm: swapper/6 Tainted: G      D W       4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   44.115985] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   44.122040] task: edc8d500 ti: edcca000 task.ti: edcca000
[   44.127418] PC is at arch_cpu_idle+0x38/0x3c
[   44.131665] LR is at arch_cpu_idle+0x34/0x3c
[   44.135918] pc : [<c01083bc>]    lr : [<c01083b8>]    psr: 60000013
[   44.142168] sp : edccbfd8  ip : 0000abe0  fp : c0b024b8
[   44.147369] r10: c0b024c0  r9 : c0a633f8  r8 : 00000000
[   44.152575] r7 : 00000000  r6 : 00000040  r5 : c0b02454  r4 : edcca000
[   44.159080] r3 : c0113e40  r2 : 00000000  r1 : 00000000  r0 : 00000001
[   44.165589] Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
[   44.172705] Control: 10c5387d  Table: 2000406a  DAC: 00000051
[   44.178429] CPU: 6 PID: 0 Comm: swapper/6 Tainted: G      D W       4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   44.188942] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   44.194997] [<c010e1ac>] (unwind_backtrace) from [<c010af38>] (show_stack+0x10/0x14)
[   44.202729] [<c010af38>] (show_stack) from [<c032479c>] (dump_stack+0x88/0x9c)
[   44.209929] [<c032479c>] (dump_stack) from [<c03280d4>] (nmi_cpu_backtrace+0x5c/0x7c)
[   44.217742] [<c03280d4>] (nmi_cpu_backtrace) from [<c010d398>] (handle_IPI+0xd8/0x1ac)
[   44.225633] [<c010d398>] (handle_IPI) from [<c01014e4>] (gic_handle_irq+0x94/0x98)
[   44.233179] [<c01014e4>] (gic_handle_irq) from [<c010b9d4>] (__irq_svc+0x54/0x90)
[   44.240639] Exception stack(0xedccbf88 to 0xedccbfd0)
[   44.245656] bf80:                   00000001 00000000 00000000 c0113e40 edcca000 c0b02454
[   44.253827] bfa0: 00000040 00000000 00000000 c0a633f8 c0b024c0 c0b024b8 0000abe0 edccbfd8
[   44.261982] bfc0: c01083b8 c01083bc 60000013 ffffffff
[   44.266998] [<c010b9d4>] (__irq_svc) from [<c01083bc>] (arch_cpu_idle+0x38/0x3c)
[   44.274387] [<c01083bc>] (arch_cpu_idle) from [<c0151900>] (cpu_startup_entry+0x1cc/0x250)
[   44.282629] [<c0151900>] (cpu_startup_entry) from [<2010158c>] (0x2010158c)
[   81.055964] BUG: spinlock lockup suspected on CPU#0, kworker/0:0/4
[   81.060688]  lock: enable_lock+0x0/0x10, .magic: dead4ead, .owner: kworker/u16:2/121, .owner_cpu: 1
[   81.069700] CPU: 0 PID: 4 Comm: kworker/0:0 Tainted: G      D W       4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   81.070847] BUG: spinlock lockup suspected on CPU#2, kworker/2:1/108
[   81.070861]  lock: enable_lock+0x0/0x10, .magic: dead4ead, .owner: kworker/u16:2/121, .owner_cpu: 1
[   81.095720] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   81.101790] Workqueue: events dbs_work_handler
[   81.106215] [<c010e1ac>] (unwind_backtrace) from [<c010af38>] (show_stack+0x10/0x14)
[   81.113942] [<c010af38>] (show_stack) from [<c032479c>] (dump_stack+0x88/0x9c)
[   81.121141] [<c032479c>] (dump_stack) from [<c01582a4>] (do_raw_spin_lock+0xfc/0x1b0)
[   81.128951] [<c01582a4>] (do_raw_spin_lock) from [<c06d3fdc>] (_raw_spin_lock_irqsave+0x20/0x28)
[   81.137713] [<c06d3fdc>] (_raw_spin_lock_irqsave) from [<c054fdd4>] (clk_enable_lock+0x58/0x110)
[   81.146474] [<c054fdd4>] (clk_enable_lock) from [<c0550714>] (clk_enable+0x14/0x34)
[   81.154113] [<c0550714>] (clk_enable) from [<c04eb04c>] (exynos5_i2c_xfer+0x28/0x2f4)
[   81.161915] [<c04eb04c>] (exynos5_i2c_xfer) from [<c04e6bc8>] (__i2c_transfer+0x13c/0x278)
[   81.170156] [<c04e6bc8>] (__i2c_transfer) from [<c04e6d70>] (i2c_transfer+0x6c/0xa8)
[   81.177876] [<c04e6d70>] (i2c_transfer) from [<c04e6de8>] (i2c_master_send+0x3c/0x4c)
[   81.185685] [<c04e6de8>] (i2c_master_send) from [<c0415d30>] (regmap_i2c_write+0x10/0x2c)
[   81.193847] [<c0415d30>] (regmap_i2c_write) from [<c0411dd0>] (_regmap_raw_write+0x514/0x5f0)
[   81.202342] [<c0411dd0>] (_regmap_raw_write) from [<c0411154>] (_regmap_update_bits+0xc0/0xc4)
[   81.210929] [<c0411154>] (_regmap_update_bits) from [<c04120c0>] (regmap_update_bits_base+0x50/0x74)
[   81.220047] [<c04120c0>] (regmap_update_bits_base) from [<c037d910>] (regulator_set_voltage_sel_regmap+0x4c/0x9c)
[   81.230277] [<c037d910>] (regulator_set_voltage_sel_regmap) from [<c03799e4>] (_regulator_do_set_voltage+0x288/0x358)
[   81.240859] [<c03799e4>] (_regulator_do_set_voltage) from [<c037a624>] (regulator_set_voltage_unlocked+0x1d8/0x22c)
[   81.251268] [<c037a624>] (regulator_set_voltage_unlocked) from [<c037a6a0>] (regulator_set_voltage+0x28/0x54)
[   81.261166] [<c037a6a0>] (regulator_set_voltage) from [<c0408868>] (_set_opp_voltage+0x30/0x98)
[   81.269834] [<c0408868>] (_set_opp_voltage) from [<c0408fa8>] (dev_pm_opp_set_rate+0x10c/0x2b4)
[   81.278513] [<c0408fa8>] (dev_pm_opp_set_rate) from [<c050dbdc>] (__cpufreq_driver_target+0x170/0x2d4)
[   81.287792] [<c050dbdc>] (__cpufreq_driver_target) from [<c0510ec8>] (od_dbs_timer+0x9c/0x168)
[   81.296377] [<c0510ec8>] (od_dbs_timer) from [<c0511474>] (dbs_work_handler+0x2c/0x60)
[   81.304271] [<c0511474>] (dbs_work_handler) from [<c012ff2c>] (process_one_work+0x124/0x338)
[   81.312686] [<c012ff2c>] (process_one_work) from [<c0130178>] (worker_thread+0x38/0x4d4)
[   81.320755] [<c0130178>] (worker_thread) from [<c0135454>] (kthread+0xdc/0xf4)
[   81.327954] [<c0135454>] (kthread) from [<c0107978>] (ret_from_fork+0x14/0x3c)
[   81.335151] Sending NMI to all CPUs:
[   81.335155] CPU: 2 PID: 108 Comm: kworker/2:1 Tainted: G      D W       4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   81.335160] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   81.335178] Workqueue: pm pm_runtime_work
[   81.335192] [<c010e1ac>] (unwind_backtrace) from [<c010af38>] (show_stack+0x10/0x14)
[   81.335203] [<c010af38>] (show_stack) from [<c032479c>] (dump_stack+0x88/0x9c)
[   81.335213] [<c032479c>] (dump_stack) from [<c01582a4>] (do_raw_spin_lock+0xfc/0x1b0)
[   81.335224] [<c01582a4>] (do_raw_spin_lock) from [<c06d3fdc>] (_raw_spin_lock_irqsave+0x20/0x28)
[   81.335235] [<c06d3fdc>] (_raw_spin_lock_irqsave) from [<c054fdd4>] (clk_enable_lock+0x58/0x110)
[   81.335246] [<c054fdd4>] (clk_enable_lock) from [<c05507e4>] (clk_disable+0x1c/0x34)
[   81.335257] [<c05507e4>] (clk_disable) from [<c0372774>] (amba_pm_runtime_suspend+0x50/0x58)
[   81.335268] [<c0372774>] (amba_pm_runtime_suspend) from [<c0402d18>] (__rpm_callback+0x2c/0x60)
[   81.335278] [<c0402d18>] (__rpm_callback) from [<c0402d6c>] (rpm_callback+0x20/0x80)
[   81.335289] [<c0402d6c>] (rpm_callback) from [<c0403234>] (rpm_suspend+0xdc/0x4c0)
[   81.335299] [<c0403234>] (rpm_suspend) from [<c040453c>] (pm_runtime_work+0x74/0xa8)
[   81.335311] [<c040453c>] (pm_runtime_work) from [<c012ff2c>] (process_one_work+0x124/0x338)
[   81.335323] [<c012ff2c>] (process_one_work) from [<c0130178>] (worker_thread+0x38/0x4d4)
[   81.335334] [<c0130178>] (worker_thread) from [<c0135454>] (kthread+0xdc/0xf4)
[   81.335345] [<c0135454>] (kthread) from [<c0107978>] (ret_from_fork+0x14/0x3c)
[   81.478460] NMI backtrace for cpu 0
[   81.481925] CPU: 0 PID: 4 Comm: kworker/0:0 Tainted: G      D W       4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   81.492602] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   81.498669] Workqueue: events dbs_work_handler
[   81.503094] [<c010e1ac>] (unwind_backtrace) from [<c010af38>] (show_stack+0x10/0x14)
[   81.510822] [<c010af38>] (show_stack) from [<c032479c>] (dump_stack+0x88/0x9c)
[   81.518022] [<c032479c>] (dump_stack) from [<c03280f0>] (nmi_cpu_backtrace+0x78/0x7c)
[   81.525829] [<c03280f0>] (nmi_cpu_backtrace) from [<c010cb4c>] (raise_nmi+0x60/0x64)
[   81.533551] [<c010cb4c>] (raise_nmi) from [<c0328064>] (nmi_trigger_all_cpu_backtrace+0x118/0x12c)
[   81.542487] [<c0328064>] (nmi_trigger_all_cpu_backtrace) from [<c01582ac>] (do_raw_spin_lock+0x104/0x1b0)
[   81.552029] [<c01582ac>] (do_raw_spin_lock) from [<c06d3fdc>] (_raw_spin_lock_irqsave+0x20/0x28)
[   81.560791] [<c06d3fdc>] (_raw_spin_lock_irqsave) from [<c054fdd4>] (clk_enable_lock+0x58/0x110)
[   81.569553] [<c054fdd4>] (clk_enable_lock) from [<c0550714>] (clk_enable+0x14/0x34)
[   81.577187] [<c0550714>] (clk_enable) from [<c04eb04c>] (exynos5_i2c_xfer+0x28/0x2f4)
[   81.584994] [<c04eb04c>] (exynos5_i2c_xfer) from [<c04e6bc8>] (__i2c_transfer+0x13c/0x278)
[   81.593234] [<c04e6bc8>] (__i2c_transfer) from [<c04e6d70>] (i2c_transfer+0x6c/0xa8)
[   81.600955] [<c04e6d70>] (i2c_transfer) from [<c04e6de8>] (i2c_master_send+0x3c/0x4c)
[   81.608762] [<c04e6de8>] (i2c_master_send) from [<c0415d30>] (regmap_i2c_write+0x10/0x2c)
[   81.616918] [<c0415d30>] (regmap_i2c_write) from [<c0411dd0>] (_regmap_raw_write+0x514/0x5f0)
[   81.625420] [<c0411dd0>] (_regmap_raw_write) from [<c0411154>] (_regmap_update_bits+0xc0/0xc4)
[   81.634008] [<c0411154>] (_regmap_update_bits) from [<c04120c0>] (regmap_update_bits_base+0x50/0x74)
[   81.643118] [<c04120c0>] (regmap_update_bits_base) from [<c037d910>] (regulator_set_voltage_sel_regmap+0x4c/0x9c)
[   81.653355] [<c037d910>] (regulator_set_voltage_sel_regmap) from [<c03799e4>] (_regulator_do_set_voltage+0x288/0x358)
[   81.663937] [<c03799e4>] (_regulator_do_set_voltage) from [<c037a624>] (regulator_set_voltage_unlocked+0x1d8/0x22c)
[   81.674348] [<c037a624>] (regulator_set_voltage_unlocked) from [<c037a6a0>] (regulator_set_voltage+0x28/0x54)
[   81.684238] [<c037a6a0>] (regulator_set_voltage) from [<c0408868>] (_set_opp_voltage+0x30/0x98)
[   81.692912] [<c0408868>] (_set_opp_voltage) from [<c0408fa8>] (dev_pm_opp_set_rate+0x10c/0x2b4)
[   81.701587] [<c0408fa8>] (dev_pm_opp_set_rate) from [<c050dbdc>] (__cpufreq_driver_target+0x170/0x2d4)
[   81.710870] [<c050dbdc>] (__cpufreq_driver_target) from [<c0510ec8>] (od_dbs_timer+0x9c/0x168)
[   81.719456] [<c0510ec8>] (od_dbs_timer) from [<c0511474>] (dbs_work_handler+0x2c/0x60)
[   81.727350] [<c0511474>] (dbs_work_handler) from [<c012ff2c>] (process_one_work+0x124/0x338)
[   81.735766] [<c012ff2c>] (process_one_work) from [<c0130178>] (worker_thread+0x38/0x4d4)
[   81.743834] [<c0130178>] (worker_thread) from [<c0135454>] (kthread+0xdc/0xf4)
[   81.751033] [<c0135454>] (kthread) from [<c0107978>] (ret_from_fork+0x14/0x3c)
[   81.758426] NMI backtrace for cpu 3
[   81.761710] CPU: 3 PID: 0 Comm: swapper/3 Tainted: G      D W       4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   81.772212] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   81.778277] task: edc8c600 ti: edcc4000 task.ti: edcc4000
[   81.783655] PC is at arch_cpu_idle+0x38/0x3c
[   81.787905] LR is at arch_cpu_idle+0x34/0x3c
[   81.792155] pc : [<c01083bc>]    lr : [<c01083b8>]    psr: 60000113
[   81.798403] sp : edcc5fd8  ip : ee363f74  fp : c0b024b8
[   81.803608] r10: c0b024c0  r9 : c0a633f8  r8 : 00000000
[   81.808813] r7 : 00000000  r6 : 00000008  r5 : c0b02454  r4 : edcc4000
[   81.815320] r3 : c0113e40  r2 : 00000000  r1 : 00000000  r0 : 00000001
[   81.821826] Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
[   81.828940] Control: 10c5387d  Table: 2000406a  DAC: 00000051
[   81.834666] CPU: 3 PID: 0 Comm: swapper/3 Tainted: G      D W       4.7.0-rc2-next-20160606-00009-g897c9c5cd3cf #117
[   81.845168] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[   81.851233] [<c010e1ac>] (unwind_backtrace) from [<c010af38>] (show_stack+0x10/0x14)
[   81.858960] [<c010af38>] (show_stack) from [<c032479c>] (dump_stack+0x88/0x9c)
[   81.866160] [<c032479c>] (dump_stack) from [<c03280d4>] (nmi_cpu_backtrace+0x5c/0x7c)
[   81.873967] [<c03280d4>] (nmi_cpu_backtrace) from [<c010d398>] (handle_IPI+0xd8/0x1ac)
[   81.881861] [<c010d398>] (handle_IPI) from [<c01014e4>] (gic_handle_irq+0x94/0x98)
[   81.889409] [<c01014e4>] (gic_handle_irq) from [<c010b9d4>] (__irq_svc+0x54/0x90)
[   81.896869] Exception stack(0xedcc5f88 to 0xedcc5fd0)
[   81.901895] 5f80:                   00000001 00000000 00000000 c0113e40 edcc4000 c0b02454
[   81.910056] 5fa0: 00000008 00000000 00000000 c0a633f8 c0b024c0 c0b024b8 ee363f74 edcc5fd8
[   81.918210] 5fc0: c01083b8 c01083bc 60000113 ffffffff
[   81.923236] [<c010b9d4>] (__irq_svc) from [<c01083bc>] (arch_cpu_idle+0x38/0x3c)
[   81.930615] [<c01083bc>] (arch_cpu_idle) from [<c0151900>] (cpu_startup_entry+0x1cc/0x250)
[   81.938857] [<c0151900>] (cpu_startup_entry) from [<2010158c>] (0x2010158c)

Stephen Boyd

author

2016-08-16 20:06 UTC #43 lore raw

Re: [PATCH 17/34] clk: maxgen: Migrate to clk_hw based OF and registration APIs

Quoted 21 lines · Javier Martinez Canillas

Quoted 7 lines

Thanks! Found the problem too.

----8<-----

drivers/clk/clk-max-gen.c +0 -0

index 4bb53fcf8639..5e8bac190698 100644
@@ -169,7 +169,7 @@ int max_gen_clk_probe(struct platform_device

*pdev, struct regmap *regmap,

        if (dev->of_node) {
                ret = of_clk_add_hw_provider(dev->of_node, of_clk_max_gen_get,
-                                            max_gen_clks);
+                                            max_gen_data);
                if (ret) {
                        dev_err(dev, "failed to register OF clock provider\n");
                        return ret;

Javier Martinez Canillas

2016-08-17 03:00 UTC #44 lore raw

Re: [PATCH 17/34] clk: maxgen: Migrate to clk_hw based OF and registration APIs

Hello Stephen,

Quoted 7 lines · Stephen Boyd

Quoted 5 lines

Great! Thanks a lot for finding the issue.
I tested v2 of your patch and it worked well indeed.

Best regards,

Signature · 3 lines

Javier Martinez Canillas
Open Source Group
Samsung Research America

Stephen Boyd

author

2016-06-01 23:15 UTC #45 lore raw

PATCH 18/34 clk: mb86s7x: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Cc Jassi Brar <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-mb86s7x.c | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

drivers/clk/clk-mb86s7x.c +10 -6

index e0817754ca3e..2a83a3ff1d09 100644
@@ -327,10 +327,11 @@ static struct clk_ops clk_clc_ops = {
 	.set_rate = clc_set_rate,
 };
 
-struct clk *mb86s7x_clclk_register(struct device *cpu_dev)
+static struct clk_hw *mb86s7x_clclk_register(struct device *cpu_dev)
 {
 	struct clk_init_data init;
 	struct cl_clk *clc;
+	int ret;
 
 	clc = kzalloc(sizeof(*clc), GFP_KERNEL);
 	if (!clc)

@@ -344,14 +345,17 @@ struct clk *mb86s7x_clclk_register(struct device *cpu_dev)
 	init.flags = CLK_GET_RATE_NOCACHE;
 	init.num_parents = 0;
 
-	return devm_clk_register(cpu_dev, &clc->hw);
+	ret = devm_clk_hw_register(cpu_dev, &clc->hw);
+	if (ret)
+		return ERR_PTR(ret);
+	return &clc->hw;
 }
 
 static int mb86s7x_clclk_of_init(void)
 {
 	int cpu, ret = -ENODEV;
 	struct device_node *np;
-	struct clk *clk;
+	struct clk_hw *hw;
 
 	np = of_find_compatible_node(NULL, NULL, "fujitsu,mb86s70-scb-1.0");
 	if (!np || !of_device_is_available(np))

@@ -365,12 +369,12 @@ static int mb86s7x_clclk_of_init(void)
 			continue;
 		}
 
-		clk = mb86s7x_clclk_register(cpu_dev);
-		if (IS_ERR(clk)) {
+		hw = mb86s7x_clclk_register(cpu_dev);
+		if (IS_ERR(hw)) {
 			pr_err("failed to register cpu%d clock\n", cpu);
 			continue;
 		}
-		if (clk_register_clkdev(clk, NULL, dev_name(cpu_dev))) {
+		if (clk_hw_register_clkdev(hw, NULL, dev_name(cpu_dev))) {
 			pr_err("failed to register cpu%d clock lookup\n", cpu);
 			continue;
 		}

Signature · 1 line

2.7.4

Stephen Boyd

2016-08-25 00:27 UTC #46 lore raw

Re: [PATCH 18/34] clk: mb86s7x: Migrate to clk_hw based OF and registration APIs

Quoted 8 lines · Stephen Boyd

Applied to clk-next, but this driver doesn't even compile in mainline...

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #47 lore raw

PATCH 19/34 clk: moxart: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Cc Jonas Jensen <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-moxart.c | 22 ++++++++++++----------
 1 file changed, 12 insertions(+), 10 deletions(-)

drivers/clk/clk-moxart.c +12 ~~-10~~

index f37f719643ec..b86dac851116 100644
@@ -19,7 +19,8 @@
 static void __init moxart_of_pll_clk_init(struct device_node *node)
 {
 	static void __iomem *base;
-	struct clk *clk, *ref_clk;
+	struct clk_hw *hw;
+	struct clk *ref_clk;
 	unsigned int mul;
 	const char *name = node->name;
 	const char *parent_name;

@@ -42,14 +43,14 @@ static void __init moxart_of_pll_clk_init(struct device_node *node)
 		return;
 	}
 
-	clk = clk_register_fixed_factor(NULL, name, parent_name, 0, mul, 1);
-	if (IS_ERR(clk)) {
+	hw = clk_hw_register_fixed_factor(NULL, name, parent_name, 0, mul, 1);
+	if (IS_ERR(hw)) {
 		pr_err("%s: failed to register clock\n", node->full_name);
 		return;
 	}
 
-	clk_register_clkdev(clk, NULL, name);
-	of_clk_add_provider(node, of_clk_src_simple_get, clk);
+	clk_hw_register_clkdev(hw, NULL, name);
+	of_clk_add_hw_provider(node, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(moxart_pll_clock, "moxa,moxart-pll-clock",
 	       moxart_of_pll_clk_init);

@@ -57,7 +58,8 @@ CLK_OF_DECLARE(moxart_pll_clock, "moxa,moxart-pll-clock",
 static void __init moxart_of_apb_clk_init(struct device_node *node)
 {
 	static void __iomem *base;
-	struct clk *clk, *pll_clk;
+	struct clk_hw *hw;
+	struct clk *pll_clk;
 	unsigned int div, val;
 	unsigned int div_idx[] = { 2, 3, 4, 6, 8};
 	const char *name = node->name;

@@ -85,14 +87,14 @@ static void __init moxart_of_apb_clk_init(struct device_node *node)
 		return;
 	}
 
-	clk = clk_register_fixed_factor(NULL, name, parent_name, 0, 1, div);
-	if (IS_ERR(clk)) {
+	hw = clk_hw_register_fixed_factor(NULL, name, parent_name, 0, 1, div);
+	if (IS_ERR(hw)) {
 		pr_err("%s: failed to register clock\n", node->full_name);
 		return;
 	}
 
-	clk_register_clkdev(clk, NULL, name);
-	of_clk_add_provider(node, of_clk_src_simple_get, clk);
+	clk_hw_register_clkdev(hw, NULL, name);
+	of_clk_add_hw_provider(node, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(moxart_apb_clock, "moxa,moxart-apb-clock",
 	       moxart_of_apb_clk_init);

Signature · 1 line

2.7.4

Stephen Boyd

Applied

2016-08-25 00:25 UTC #48 lore raw

Re: [PATCH 19/34] clk: moxart: Migrate to clk_hw based OF and registration APIs

Quoted 8 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #49 lore raw

PATCH 20/34 clk: nomadik: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Cc Linus Walleij <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-nomadik.c | 48 +++++++++++++++++++++++++----------------------
 1 file changed, 26 insertions(+), 22 deletions(-)

drivers/clk/clk-nomadik.c +26 ~~-22~~

index e4d8a991c58f..71677eb12565 100644
@@ -253,11 +253,11 @@ static const struct clk_ops pll_clk_ops = {
 	.recalc_rate = pll_clk_recalc_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 pll_clk_register(struct device *dev, const char *name,
 		 const char *parent_name, u32 id)
 {
-	struct clk *clk;
+	int ret;
 	struct clk_pll *pll;
 	struct clk_init_data init;

@@ -281,11 +281,13 @@ pll_clk_register(struct device *dev, const char *name,
 
 	pr_debug("register PLL1 clock \"%s\"\n", name);
 
-	clk = clk_register(dev, &pll->hw);
-	if (IS_ERR(clk))
+	ret = clk_hw_register(dev, &pll->hw);
+	if (ret) {
 		kfree(pll);
+		return ERR_PTR(ret);
+	}
 
-	return clk;
+	return &pll->hw;
 }
 
 /*

@@ -345,11 +347,11 @@ static const struct clk_ops src_clk_ops = {
 	.recalc_rate = src_clk_recalc_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 src_clk_register(struct device *dev, const char *name,
 		 const char *parent_name, u8 id)
 {
-	struct clk *clk;
+	int ret;
 	struct clk_src *sclk;
 	struct clk_init_data init;

@@ -376,11 +378,13 @@ src_clk_register(struct device *dev, const char *name,
 	pr_debug("register clock \"%s\" ID: %d group: %d bits: %08x\n",
 		 name, id, sclk->group1, sclk->clkbit);
 
-	clk = clk_register(dev, &sclk->hw);
-	if (IS_ERR(clk))
+	ret = clk_hw_register(dev, &sclk->hw);
+	if (ret) {
 		kfree(sclk);
+		return ERR_PTR(ret);
+	}
 
-	return clk;
+	return &sclk->hw;
 }
 
 #ifdef CONFIG_DEBUG_FS

@@ -508,7 +512,7 @@ device_initcall(nomadik_src_clk_init_debugfs);
 
 static void __init of_nomadik_pll_setup(struct device_node *np)
 {
-	struct clk *clk = ERR_PTR(-EINVAL);
+	struct clk_hw *hw;
 	const char *clk_name = np->name;
 	const char *parent_name;
 	u32 pll_id;

@@ -522,16 +526,16 @@ static void __init of_nomadik_pll_setup(struct device_node *np)
 		return;
 	}
 	parent_name = of_clk_get_parent_name(np, 0);
-	clk = pll_clk_register(NULL, clk_name, parent_name, pll_id);
-	if (!IS_ERR(clk))
-		of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	hw = pll_clk_register(NULL, clk_name, parent_name, pll_id);
+	if (!IS_ERR(hw))
+		of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(nomadik_pll_clk,
 	"st,nomadik-pll-clock", of_nomadik_pll_setup);
 
 static void __init of_nomadik_hclk_setup(struct device_node *np)
 {
-	struct clk *clk = ERR_PTR(-EINVAL);
+	struct clk_hw *hw;
 	const char *clk_name = np->name;
 	const char *parent_name;

@@ -542,20 +546,20 @@ static void __init of_nomadik_hclk_setup(struct device_node *np)
 	/*
 	 * The HCLK divides PLL1 with 1 (passthru), 2, 3 or 4.
 	 */
-	clk = clk_register_divider(NULL, clk_name, parent_name,
+	hw = clk_hw_register_divider(NULL, clk_name, parent_name,
 			   0, src_base + SRC_CR,
 			   13, 2,
 			   CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO,
 			   &src_lock);
-	if (!IS_ERR(clk))
-		of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	if (!IS_ERR(hw))
+		of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(nomadik_hclk_clk,
 	"st,nomadik-hclk-clock", of_nomadik_hclk_setup);
 
 static void __init of_nomadik_src_clk_setup(struct device_node *np)
 {
-	struct clk *clk = ERR_PTR(-EINVAL);
+	struct clk_hw *hw;
 	const char *clk_name = np->name;
 	const char *parent_name;
 	u32 clk_id;

@@ -569,9 +573,9 @@ static void __init of_nomadik_src_clk_setup(struct device_node *np)
 		return;
 	}
 	parent_name = of_clk_get_parent_name(np, 0);
-	clk = src_clk_register(NULL, clk_name, parent_name, clk_id);
-	if (!IS_ERR(clk))
-		of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	hw = src_clk_register(NULL, clk_name, parent_name, clk_id);
+	if (!IS_ERR(hw))
+		of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 CLK_OF_DECLARE(nomadik_src_clk,
 	"st,nomadik-src-clock", of_nomadik_src_clk_setup);

Signature · 1 line

2.7.4

Linus Walleij

Acked-by on v1 20/34

2016-06-02 12:06 UTC #50 lore raw

Re: [PATCH 20/34] clk: nomadik: Migrate to clk_hw based OF and registration APIs

Quoted 7 lines · Stephen Boyd

Acked-by Linus Walleij <[email protected]>

Yours,
Linus Walleij

Stephen Boyd

Applied

2016-06-30 19:26 UTC #51 lore raw

Re: [PATCH 20/34] clk: nomadik: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Quoted 8 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #52 lore raw

PATCH 21/34 clk: nspire: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Cc Daniel Tang <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-nspire.c | 19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)

drivers/clk/clk-nspire.c +10 -9

index 64f196a90816..f861011d5d21 100644
@@ -69,7 +69,7 @@ static void __init nspire_ahbdiv_setup(struct device_node *node,
 {
 	u32 val;
 	void __iomem *io;
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *clk_name = node->name;
 	const char *parent_name;
 	struct nspire_clk_info info;

@@ -85,10 +85,10 @@ static void __init nspire_ahbdiv_setup(struct device_node *node,
 	of_property_read_string(node, "clock-output-names", &clk_name);
 	parent_name = of_clk_get_parent_name(node, 0);
 
-	clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0,
-					1, info.base_ahb_ratio);
-	if (!IS_ERR(clk))
-		of_clk_add_provider(node, of_clk_src_simple_get, clk);
+	hw = clk_hw_register_fixed_factor(NULL, clk_name, parent_name, 0,
+					  1, info.base_ahb_ratio);
+	if (!IS_ERR(hw))
+		of_clk_add_hw_provider(node, of_clk_hw_simple_get, hw);
 }
 
 static void __init nspire_ahbdiv_setup_cx(struct device_node *node)

@@ -111,7 +111,7 @@ static void __init nspire_clk_setup(struct device_node *node,
 {
 	u32 val;
 	void __iomem *io;
-	struct clk *clk;
+	struct clk_hw *hw;
 	const char *clk_name = node->name;
 	struct nspire_clk_info info;

@@ -125,9 +125,10 @@ static void __init nspire_clk_setup(struct device_node *node,
 
 	of_property_read_string(node, "clock-output-names", &clk_name);
 
-	clk = clk_register_fixed_rate(NULL, clk_name, NULL, 0, info.base_clock);
-	if (!IS_ERR(clk))
-		of_clk_add_provider(node, of_clk_src_simple_get, clk);
+	hw = clk_hw_register_fixed_rate(NULL, clk_name, NULL, 0,
+					info.base_clock);
+	if (!IS_ERR(hw))
+		of_clk_add_hw_provider(node, of_clk_hw_simple_get, hw);
 	else
 		return;

Signature · 1 line

2.7.4

Stephen Boyd

Applied

2016-08-25 00:25 UTC #53 lore raw

Re: [PATCH 21/34] clk: nspire: Migrate to clk_hw based OF and registration APIs

Quoted 8 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #54 lore raw

PATCH 22/34 clk: palmas: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Cc Peter Ujfalusi <[email protected]>

Cc Nishanth Menon <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-palmas.c | 12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

drivers/clk/clk-palmas.c +4 -8

index 8328863cb0e0..31f590cea493 100644
@@ -41,7 +41,6 @@ struct palmas_clk32k_desc {
 
 struct palmas_clock_info {
 	struct device *dev;
-	struct clk *clk;
 	struct clk_hw hw;
 	struct palmas *palmas;
 	const struct palmas_clk32k_desc *clk_desc;

@@ -218,7 +217,7 @@ static int palmas_clks_init_configure(struct palmas_clock_info *cinfo)
 	}
 
 	if (cinfo->ext_control_pin) {
-		ret = clk_prepare(cinfo->clk);
+		ret = clk_prepare(cinfo->hw.clk);
 		if (ret < 0) {
 			dev_err(cinfo->dev, "Clock prep failed, %d\n", ret);
 			return ret;

@@ -242,7 +241,6 @@ static int palmas_clks_probe(struct platform_device *pdev)
 	struct device_node *node = pdev->dev.of_node;
 	const struct palmas_clks_of_match_data *match_data;
 	struct palmas_clock_info *cinfo;
-	struct clk *clk;
 	int ret;
 
 	match_data = of_device_get_match_data(&pdev->dev);

@@ -261,22 +259,20 @@ static int palmas_clks_probe(struct platform_device *pdev)
 
 	cinfo->clk_desc = &match_data->desc;
 	cinfo->hw.init = &match_data->init;
-	clk = devm_clk_register(&pdev->dev, &cinfo->hw);
-	if (IS_ERR(clk)) {
-		ret = PTR_ERR(clk);
+	ret = devm_clk_hw_register(&pdev->dev, &cinfo->hw);
+	if (ret) {
 		dev_err(&pdev->dev, "Fail to register clock %s, %d\n",
 			match_data->desc.clk_name, ret);
 		return ret;
 	}
 
-	cinfo->clk = clk;
 	ret = palmas_clks_init_configure(cinfo);
 	if (ret < 0) {
 		dev_err(&pdev->dev, "Clock config failed, %d\n", ret);
 		return ret;
 	}
 
-	ret = of_clk_add_provider(node, of_clk_src_simple_get, cinfo->clk);
+	ret = of_clk_add_hw_provider(node, of_clk_hw_simple_get, &cinfo->hw);
 	if (ret < 0)
 		dev_err(&pdev->dev, "Fail to add clock driver, %d\n", ret);
 	return ret;

Signature · 1 line

2.7.4

Stephen Boyd

Applied

2016-08-25 00:25 UTC #55 lore raw

Re: [PATCH 22/34] clk: palmas: Migrate to clk_hw based OF and registration APIs

Quoted 9 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #56 lore raw

PATCH 23/34 clk: pwm: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Cc Janusz Uzycki <[email protected]>

Cc Philipp Zabel <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-pwm.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

drivers/clk/clk-pwm.c +4 -5

index 1630a1f085f7..8cb9d117fdbf 100644
@@ -61,7 +61,6 @@ static int clk_pwm_probe(struct platform_device *pdev)
 	struct pwm_device *pwm;
 	struct pwm_args pargs;
 	const char *clk_name;
-	struct clk *clk;
 	int ret;
 
 	clk_pwm = devm_kzalloc(&pdev->dev, sizeof(*clk_pwm), GFP_KERNEL);

@@ -107,11 +106,11 @@ static int clk_pwm_probe(struct platform_device *pdev)
 
 	clk_pwm->pwm = pwm;
 	clk_pwm->hw.init = &init;
-	clk = devm_clk_register(&pdev->dev, &clk_pwm->hw);
-	if (IS_ERR(clk))
-		return PTR_ERR(clk);
+	ret = devm_clk_hw_register(&pdev->dev, &clk_pwm->hw);
+	if (ret)
+		return ret;
 
-	return of_clk_add_provider(node, of_clk_src_simple_get, clk);
+	return of_clk_add_hw_provider(node, of_clk_hw_simple_get, &clk_pwm->hw);
 }
 
 static int clk_pwm_remove(struct platform_device *pdev)

Signature · 1 line

2.7.4

Stephen Boyd

Applied

2016-08-25 00:25 UTC #57 lore raw

Re: [PATCH 23/34] clk: pwm: Migrate to clk_hw based OF and registration APIs

Quoted 9 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #58 lore raw

PATCH 24/34 clk: rk808: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Cc Chris Zhong <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-rk808.c | 42 ++++++++++++++++++++++--------------------
 1 file changed, 22 insertions(+), 20 deletions(-)

drivers/clk/clk-rk808.c +22 ~~-20~~

index 74383039761e..f7e0dd181946 100644
@@ -26,7 +26,6 @@
 
 struct rk808_clkout {
 	struct rk808 *rk808;
-	struct clk_onecell_data clk_data;
 	struct clk_hw		clkout1_hw;
 	struct clk_hw		clkout2_hw;
 };

@@ -85,14 +84,28 @@ static const struct clk_ops rk808_clkout2_ops = {
 	.recalc_rate = rk808_clkout_recalc_rate,
 };
 
+static struct clk_hw *
+of_clk_rk808_get(struct of_phandle_args *clkspec, void *data)
+{
+	struct rk808_clkout *rk808_clkout = data;
+	unsigned int idx = clkspec->args[0];
+
+	if (idx >= 2) {
+		pr_err("%s: invalid index %u\n", __func__, idx);
+		return ERR_PTR(-EINVAL);
+	}
+
+	return idx ? &rk808_clkout->clkout2_hw : &rk808_clkout->clkout1_hw;
+}
+
 static int rk808_clkout_probe(struct platform_device *pdev)
 {
 	struct rk808 *rk808 = dev_get_drvdata(pdev->dev.parent);
 	struct i2c_client *client = rk808->i2c;
 	struct device_node *node = client->dev.of_node;
 	struct clk_init_data init = {};
-	struct clk **clk_table;
 	struct rk808_clkout *rk808_clkout;
+	int ret;
 
 	rk808_clkout = devm_kzalloc(&client->dev,
 				    sizeof(*rk808_clkout), GFP_KERNEL);

@@ -101,11 +114,6 @@ static int rk808_clkout_probe(struct platform_device *pdev)
 
 	rk808_clkout->rk808 = rk808;
 
-	clk_table = devm_kcalloc(&client->dev, RK808_NR_OUTPUT,
-				 sizeof(struct clk *), GFP_KERNEL);
-	if (!clk_table)
-		return -ENOMEM;
-
 	init.parent_names = NULL;
 	init.num_parents = 0;
 	init.name = "rk808-clkout1";

@@ -116,10 +124,9 @@ static int rk808_clkout_probe(struct platform_device *pdev)
 	of_property_read_string_index(node, "clock-output-names",
 				      0, &init.name);
 
-	clk_table[0] = devm_clk_register(&client->dev,
-					 &rk808_clkout->clkout1_hw);
-	if (IS_ERR(clk_table[0]))
-		return PTR_ERR(clk_table[0]);
+	ret = devm_clk_hw_register(&client->dev, &rk808_clkout->clkout1_hw);
+	if (ret)
+		return ret;
 
 	init.name = "rk808-clkout2";
 	init.ops = &rk808_clkout2_ops;

@@ -129,16 +136,11 @@ static int rk808_clkout_probe(struct platform_device *pdev)
 	of_property_read_string_index(node, "clock-output-names",
 				      1, &init.name);
 
-	clk_table[1] = devm_clk_register(&client->dev,
-					 &rk808_clkout->clkout2_hw);
-	if (IS_ERR(clk_table[1]))
-		return PTR_ERR(clk_table[1]);
-
-	rk808_clkout->clk_data.clks = clk_table;
-	rk808_clkout->clk_data.clk_num = RK808_NR_OUTPUT;
+	ret = devm_clk_hw_register(&client->dev, &rk808_clkout->clkout2_hw);
+	if (ret)
+		return ret;
 
-	return of_clk_add_provider(node, of_clk_src_onecell_get,
-				   &rk808_clkout->clk_data);
+	return of_clk_add_hw_provider(node, of_clk_rk808_get, &rk808_clkout);
 }
 
 static int rk808_clkout_remove(struct platform_device *pdev)

Signature · 1 line

2.7.4

Stephen Boyd

Applied

2016-08-25 00:30 UTC #59 lore raw

Re: [PATCH 24/34] clk: rk808: Migrate to clk_hw based OF and registration APIs

Quoted 8 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #60 lore raw

PATCH 25/34 clk: s2mps11: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Cc Andi Shyti <[email protected]>

Cc Krzysztof Kozlowski <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-s2mps11.c | 21 +++++++++------------
 1 file changed, 9 insertions(+), 12 deletions(-)

drivers/clk/clk-s2mps11.c +9 ~~-12~~

index f8c83977c7fa..fbaa84a33c46 100644
@@ -137,7 +137,7 @@ static int s2mps11_clk_probe(struct platform_device *pdev)
 {
 	struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
 	struct s2mps11_clk *s2mps11_clks;
-	struct clk_onecell_data *clk_data;
+	struct clk_hw_onecell_data *clk_data;
 	unsigned int s2mps11_reg;
 	int i, ret = 0;
 	enum sec_device_type hwid = platform_get_device_id(pdev)->driver_data;

@@ -147,15 +147,12 @@ static int s2mps11_clk_probe(struct platform_device *pdev)
 	if (!s2mps11_clks)
 		return -ENOMEM;
 
-	clk_data = devm_kzalloc(&pdev->dev, sizeof(*clk_data), GFP_KERNEL);
+	clk_data = devm_kzalloc(&pdev->dev, sizeof(*clk_data) +
+				sizeof(*clk_data->hws) * S2MPS11_CLKS_NUM,
+				GFP_KERNEL);
 	if (!clk_data)
 		return -ENOMEM;
 
-	clk_data->clks = devm_kcalloc(&pdev->dev, S2MPS11_CLKS_NUM,
-				sizeof(struct clk *), GFP_KERNEL);
-	if (!clk_data->clks)
-		return -ENOMEM;
-
 	switch (hwid) {
 	case S2MPS11X:
 		s2mps11_reg = S2MPS11_REG_RTC_CTRL;

@@ -196,18 +193,18 @@ static int s2mps11_clk_probe(struct platform_device *pdev)
 			goto err_reg;
 		}
 
-		s2mps11_clks[i].lookup = clkdev_create(s2mps11_clks[i].clk,
+		s2mps11_clks[i].lookup = clkdev_hw_create(&s2mps11_clks[i].hw,
 					s2mps11_clks_init[i].name, NULL);
 		if (!s2mps11_clks[i].lookup) {
 			ret = -ENOMEM;
 			goto err_reg;
 		}
-		clk_data->clks[i] = s2mps11_clks[i].clk;
+		clk_data->hws[i] = &s2mps11_clks[i].hw;
 	}
 
-	clk_data->clk_num = S2MPS11_CLKS_NUM;
-	of_clk_add_provider(s2mps11_clks->clk_np, of_clk_src_onecell_get,
-			clk_data);
+	clk_data->num = S2MPS11_CLKS_NUM;
+	of_clk_add_hw_provider(s2mps11_clks->clk_np, of_clk_hw_onecell_get,
+			       clk_data);
 
 	platform_set_drvdata(pdev, s2mps11_clks);

Signature · 1 line

2.7.4

Krzysztof Kozlowski

Reviewed-by Tested-by on v1 25/34

2016-06-03 07:18 UTC #61 lore raw

Re: [PATCH 25/34] clk: s2mps11: Migrate to clk_hw based OF and registration APIs

Quoted 8 lines · Stephen Boyd

Quoted 7 lines

Looks and works correct:

Reviewed-by Krzysztof Kozlowski <[email protected]>

Tested-by Krzysztof Kozlowski <[email protected]>

Best regards,
Krzysztof

Andi Shyti

Acked-by on v1 25/34

2016-06-08 07:22 UTC #62 lore raw

Re: [PATCH 25/34] clk: s2mps11: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Hi Stephen,

Quoted 8 lines

Quoted 7 lines

Acked-by Andi Shyti <[email protected]>

Thanks,
Andi

Stephen Boyd

Applied

2016-06-30 19:29 UTC #63 lore raw

Re: [PATCH 25/34] clk: s2mps11: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Quoted 9 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #64 lore raw

PATCH 26/34 clk: scpi: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Cc Sudeep Holla <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-scpi.c | 33 ++++++++++++++-------------------
 1 file changed, 14 insertions(+), 19 deletions(-)

drivers/clk/clk-scpi.c +14 ~~-19~~

index 6962ee5d1e9a..2a3e9d8e88b0 100644
@@ -146,13 +146,13 @@ static const struct of_device_id scpi_clk_match[] = {
 	{}
 };
 
-static struct clk *
+static int
 scpi_clk_ops_init(struct device *dev, const struct of_device_id *match,
 		  struct scpi_clk *sclk, const char *name)
 {
 	struct clk_init_data init;
-	struct clk *clk;
 	unsigned long min = 0, max = 0;
+	int ret;
 
 	init.name = name;
 	init.flags = 0;

@@ -164,18 +164,18 @@ scpi_clk_ops_init(struct device *dev, const struct of_device_id *match,
 	if (init.ops == &scpi_dvfs_ops) {
 		sclk->info = sclk->scpi_ops->dvfs_get_info(sclk->id);
 		if (IS_ERR(sclk->info))
-			return NULL;
+			return PTR_ERR(sclk->info);
 	} else if (init.ops == &scpi_clk_ops) {
 		if (sclk->scpi_ops->clk_get_range(sclk->id, &min, &max) || !max)
-			return NULL;
+			return -EINVAL;
 	} else {
-		return NULL;
+		return -EINVAL;
 	}
 
-	clk = devm_clk_register(dev, &sclk->hw);
-	if (!IS_ERR(clk) && max)
+	ret = devm_clk_hw_register(dev, &sclk->hw);
+	if (!ret && max)
 		clk_hw_set_rate_range(&sclk->hw, min, max);
-	return clk;
+	return ret;
 }
 
 struct scpi_clk_data {

@@ -183,7 +183,7 @@ struct scpi_clk_data {
 	unsigned int clk_num;
 };
 
-static struct clk *
+static struct clk_hw *
 scpi_of_clk_src_get(struct of_phandle_args *clkspec, void *data)
 {
 	struct scpi_clk *sclk;

@@ -193,7 +193,7 @@ scpi_of_clk_src_get(struct of_phandle_args *clkspec, void *data)
 	for (count = 0; count < clk_data->clk_num; count++) {
 		sclk = clk_data->clk[count];
 		if (idx == sclk->id)
-			return sclk->hw.clk;
+			return &sclk->hw;
 	}
 
 	return ERR_PTR(-EINVAL);

@@ -202,8 +202,7 @@ scpi_of_clk_src_get(struct of_phandle_args *clkspec, void *data)
 static int scpi_clk_add(struct device *dev, struct device_node *np,
 			const struct of_device_id *match)
 {
-	struct clk **clks;
-	int idx, count;
+	int idx, count, err;
 	struct scpi_clk_data *clk_data;
 
 	count = of_property_count_strings(np, "clock-output-names");

@@ -222,10 +221,6 @@ static int scpi_clk_add(struct device *dev, struct device_node *np,
 	if (!clk_data->clk)
 		return -ENOMEM;
 
-	clks = devm_kcalloc(dev, count, sizeof(*clks), GFP_KERNEL);
-	if (!clks)
-		return -ENOMEM;
-
 	for (idx = 0; idx < count; idx++) {
 		struct scpi_clk *sclk;
 		const char *name;

@@ -249,15 +244,15 @@ static int scpi_clk_add(struct device *dev, struct device_node *np,
 
 		sclk->id = val;
 
-		clks[idx] = scpi_clk_ops_init(dev, match, sclk, name);
-		if (IS_ERR_OR_NULL(clks[idx]))
+		err = scpi_clk_ops_init(dev, match, sclk, name);
+		if (err)
 			dev_err(dev, "failed to register clock '%s'\n", name);
 		else
 			dev_dbg(dev, "Registered clock '%s'\n", name);
 		clk_data->clk[idx] = sclk;
 	}
 
-	return of_clk_add_provider(np, scpi_of_clk_src_get, clk_data);
+	return of_clk_add_hw_provider(np, scpi_of_clk_src_get, clk_data);
 }
 
 static int scpi_clocks_remove(struct platform_device *pdev)

Signature · 1 line

2.7.4

Stephen Boyd

Applied

2016-08-25 00:30 UTC #65 lore raw

Re: [PATCH 26/34] clk: scpi: Migrate to clk_hw based OF and registration APIs

Quoted 8 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #66 lore raw

PATCH 27/34 clk: si514: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Cc Sebastian Hesselbarth <[email protected]>

Cc Guenter Roeck <[email protected]>

Cc S?ren Brinkmann <[email protected]>

Cc Mike Looijmans <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-si514.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

drivers/clk/clk-si514.c +5 -6

index ceef25b0990b..09b6718956bd 100644
@@ -305,7 +305,6 @@ static int si514_probe(struct i2c_client *client,
 {
 	struct clk_si514 *data;
 	struct clk_init_data init;
-	struct clk *clk;
 	int err;
 
 	data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);

@@ -330,13 +329,13 @@ static int si514_probe(struct i2c_client *client,
 
 	i2c_set_clientdata(client, data);
 
-	clk = devm_clk_register(&client->dev, &data->hw);
-	if (IS_ERR(clk)) {
+	err = devm_clk_hw_register(&client->dev, &data->hw);
+	if (err) {
 		dev_err(&client->dev, "clock registration failed\n");
-		return PTR_ERR(clk);
+		return err;
 	}
-	err = of_clk_add_provider(client->dev.of_node, of_clk_src_simple_get,
-			clk);
+	err = of_clk_add_hw_provider(client->dev.of_node, of_clk_hw_simple_get,
+				     &data->hw);
 	if (err) {
 		dev_err(&client->dev, "unable to add clk provider\n");
 		return err;

Signature · 1 line

2.7.4

Stephen Boyd

Applied

2016-08-25 00:30 UTC #67 lore raw

Re: [PATCH 27/34] clk: si514: Migrate to clk_hw based OF and registration APIs

Quoted 11 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #68 lore raw

PATCH 28/34 clk: si5351: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Cc Sebastian Hesselbarth <[email protected]>

Cc Guenter Roeck <[email protected]>

Cc S?ren Brinkmann <[email protected]>

Cc Mike Looijmans <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-si5351.c | 71 ++++++++++++++++++++++++++++--------------------
 1 file changed, 41 insertions(+), 30 deletions(-)

drivers/clk/clk-si5351.c +41 ~~-30~~

index b1bc12c045d3..b051db43fae1 100644
@@ -54,7 +54,6 @@ struct si5351_driver_data {
 	enum si5351_variant	variant;
 	struct i2c_client	*client;
 	struct regmap		*regmap;
-	struct clk_onecell_data onecell;
 
 	struct clk		*pxtal;
 	const char		*pxtal_name;

@@ -66,6 +65,7 @@ struct si5351_driver_data {
 	struct si5351_hw_data	pll[2];
 	struct si5351_hw_data	*msynth;
 	struct si5351_hw_data	*clkout;
+	size_t			num_clkout;
 };
 
 static const char * const si5351_input_names[] = {

@@ -1307,11 +1307,31 @@ put_child:
 	of_node_put(child);
 	return -EINVAL;
 }
+
+static struct clk_hw *
+si53351_of_clk_get(struct of_phandle_args *clkspec, void *data)
+{
+	struct si5351_driver_data *drvdata = data;
+	unsigned int idx = clkspec->args[0];
+
+	if (idx >= drvdata->num_clkout) {
+		pr_err("%s: invalid index %u\n", __func__, idx);
+		return ERR_PTR(-EINVAL);
+	}
+
+	return &drvdata->clkout[idx].hw;
+}
 #else
 static int si5351_dt_parse(struct i2c_client *client, enum si5351_variant variant)
 {
 	return 0;
 }
+
+static struct clk_hw *
+si53351_of_clk_get(struct of_phandle_args *clkspec, void *data)
+{
+	return NULL;
+}
 #endif /* CONFIG_OF */
 
 static int si5351_i2c_probe(struct i2c_client *client,

@@ -1321,7 +1341,6 @@ static int si5351_i2c_probe(struct i2c_client *client,
 	struct si5351_platform_data *pdata;
 	struct si5351_driver_data *drvdata;
 	struct clk_init_data init;
-	struct clk *clk;
 	const char *parent_names[4];
 	u8 num_parents, num_clocks;
 	int ret, n;

@@ -1438,10 +1457,9 @@ static int si5351_i2c_probe(struct i2c_client *client,
 		init.num_parents = 1;
 	}
 	drvdata->xtal.init = &init;
-	clk = devm_clk_register(&client->dev, &drvdata->xtal);
-	if (IS_ERR(clk)) {
+	ret = devm_clk_hw_register(&client->dev, &drvdata->xtal);
+	if (ret) {
 		dev_err(&client->dev, "unable to register %s\n", init.name);
-		ret = PTR_ERR(clk);
 		goto err_clk;
 	}

@@ -1456,11 +1474,10 @@ static int si5351_i2c_probe(struct i2c_client *client,
 			init.num_parents = 1;
 		}
 		drvdata->clkin.init = &init;
-		clk = devm_clk_register(&client->dev, &drvdata->clkin);
-		if (IS_ERR(clk)) {
+		ret = devm_clk_hw_register(&client->dev, &drvdata->clkin);
+		if (ret) {
 			dev_err(&client->dev, "unable to register %s\n",
 				init.name);
-			ret = PTR_ERR(clk);
 			goto err_clk;
 		}
 	}

@@ -1480,10 +1497,9 @@ static int si5351_i2c_probe(struct i2c_client *client,
 	init.flags = 0;
 	init.parent_names = parent_names;
 	init.num_parents = num_parents;
-	clk = devm_clk_register(&client->dev, &drvdata->pll[0].hw);
-	if (IS_ERR(clk)) {
+	ret = devm_clk_hw_register(&client->dev, &drvdata->pll[0].hw);
+	if (ret) {
 		dev_err(&client->dev, "unable to register %s\n", init.name);
-		ret = PTR_ERR(clk);
 		goto err_clk;
 	}

@@ -1505,10 +1521,9 @@ static int si5351_i2c_probe(struct i2c_client *client,
 		init.parent_names = parent_names;
 		init.num_parents = num_parents;
 	}
-	clk = devm_clk_register(&client->dev, &drvdata->pll[1].hw);
-	if (IS_ERR(clk)) {
+	ret = devm_clk_hw_register(&client->dev, &drvdata->pll[1].hw);
+	if (ret) {
 		dev_err(&client->dev, "unable to register %s\n", init.name);
-		ret = PTR_ERR(clk);
 		goto err_clk;
 	}

@@ -1524,13 +1539,9 @@ static int si5351_i2c_probe(struct i2c_client *client,
 				       sizeof(*drvdata->msynth), GFP_KERNEL);
 	drvdata->clkout = devm_kzalloc(&client->dev, num_clocks *
 				       sizeof(*drvdata->clkout), GFP_KERNEL);
+	drvdata->num_clkout = num_clocks;
 
-	drvdata->onecell.clk_num = num_clocks;
-	drvdata->onecell.clks = devm_kzalloc(&client->dev,
-		num_clocks * sizeof(*drvdata->onecell.clks), GFP_KERNEL);
-
-	if (WARN_ON(!drvdata->msynth || !drvdata->clkout ||
-		    !drvdata->onecell.clks)) {
+	if (WARN_ON(!drvdata->msynth || !drvdata->clkout)) {
 		ret = -ENOMEM;
 		goto err_clk;
 	}

@@ -1547,11 +1558,11 @@ static int si5351_i2c_probe(struct i2c_client *client,
 			init.flags |= CLK_SET_RATE_PARENT;
 		init.parent_names = parent_names;
 		init.num_parents = 2;
-		clk = devm_clk_register(&client->dev, &drvdata->msynth[n].hw);
-		if (IS_ERR(clk)) {
+		ret = devm_clk_hw_register(&client->dev,
+					   &drvdata->msynth[n].hw);
+		if (ret) {
 			dev_err(&client->dev, "unable to register %s\n",
 				init.name);
-			ret = PTR_ERR(clk);
 			goto err_clk;
 		}
 	}

@@ -1575,19 +1586,19 @@ static int si5351_i2c_probe(struct i2c_client *client,
 			init.flags |= CLK_SET_RATE_PARENT;
 		init.parent_names = parent_names;
 		init.num_parents = num_parents;
-		clk = devm_clk_register(&client->dev, &drvdata->clkout[n].hw);
-		if (IS_ERR(clk)) {
+		ret = devm_clk_hw_register(&client->dev,
+					   &drvdata->clkout[n].hw);
+		if (ret) {
 			dev_err(&client->dev, "unable to register %s\n",
 				init.name);
-			ret = PTR_ERR(clk);
 			goto err_clk;
 		}
-		drvdata->onecell.clks[n] = clk;
 
 		/* set initial clkout rate */
 		if (pdata->clkout[n].rate != 0) {
 			int ret;
-			ret = clk_set_rate(clk, pdata->clkout[n].rate);
+			ret = clk_set_rate(drvdata->clkout[n].hw.clk,
+					   pdata->clkout[n].rate);
 			if (ret != 0) {
 				dev_err(&client->dev, "Cannot set rate : %d\n",
 					ret);

@@ -1595,8 +1606,8 @@ static int si5351_i2c_probe(struct i2c_client *client,
 		}
 	}
 
-	ret = of_clk_add_provider(client->dev.of_node, of_clk_src_onecell_get,
-				  &drvdata->onecell);
+	ret = of_clk_add_hw_provider(client->dev.of_node, si53351_of_clk_get,
+				     drvdata);
 	if (ret) {
 		dev_err(&client->dev, "unable to add clk provider\n");
 		goto err_clk;

Signature · 1 line

2.7.4

Stephen Boyd

Applied

2016-08-25 00:30 UTC #69 lore raw

Re: [PATCH 28/34] clk: si5351: Migrate to clk_hw based OF and registration APIs

Quoted 11 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #70 lore raw

PATCH 29/34 clk: si570: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Cc Guenter Roeck <[email protected]>

Cc S?ren Brinkmann <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-si570.c | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

drivers/clk/clk-si570.c +6 -7

index d56648521a95..646af1d1898d 100644
@@ -408,7 +408,6 @@ static int si570_probe(struct i2c_client *client,
 {
 	struct clk_si570 *data;
 	struct clk_init_data init;
-	struct clk *clk;
 	u32 initial_fout, factory_fout, stability;
 	int err;
 	enum clk_si570_variant variant = id->driver_data;

@@ -462,13 +461,13 @@ static int si570_probe(struct i2c_client *client,
 	if (err)
 		return err;
 
-	clk = devm_clk_register(&client->dev, &data->hw);
-	if (IS_ERR(clk)) {
+	err = devm_clk_hw_register(&client->dev, &data->hw);
+	if (err) {
 		dev_err(&client->dev, "clock registration failed\n");
-		return PTR_ERR(clk);
+		return err;
 	}
-	err = of_clk_add_provider(client->dev.of_node, of_clk_src_simple_get,
-			clk);
+	err = of_clk_add_hw_provider(client->dev.of_node, of_clk_hw_simple_get,
+				     &data->hw);
 	if (err) {
 		dev_err(&client->dev, "unable to add clk provider\n");
 		return err;

@@ -477,7 +476,7 @@ static int si570_probe(struct i2c_client *client,
 	/* Read the requested initial output frequency from device tree */
 	if (!of_property_read_u32(client->dev.of_node, "clock-frequency",
 				&initial_fout)) {
-		err = clk_set_rate(clk, initial_fout);
+		err = clk_set_rate(data->hw.clk, initial_fout);
 		if (err) {
 			of_clk_del_provider(client->dev.of_node);
 			return err;

Signature · 1 line

2.7.4

Stephen Boyd

Applied

2016-08-25 00:30 UTC #71 lore raw

Re: [PATCH 29/34] clk: si570: Migrate to clk_hw based OF and registration APIs

Quoted 9 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #72 lore raw

PATCH 30/34 clk: stm32f3: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Cc Daniel Thompson <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-stm32f4.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

drivers/clk/clk-stm32f4.c +6 -6

index fd89e771107e..b6ca33f0c935 100644
@@ -136,7 +136,7 @@ static const u64 stm32f42xx_gate_map[] = { 0x000000f17ef417ffull,
 					   0x0000000000000001ull,
 					   0x04777f33f6fec9ffull };
 
-static struct clk *clks[MAX_CLKS];
+static struct clk_hw *clks[MAX_CLKS];
 static DEFINE_SPINLOCK(stm32f4_clk_lock);
 static void __iomem *base;

@@ -281,7 +281,7 @@ static int stm32f4_rcc_lookup_clk_idx(u8 primary, u8 secondary)
 	       (BIT_ULL_WORD(secondary) >= 2 ? hweight64(table[2]) : 0);
 }
 
-static struct clk *
+static struct clk_hw *
 stm32f4_rcc_lookup_clk(struct of_phandle_args *clkspec, void *data)
 {
 	int i = stm32f4_rcc_lookup_clk_idx(clkspec->args[0], clkspec->args[1]);

@@ -346,9 +346,9 @@ static void __init stm32f4_rcc_init(struct device_node *np)
 	clk_register_apb_mul(NULL, "apb2_mul", "apb2_div",
 			     CLK_SET_RATE_PARENT, 15);
 
-	clks[SYSTICK] = clk_register_fixed_factor(NULL, "systick", "ahb_div",
+	clks[SYSTICK] = clk_hw_register_fixed_factor(NULL, "systick", "ahb_div",
 						  0, 1, 8);
-	clks[FCLK] = clk_register_fixed_factor(NULL, "fclk", "ahb_div",
+	clks[FCLK] = clk_hw_register_fixed_factor(NULL, "fclk", "ahb_div",
 					       0, 1, 1);
 
 	for (n = 0; n < ARRAY_SIZE(stm32f4_gates); n++) {

@@ -360,7 +360,7 @@ static void __init stm32f4_rcc_init(struct device_node *np)
 		if (idx < 0)
 			goto fail;
 
-		clks[idx] = clk_register_gate(
+		clks[idx] = clk_hw_register_gate(
 		    NULL, gd->name, gd->parent_name, gd->flags,
 		    base + gd->offset, gd->bit_idx, 0, &stm32f4_clk_lock);

@@ -371,7 +371,7 @@ static void __init stm32f4_rcc_init(struct device_node *np)
 		}
 	}
 
-	of_clk_add_provider(np, stm32f4_rcc_lookup_clk, NULL);
+	of_clk_add_hw_provider(np, stm32f4_rcc_lookup_clk, NULL);
 	return;
 fail:
 	iounmap(base);

Signature · 1 line

2.7.4

Daniel Thompson

2016-06-06 13:48 UTC #73 lore raw

Re: [PATCH 30/34] clk: stm32f3: Migrate to clk_hw based OF and registration APIs

On 02/06/16 00:15, Stephen Boyd wrote:

Minor nit but the subject is wrong [IIRC stm32f3 cannot run Linux ;-)].

Daniel.

Quoted 7 lines

Stephen Boyd

author

2016-06-07 08:37 UTC #74 lore raw

Re: [PATCH 30/34] clk: stm32f3: Migrate to clk_hw based OF and registration APIs

Quoting Daniel Thompson (2016-06-06 06:48:01)

Quoted 4 lines · Stephen Boyd

Heh thanks. I'll fix it to be stm32f4 when applying.

Stephen Boyd

Applied

2016-06-30 19:28 UTC #75 lore raw

Re: [PATCH 30/34] clk: stm32f3: Migrate to clk_hw based OF and registration APIs

In reply to Stephen Boyd

Quoted 8 lines · Stephen Boyd

Applied to clk-next + fixed subject

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #76 lore raw

PATCH 31/34 clk: twl6040: Migrate to clk_hw based registration APIs

In reply to Stephen Boyd

Cc Peter Ujfalusi <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-twl6040.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

drivers/clk/clk-twl6040.c +4 -4

index 697c66757400..8f4c1af5fb92 100644
@@ -30,7 +30,6 @@ struct twl6040_clk {
 	struct twl6040 *twl6040;
 	struct device *dev;
 	struct clk_hw mcpdm_fclk;
-	struct clk *clk;
 	int enabled;
 };

@@ -80,6 +79,7 @@ static int twl6040_clk_probe(struct platform_device *pdev)
 {
 	struct twl6040 *twl6040 = dev_get_drvdata(pdev->dev.parent);
 	struct twl6040_clk *clkdata;
+	int ret;
 
 	clkdata = devm_kzalloc(&pdev->dev, sizeof(*clkdata), GFP_KERNEL);
 	if (!clkdata)

@@ -89,9 +89,9 @@ static int twl6040_clk_probe(struct platform_device *pdev)
 	clkdata->twl6040 = twl6040;
 
 	clkdata->mcpdm_fclk.init = &wm831x_clkout_init;
-	clkdata->clk = devm_clk_register(&pdev->dev, &clkdata->mcpdm_fclk);
-	if (IS_ERR(clkdata->clk))
-		return PTR_ERR(clkdata->clk);
+	ret = devm_clk_hw_register(&pdev->dev, &clkdata->mcpdm_fclk);
+	if (ret)
+		return ret;
 
 	platform_set_drvdata(pdev, clkdata);

Signature · 1 line

2.7.4

Stephen Boyd

Applied

2016-08-25 00:34 UTC #77 lore raw

Re: [PATCH 31/34] clk: twl6040: Migrate to clk_hw based registration APIs

Quoted 8 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #78 lore raw

PATCH 32/34 clk: u300: Migrate to clk_hw based registration APIs

In reply to Stephen Boyd

Cc Linus Walleij <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-u300.c | 59 ++++++++++++++++++++++++++++----------------------
 1 file changed, 33 insertions(+), 26 deletions(-)

drivers/clk/clk-u300.c +33 ~~-26~~

index 95d1742dac30..ec8aafda6e24 100644
@@ -689,7 +689,7 @@ static const struct clk_ops syscon_clk_ops = {
 	.set_rate = syscon_clk_set_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 syscon_clk_register(struct device *dev, const char *name,
 		    const char *parent_name, unsigned long flags,
 		    bool hw_ctrld,

@@ -697,9 +697,10 @@ syscon_clk_register(struct device *dev, const char *name,
 		    void __iomem *en_reg, u8 en_bit,
 		    u16 clk_val)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	struct clk_syscon *sclk;
 	struct clk_init_data init;
+	int ret;
 
 	sclk = kzalloc(sizeof(struct clk_syscon), GFP_KERNEL);
 	if (!sclk) {

@@ -722,11 +723,14 @@ syscon_clk_register(struct device *dev, const char *name,
 	sclk->en_bit = en_bit;
 	sclk->clk_val = clk_val;
 
-	clk = clk_register(dev, &sclk->hw);
-	if (IS_ERR(clk))
+	hw = &sclk->hw;
+	ret = clk_hw_register(dev, hw);
+	if (ret) {
 		kfree(sclk);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 #define U300_CLK_TYPE_SLOW 0

@@ -868,7 +872,7 @@ static struct u300_clock const u300_clk_lookup[] __initconst = {
 
 static void __init of_u300_syscon_clk_init(struct device_node *np)
 {
-	struct clk *clk = ERR_PTR(-EINVAL);
+	struct clk_hw *hw = ERR_PTR(-EINVAL);
 	const char *clk_name = np->name;
 	const char *parent_name;
 	void __iomem *res_reg;

@@ -911,16 +915,15 @@ static void __init of_u300_syscon_clk_init(struct device_node *np)
 		const struct u300_clock *u3clk = &u300_clk_lookup[i];
 
 		if (u3clk->type == clk_type && u3clk->id == clk_id)
-			clk = syscon_clk_register(NULL,
-						  clk_name, parent_name,
-						  0, u3clk->hw_ctrld,
-						  res_reg, u3clk->id,
-						  en_reg, u3clk->id,
-						  u3clk->clk_val);
+			hw = syscon_clk_register(NULL, clk_name, parent_name,
+						 0, u3clk->hw_ctrld,
+						 res_reg, u3clk->id,
+						 en_reg, u3clk->id,
+						 u3clk->clk_val);
 	}
 
-	if (!IS_ERR(clk)) {
-		of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	if (!IS_ERR(hw)) {
+		of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 
 		/*
 		 * Some few system clocks - device tree does not

@@ -928,11 +931,11 @@ static void __init of_u300_syscon_clk_init(struct device_node *np)
 		 * for now we add these three clocks here.
 		 */
 		if (clk_type == U300_CLK_TYPE_REST && clk_id == 5)
-			clk_register_clkdev(clk, NULL, "pl172");
+			clk_hw_register_clkdev(hw, NULL, "pl172");
 		if (clk_type == U300_CLK_TYPE_REST && clk_id == 9)
-			clk_register_clkdev(clk, NULL, "semi");
+			clk_hw_register_clkdev(hw, NULL, "semi");
 		if (clk_type == U300_CLK_TYPE_REST && clk_id == 12)
-			clk_register_clkdev(clk, NULL, "intcon");
+			clk_hw_register_clkdev(hw, NULL, "intcon");
 	}
 }

@@ -1111,13 +1114,14 @@ static const struct clk_ops mclk_ops = {
 	.set_rate = mclk_clk_set_rate,
 };
 
-static struct clk * __init
+static struct clk_hw * __init
 mclk_clk_register(struct device *dev, const char *name,
 		  const char *parent_name, bool is_mspro)
 {
-	struct clk *clk;
+	struct clk_hw *hw;
 	struct clk_mclk *mclk;
 	struct clk_init_data init;
+	int ret;
 
 	mclk = kzalloc(sizeof(struct clk_mclk), GFP_KERNEL);
 	if (!mclk) {

@@ -1133,23 +1137,26 @@ mclk_clk_register(struct device *dev, const char *name,
 	mclk->hw.init = &init;
 	mclk->is_mspro = is_mspro;
 
-	clk = clk_register(dev, &mclk->hw);
-	if (IS_ERR(clk))
+	hw = &mclk->hw;
+	ret = clk_hw_register(dev, hw);
+	if (ret) {
 		kfree(mclk);
+		hw = ERR_PTR(ret);
+	}
 
-	return clk;
+	return hw;
 }
 
 static void __init of_u300_syscon_mclk_init(struct device_node *np)
 {
-	struct clk *clk = ERR_PTR(-EINVAL);
+	struct clk_hw *hw;
 	const char *clk_name = np->name;
 	const char *parent_name;
 
 	parent_name = of_clk_get_parent_name(np, 0);
-	clk = mclk_clk_register(NULL, clk_name, parent_name, false);
-	if (!IS_ERR(clk))
-		of_clk_add_provider(np, of_clk_src_simple_get, clk);
+	hw = mclk_clk_register(NULL, clk_name, parent_name, false);
+	if (!IS_ERR(hw))
+		of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 }
 
 static const struct of_device_id u300_clk_match[] __initconst = {

Signature · 1 line

2.7.4

Linus Walleij

Acked-by on v1 32/34

2016-06-02 12:06 UTC #79 lore raw

Re: [PATCH 32/34] clk: u300: Migrate to clk_hw based registration APIs

Quoted 7 lines · Stephen Boyd

Acked-by Linus Walleij <[email protected]>

Yours,
Linus Walleij

Stephen Boyd

Applied

2016-06-30 19:26 UTC #80 lore raw

Re: [PATCH 32/34] clk: u300: Migrate to clk_hw based registration APIs

In reply to Stephen Boyd

Quoted 8 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #81 lore raw

PATCH 33/34 clk: vt8500: Migrate to clk_hw based registration APIs

In reply to Stephen Boyd

Cc Sebastian Hesselbarth <[email protected]>

Cc Tony Prisk <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-vt8500.c | 22 ++++++++++++----------
 1 file changed, 12 insertions(+), 10 deletions(-)

drivers/clk/clk-vt8500.c +12 ~~-10~~

index b0f76a84f1e9..ed583bedef05 100644
@@ -232,7 +232,7 @@ static const struct clk_ops vt8500_gated_divisor_clk_ops = {
 static __init void vtwm_device_clk_init(struct device_node *node)
 {
 	u32 en_reg, div_reg;
-	struct clk *clk;
+	struct clk_hw *hw;
 	struct clk_device *dev_clk;
 	const char *clk_name = node->name;
 	const char *parent_name;

@@ -301,13 +301,14 @@ static __init void vtwm_device_clk_init(struct device_node *node)
 
 	dev_clk->hw.init = &init;
 
-	clk = clk_register(NULL, &dev_clk->hw);
-	if (WARN_ON(IS_ERR(clk))) {
+	hw = &dev_clk->hw;
+	rc = clk_hw_register(NULL, hw);
+	if (WARN_ON(rc)) {
 		kfree(dev_clk);
 		return;
 	}
-	rc = of_clk_add_provider(node, of_clk_src_simple_get, clk);
-	clk_register_clkdev(clk, clk_name, NULL);
+	rc = of_clk_add_hw_provider(node, of_clk_hw_simple_get, hw);
+	clk_hw_register_clkdev(hw, clk_name, NULL);
 }
 CLK_OF_DECLARE(vt8500_device, "via,vt8500-device-clock", vtwm_device_clk_init);

@@ -692,7 +693,7 @@ static const struct clk_ops vtwm_pll_ops = {
 static __init void vtwm_pll_clk_init(struct device_node *node, int pll_type)
 {
 	u32 reg;
-	struct clk *clk;
+	struct clk_hw *hw;
 	struct clk_pll *pll_clk;
 	const char *clk_name = node->name;
 	const char *parent_name;

@@ -725,13 +726,14 @@ static __init void vtwm_pll_clk_init(struct device_node *node, int pll_type)
 
 	pll_clk->hw.init = &init;
 
-	clk = clk_register(NULL, &pll_clk->hw);
-	if (WARN_ON(IS_ERR(clk))) {
+	hw = &pll_clk->hw;
+	rc = clk_hw_register(NULL, &pll_clk->hw);
+	if (WARN_ON(rc)) {
 		kfree(pll_clk);
 		return;
 	}
-	rc = of_clk_add_provider(node, of_clk_src_simple_get, clk);
-	clk_register_clkdev(clk, clk_name, NULL);
+	rc = of_clk_add_hw_provider(node, of_clk_hw_simple_get, hw);
+	clk_hw_register_clkdev(hw, clk_name, NULL);
 }

Signature · 1 line

2.7.4

Stephen Boyd

Applied

2016-08-25 00:36 UTC #82 lore raw

Re: [PATCH 33/34] clk: vt8500: Migrate to clk_hw based registration APIs

Quoted 9 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Stephen Boyd

author

2016-06-01 23:15 UTC #83 lore raw

PATCH 34/34 clk: wm831x: Migrate to clk_hw based registration APIs

In reply to Stephen Boyd

Cc Mark Brown <[email protected]>

Signed-off-by Stephen Boyd <[email protected]>

---

See commit 58657d189a2f and it's children for details on this new registration API.

 drivers/clk/clk-wm831x.c | 21 +++++++++------------
 1 file changed, 9 insertions(+), 12 deletions(-)

drivers/clk/clk-wm831x.c +9 ~~-12~~

index 88def4b2761c..f4fdac55727c 100644
@@ -24,9 +24,6 @@ struct wm831x_clk {
 	struct clk_hw xtal_hw;
 	struct clk_hw fll_hw;
 	struct clk_hw clkout_hw;
-	struct clk *xtal;
-	struct clk *fll;
-	struct clk *clkout;
 	bool xtal_ena;
 };

@@ -370,19 +367,19 @@ static int wm831x_clk_probe(struct platform_device *pdev)
 	clkdata->xtal_ena = ret & WM831X_XTAL_ENA;
 
 	clkdata->xtal_hw.init = &wm831x_xtal_init;
-	clkdata->xtal = devm_clk_register(&pdev->dev, &clkdata->xtal_hw);
-	if (IS_ERR(clkdata->xtal))
-		return PTR_ERR(clkdata->xtal);
+	ret = devm_clk_hw_register(&pdev->dev, &clkdata->xtal_hw);
+	if (ret)
+		return ret;
 
 	clkdata->fll_hw.init = &wm831x_fll_init;
-	clkdata->fll = devm_clk_register(&pdev->dev, &clkdata->fll_hw);
-	if (IS_ERR(clkdata->fll))
-		return PTR_ERR(clkdata->fll);
+	ret = devm_clk_hw_register(&pdev->dev, &clkdata->fll_hw);
+	if (ret)
+		return ret;
 
 	clkdata->clkout_hw.init = &wm831x_clkout_init;
-	clkdata->clkout = devm_clk_register(&pdev->dev, &clkdata->clkout_hw);
-	if (IS_ERR(clkdata->clkout))
-		return PTR_ERR(clkdata->clkout);
+	ret = devm_clk_hw_register(&pdev->dev, &clkdata->clkout_hw);
+	if (ret)
+		return ret;
 
 	platform_set_drvdata(pdev, clkdata);

Signature · 1 line

2.7.4

Stephen Boyd

Applied

2016-08-25 00:36 UTC #84 lore raw

Re: [PATCH 34/34] clk: wm831x: Migrate to clk_hw based registration APIs

Quoted 8 lines · Stephen Boyd

Applied to clk-next

Signature · 2 lines

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project