ARM: dts: sun7i: BPI-M1+ and Lamobo-R1 fixes

PATCH In review Chen-Yu Tsai 3 participants 13 messages Jul 6, 2016 – Nov 20, 2016 1 message not in the archive

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Chen-Yu Tsai

author

2016-07-06 09:10 UTC #0 lore raw

cover ARM: dts: sun7i: BPI-M1+ and Lamobo-R1 fixes

Hi Maxime,

These are a bunch of fixes I did to get my boards running. Some of them are cleanups, while others enable hardware that we already support on other boards, such as USB or the audio codec.

Regards
ChenYu

Chen-Yu Tsai (9):
ARM: dts: sun7i: lamobo-r1: Fix USB-based WiFi module power
ARM: dts: sun7i: lamobo-r1: Remove usb1 vbus regulator
ARM: dts: sun7i: lamobo-r1: Fix GPIO flags in reg_ahci_5v
ARM: dts: sun7i: lamobo-r1: Enable audio codec
ARM: dts: sun7i: bananapi-m1-plus: Reindent whole file using tabs
ARM: dts: sun7i: bananapi-m1-plus: Unify suffix for board specific
labels
ARM: dts: sun7i: bananapi-m1-plus: red LED is power LED
ARM: dts: sun7i: bananapi-m1-plus: Add PMIC regulators and OPPs for
cpufreq
ARM: dts: sun7i: bananapi-m1-plus: Enable USB OTG

 arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts | 342 ++++++++++++++---------
 arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts        |  20 +-
 2 files changed, 218 insertions(+), 144 deletions(-)

Signature · 1 line

2.8.1

Chen-Yu Tsai

author

2016-07-06 09:10 UTC #1 lore raw

PATCH 1/9 ARM: dts: sun7i: lamobo-r1: Fix USB-based WiFi module power

On the Lamobo R1, USB2 is connected to the RTL8192CU WiFi module. The power enable pin is connected to PH12.

Fix the enable pin the reg_usb2_vbus.

Also disable ohci1, as the WiFi module is USB 2.0 capable.

Signed-off-by Chen-Yu Tsai <[email protected]>

---
 arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts +5 -4

index fbca93406e1b..285142882a80 100644
@@ -212,10 +212,6 @@
 	status = "okay";
 };
 
-&ohci1 {
-	status = "okay";
-};
-
 &otg_sram {
 	status = "okay";
 };

@@ -291,6 +287,7 @@
 };
 
 &reg_usb2_vbus {
+	gpio = <&pio 7 12 GPIO_ACTIVE_HIGH>; /* PH12 */
 	status = "okay";
 };

@@ -329,6 +326,10 @@
 	status = "okay";
 };
 
+&usb2_vbus_pin_a {
+	allwinner,pins = "PH12";
+};
+
 &usbphy {
 	pinctrl-names = "default";
 	pinctrl-0 = <&usb0_id_detect_pin>;

Signature · 1 line

2.8.1

Chen-Yu Tsai

author

2016-07-06 09:10 UTC #2 lore raw

PATCH 2/9 ARM: dts: sun7i: lamobo-r1: Remove usb1 vbus regulator

In reply to Chen-Yu Tsai

USB1 VBUS is directly tied to the 5V rail on the board. It is not individually controllable. Drop the regulator.

Signed-off-by Chen-Yu Tsai <[email protected]>

---
 arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts | 5 -----
 1 file changed, 5 deletions(-)

arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts +0 -5

index 285142882a80..7307f07f82bd 100644
@@ -282,10 +282,6 @@
 	status = "okay";
 };
 
-&reg_usb1_vbus {
-	status = "okay";
-};
-
 &reg_usb2_vbus {
 	gpio = <&pio 7 12 GPIO_ACTIVE_HIGH>; /* PH12 */
 	status = "okay";

@@ -336,7 +332,6 @@
 	usb0_id_det-gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
 	usb0_vbus_power-supply = <&usb_power_supply>;
 	usb0_vbus-supply = <&reg_usb0_vbus>;
-	usb1_vbus-supply = <&reg_usb1_vbus>;
 	usb2_vbus-supply = <&reg_usb2_vbus>;
 	status = "okay";
 };

Signature · 1 line

2.8.1

Chen-Yu Tsai

author

2016-07-06 09:10 UTC #3 lore raw

PATCH 3/9 ARM: dts: sun7i: lamobo-r1: Fix GPIO flags in reg_ahci_5v

In reply to Chen-Yu Tsai

reg_ahci_5v uses a GPIO in active high mode. Use the proper macro, instead of just 0 for the GPIO flags.

Signed-off-by Chen-Yu Tsai <[email protected]>

---
 arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts +1 -1

index 7307f07f82bd..c5126a9c35fc 100644
@@ -249,7 +249,7 @@
 #include "axp209.dtsi"
 
 &reg_ahci_5v {
-	gpio = <&pio 1 3 0>; /* PB3 */
+	gpio = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
 	status = "okay";
 };

Signature · 1 line

2.8.1

Chen-Yu Tsai

author

2016-07-06 09:10 UTC #4 lore raw

PATCH 4/9 ARM: dts: sun7i: lamobo-r1: Enable audio codec

In reply to Chen-Yu Tsai

Lamobo R1 has a headphone jack for audio output, and an onboard microphone. These are tied to the SoC's internal audio codec.

Enable the audio codec.

Signed-off-by Chen-Yu Tsai <[email protected]>

---
 arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts | 4 ++++
 1 file changed, 4 insertions(+)

arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts +4 -0

index c5126a9c35fc..73c05dab0a69 100644
@@ -95,6 +95,10 @@
 	status = "okay";
 };
 
+&codec {
+	status = "okay";
+};
+
 &cpu0 {
 	cpu-supply = <&reg_dcdc2>;
 };

Signature · 1 line

2.8.1

Chen-Yu Tsai

author

2016-07-06 09:10 UTC #5 lore raw

PATCH 5/9 ARM: dts: sun7i: bananapi-m1-plus: Reindent whole file using tabs

In reply to Chen-Yu Tsai

The bananapi-m1-plus dts file was indented using 4 spaces, without tabs. This does not match the code style.

Reindent the whole file before we do anything else.

Signed-off-by Chen-Yu Tsai <[email protected]>

---
 arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts | 272 +++++++++++------------
 1 file changed, 136 insertions(+), 136 deletions(-)

arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts +136 ~~-136~~

index 89e38e9e0be6..edfb5b37939e 100644
@@ -49,182 +49,182 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
 / {
-    model = "Banana Pi BPI-M1-Plus";
-    compatible = "sinovoip,bpi-m1-plus", "allwinner,sun7i-a20";
-
-    aliases {
-        serial0 = &uart0;
-    };
-
-    chosen {
-        stdout-path = "serial0:115200n8";
-    };
-
-    leds {
-        compatible = "gpio-leds";
-        pinctrl-names = "default";
-        pinctrl-0 = <&led_pins_bananapi>;
-
-        green {
-            label = "bananapi-m1-plus:green:usr";
-            gpios = <&pio 7 24 GPIO_ACTIVE_HIGH>;
-        };
-
-        red {
-            label = "bananapi-m1-plus:red:usr";
-            gpios = <&pio 7 25 GPIO_ACTIVE_HIGH>;
-            linux,default-trigger = "default-on";
-        };
-
-    };
-
-    mmc3_pwrseq: mmc3_pwrseq {
-        compatible = "mmc-pwrseq-simple";
-        pinctrl-names = "default";
-        pinctrl-0 = <&mmc3_pwrseq_pin_bananapim1plus>;
-        reset-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 WL-PMU-EN */
-    };
-
-    reg_gmac_3v3: gmac-3v3 {
-        compatible = "regulator-fixed";
-        pinctrl-names = "default";
-        pinctrl-0 = <&gmac_power_pin_bananapi>;
-        regulator-name = "gmac-3v3";
-        regulator-min-microvolt = <3300000>;
-        regulator-max-microvolt = <3300000>;
-        startup-delay-us = <100000>;
-        enable-active-high;
-        gpio = <&pio 7 23 GPIO_ACTIVE_HIGH>;
-    };
+	model = "Banana Pi BPI-M1-Plus";
+	compatible = "sinovoip,bpi-m1-plus", "allwinner,sun7i-a20";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&led_pins_bananapi>;
+
+		green {
+			label = "bananapi-m1-plus:green:usr";
+			gpios = <&pio 7 24 GPIO_ACTIVE_HIGH>;
+		};
+
+		red {
+			label = "bananapi-m1-plus:red:usr";
+			gpios = <&pio 7 25 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "default-on";
+		};
+
+	};
+
+	mmc3_pwrseq: mmc3_pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		pinctrl-names = "default";
+		pinctrl-0 = <&mmc3_pwrseq_pin_bananapim1plus>;
+		reset-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 WL-PMU-EN */
+	};
+
+	reg_gmac_3v3: gmac-3v3 {
+		compatible = "regulator-fixed";
+		pinctrl-names = "default";
+		pinctrl-0 = <&gmac_power_pin_bananapi>;
+		regulator-name = "gmac-3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		startup-delay-us = <100000>;
+		enable-active-high;
+		gpio = <&pio 7 23 GPIO_ACTIVE_HIGH>;
+	};
 };
 
 &ahci {
-    status = "okay";
+	status = "okay";
 };
 
 &codec {
-    status = "okay";
+	status = "okay";
 };
 
 &ehci0 {
-    status = "okay";
+	status = "okay";
 };
 
 &ehci1 {
-    status = "okay";
+	status = "okay";
 };
 
 &gmac {
-    pinctrl-names = "default";
-    pinctrl-0 = <&gmac_pins_rgmii_a>;
-    phy = <&phy1>;
-    phy-mode = "rgmii";
-    phy-supply = <&reg_gmac_3v3>;
-    status = "okay";
-
-    phy1: ethernet-phy at 1 {
-        reg = <1>;
-    };
+	pinctrl-names = "default";
+	pinctrl-0 = <&gmac_pins_rgmii_a>;
+	phy = <&phy1>;
+	phy-mode = "rgmii";
+	phy-supply = <&reg_gmac_3v3>;
+	status = "okay";
+
+	phy1: ethernet-phy at 1 {
+		reg = <1>;
+	};
 };
 
 &i2c0 {
-    pinctrl-names = "default";
-    pinctrl-0 = <&i2c0_pins_a>;
-    status = "okay";
-
-    axp209: pmic at 34 {
-        compatible = "x-powers,axp209";
-        reg = <0x34>;
-        interrupt-parent = <&nmi_intc>;
-        interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
-
-        interrupt-controller;
-        #interrupt-cells = <1>;
-    };
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c0_pins_a>;
+	status = "okay";
+
+	axp209: pmic at 34 {
+		compatible = "x-powers,axp209";
+		reg = <0x34>;
+		interrupt-parent = <&nmi_intc>;
+		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
 };
 
 &ir0 {
-    pinctrl-names = "default";
-    pinctrl-0 = <&ir0_rx_pins_a>;
-    status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&ir0_rx_pins_a>;
+	status = "okay";
 };
 
 &mmc0 {
-    pinctrl-names = "default";
-    pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bananapi>;
-    vmmc-supply = <&reg_vcc3v3>;
-    bus-width = <4>;
-    cd-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */
-    cd-inverted;
-    status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bananapi>;
+	vmmc-supply = <&reg_vcc3v3>;
+	bus-width = <4>;
+	cd-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */
+	cd-inverted;
+	status = "okay";
 };
 
 &mmc3 {
-    #address-cells = <1>;
-    #size-cells = <0>;
-    pinctrl-names = "default";
-    pinctrl-0 = <&mmc3_pins_a>;
-    vmmc-supply = <&reg_vcc3v3>;
-    mmc-pwrseq = <&mmc3_pwrseq>;
-    bus-width = <4>;
-    non-removable;
-    enable-sdio-wakeup;
-    status = "okay";
-
-    brcmf: bcrmf at 1 {
-        reg = <1>;
-        compatible = "brcm,bcm4329-fmac";
-        interrupt-parent = <&pio>;
-        interrupts = <7 15 IRQ_TYPE_LEVEL_LOW>;
-        interrupt-names = "host-wake";
-    };
+	#address-cells = <1>;
+	#size-cells = <0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc3_pins_a>;
+	vmmc-supply = <&reg_vcc3v3>;
+	mmc-pwrseq = <&mmc3_pwrseq>;
+	bus-width = <4>;
+	non-removable;
+	enable-sdio-wakeup;
+	status = "okay";
+
+	brcmf: bcrmf at 1 {
+		reg = <1>;
+		compatible = "brcm,bcm4329-fmac";
+		interrupt-parent = <&pio>;
+		interrupts = <7 15 IRQ_TYPE_LEVEL_LOW>;
+		interrupt-names = "host-wake";
+	};
 };
 
 &mmc3_pins_a {
-    /* AP6210 requires pull-up */
-    allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+	/* AP6210 requires pull-up */
+	allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
 };
 
 &ohci0 {
-    status = "okay";
+	status = "okay";
 };
 
 &ohci1 {
-    status = "okay";
+	status = "okay";
 };
 
 &pio {
-    gmac_power_pin_bananapi: gmac_power_pin at 0 {
-        allwinner,pins = "PH23";
-        allwinner,function = "gpio_out";
-        allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-        allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-    };
-
-    led_pins_bananapi: led_pins at 0 {
-        allwinner,pins = "PH24", "PG2";
-        allwinner,function = "gpio_out";
-        allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-        allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-    };
-
-    mmc0_cd_pin_bananapi: mmc0_cd_pin at 0 {
-        allwinner,pins = "PH10";
-        allwinner,function = "gpio_in";
-        allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-        allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
-    };
-
-    mmc3_pwrseq_pin_bananapim1plus: mmc3_pwrseq_pin at 0 {
-        allwinner,pins = "PH22";
-        allwinner,function = "gpio_out";
-        allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-        allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-    };
+	gmac_power_pin_bananapi: gmac_power_pin at 0 {
+		allwinner,pins = "PH23";
+		allwinner,function = "gpio_out";
+		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+	};
+
+	led_pins_bananapi: led_pins at 0 {
+		allwinner,pins = "PH24", "PG2";
+		allwinner,function = "gpio_out";
+		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+	};
+
+	mmc0_cd_pin_bananapi: mmc0_cd_pin at 0 {
+		allwinner,pins = "PH10";
+		allwinner,function = "gpio_in";
+		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+	};
+
+	mmc3_pwrseq_pin_bananapim1plus: mmc3_pwrseq_pin at 0 {
+		allwinner,pins = "PH22";
+		allwinner,function = "gpio_out";
+		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+	};
 };
 
 &uart0 {
-    pinctrl-names = "default";
-    pinctrl-0 = <&uart0_pins_a>;
-    status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pins_a>;
+	status = "okay";
 };

Signature · 1 line

2.8.1

Chen-Yu Tsai

author

2016-07-06 09:10 UTC #6 lore raw

PATCH 6/9 ARM: dts: sun7i: bananapi-m1-plus: Unify suffix for board specific labels

In reply to Chen-Yu Tsai

The dts file uses "bananapi" for some labels and "bananapim1plus" for other. Use the shortened "bpi_m1p" suffix for all board specific labels.

Signed-off-by Chen-Yu Tsai <[email protected]>

---
 arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts +8 -8

index edfb5b37939e..14fb463758e4 100644
@@ -63,7 +63,7 @@
 	leds {
 		compatible = "gpio-leds";
 		pinctrl-names = "default";
-		pinctrl-0 = <&led_pins_bananapi>;
+		pinctrl-0 = <&led_pins_bpi_m1p>;
 
 		green {
 			label = "bananapi-m1-plus:green:usr";

@@ -81,14 +81,14 @@
 	mmc3_pwrseq: mmc3_pwrseq {
 		compatible = "mmc-pwrseq-simple";
 		pinctrl-names = "default";
-		pinctrl-0 = <&mmc3_pwrseq_pin_bananapim1plus>;
+		pinctrl-0 = <&mmc3_pwrseq_pin_bpi_m1p>;
 		reset-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 WL-PMU-EN */
 	};
 
 	reg_gmac_3v3: gmac-3v3 {
 		compatible = "regulator-fixed";
 		pinctrl-names = "default";
-		pinctrl-0 = <&gmac_power_pin_bananapi>;
+		pinctrl-0 = <&gmac_power_pin_bpi_m1p>;
 		regulator-name = "gmac-3v3";
 		regulator-min-microvolt = <3300000>;
 		regulator-max-microvolt = <3300000>;

@@ -151,7 +151,7 @@
 
 &mmc0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bananapi>;
+	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bpi_m1p>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	cd-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */

@@ -194,28 +194,28 @@
 };
 
 &pio {
-	gmac_power_pin_bananapi: gmac_power_pin at 0 {
+	gmac_power_pin_bpi_m1p: gmac_power_pin at 0 {
 		allwinner,pins = "PH23";
 		allwinner,function = "gpio_out";
 		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
 		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
 	};
 
-	led_pins_bananapi: led_pins at 0 {
+	led_pins_bpi_m1p: led_pins at 0 {
 		allwinner,pins = "PH24", "PG2";
 		allwinner,function = "gpio_out";
 		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
 		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
 	};
 
-	mmc0_cd_pin_bananapi: mmc0_cd_pin at 0 {
+	mmc0_cd_pin_bpi_m1p: mmc0_cd_pin at 0 {
 		allwinner,pins = "PH10";
 		allwinner,function = "gpio_in";
 		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
 		allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
 	};
 
-	mmc3_pwrseq_pin_bananapim1plus: mmc3_pwrseq_pin at 0 {
+	mmc3_pwrseq_pin_bpi_m1p: mmc3_pwrseq_pin at 0 {
 		allwinner,pins = "PH22";
 		allwinner,function = "gpio_out";
 		allwinner,drive = <SUN4I_PINCTRL_10_MA>;

Signature · 1 line

2.8.1

Chen-Yu Tsai

author

2016-07-06 09:10 UTC #7 lore raw

PATCH 7/9 ARM: dts: sun7i: bananapi-m1-plus: red LED is power LED

In reply to Chen-Yu Tsai

The red led on the Bananapi M1+ is wired to light up as soon as the board is powered, and continues to be lit while the GPIO is floating.

Rename the LED to "pwr", remove the default trigger, and mark it as default on.

Also fix the pinmux node that was specifying a different pin for this LED.

Signed-off-by Chen-Yu Tsai <[email protected]>

---
 arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts +4 -5

index 14fb463758e4..ba5bca0fe997 100644
@@ -70,12 +70,11 @@
 			gpios = <&pio 7 24 GPIO_ACTIVE_HIGH>;
 		};
 
-		red {
-			label = "bananapi-m1-plus:red:usr";
+		pwr {
+			label = "bananapi-m1-plus:pwr:usr";
 			gpios = <&pio 7 25 GPIO_ACTIVE_HIGH>;
-			linux,default-trigger = "default-on";
+			default-state = "on";
 		};
-
 	};
 
 	mmc3_pwrseq: mmc3_pwrseq {

@@ -202,7 +201,7 @@
 	};
 
 	led_pins_bpi_m1p: led_pins at 0 {
-		allwinner,pins = "PH24", "PG2";
+		allwinner,pins = "PH24", "PH25";
 		allwinner,function = "gpio_out";
 		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
 		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;

Signature · 1 line

2.8.1

Chen-Yu Tsai

author

2016-07-06 09:10 UTC #8 lore raw

PATCH 8/9 ARM: dts: sun7i: bananapi-m1-plus: Add PMIC regulators and OPPs for cpufreq

In reply to Chen-Yu Tsai

The Bananapi M1+, like other Allwinner A20 based boards, uses the AXP209 PMIC to supply its power. The vendor FEX file's DVFS table suggests the board's CPU power rail has a voltage drop of 25 ~ 50 mV.

Add the PMIC regulator nodes and copy the DVFS table from the FEX file.

Signed-off-by Chen-Yu Tsai <[email protected]>

---
 arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts | 48 ++++++++++++++++++++++--
 1 file changed, 44 insertions(+), 4 deletions(-)

arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts +44 -4

index ba5bca0fe997..7bb418bd1b6e 100644
@@ -105,6 +105,22 @@
 	status = "okay";
 };
 
+&cpu0 {
+	cpu-supply = <&reg_dcdc2>;
+
+	/* The custom DVFS table suggests a voltage drop of 25 ~ 50 mV */
+	operating-points = <
+		/* kHz    uV */
+		1080000	1450000
+		912000	1425000
+		864000	1350000
+		720000	1250000
+		528000	1150000
+		312000	1100000
+		144000	1050000
+		>;
+};
+
 &ehci0 {
 	status = "okay";
 };

@@ -132,13 +148,9 @@
 	status = "okay";
 
 	axp209: pmic at 34 {
-		compatible = "x-powers,axp209";
 		reg = <0x34>;
 		interrupt-parent = <&nmi_intc>;
 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
-
-		interrupt-controller;
-		#interrupt-cells = <1>;
 	};
 };

@@ -222,6 +234,34 @@
 	};
 };
 
+#include "axp209.dtsi"
+
+&reg_dcdc2 {
+	/* The custom DVFS table suggests a voltage drop of 25 ~ 50 mV */
+	regulator-always-on;
+	regulator-min-microvolt = <1050000>;
+	regulator-max-microvolt = <1450000>;
+	regulator-name = "vdd-cpu";
+};
+
+&reg_dcdc3 {
+	regulator-always-on;
+	regulator-min-microvolt = <1000000>;
+	regulator-max-microvolt = <1400000>;
+	regulator-name = "vdd-int-dll";
+};
+
+&reg_ldo1 {
+	regulator-name = "vdd-rtc";
+};
+
+&reg_ldo2 {
+	regulator-always-on;
+	regulator-min-microvolt = <3000000>;
+	regulator-max-microvolt = <3000000>;
+	regulator-name = "avcc";
+};
+
 &uart0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart0_pins_a>;

Signature · 1 line

2.8.1

Maxime Ripard

2016-07-09 08:18 UTC #9 lore raw

PATCH 8/9 ARM: dts: sun7i: bananapi-m1-plus: Add PMIC regulators and OPPs for cpufreq

Hi,

Quoted 25 lines · Chen-Yu Tsai

The Bananapi M1+, like other Allwinner A20 based boards, uses the AXP209 PMIC to supply its power. The vendor FEX file's DVFS table suggests the board's CPU power rail has a voltage drop of 25 ~ 50 mV.
Add the PMIC regulator nodes and copy the DVFS table from the FEX file.
Signed-off-by Chen-Yu Tsai <[email protected]>
---
 arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts | 48 ++++++++++++++++++++++--
 1 file changed, 44 insertions(+), 4 deletions(-)
arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts +6 -0
index ba5bca0fe997..7bb418bd1b6e 100644
@@ -105,6 +105,22 @@
 	status = "okay";
 };
 
+&cpu0 {
+	cpu-supply = <&reg_dcdc2>;
+
+	/* The custom DVFS table suggests a voltage drop of 25 ~ 50 mV */
+	operating-points = <
+		/* kHz    uV */

arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts line 123

Quoted 10 lines

arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts +10 -0

+		1080000	1450000
+		912000	1425000
+		864000	1350000
+		720000	1250000
+		528000	1150000
+		312000	1100000
+		144000	1050000
+		>;
+};
+

We've always tried to not use all the non-sense OPPs coming from the FEX files. Have you experienced any issues with the default ones?

The other patches have been queued either for 4.8 as fixes, or 4.9.

Thanks!
Maxime

Signature · 10 lines

Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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Chen-Yu Tsai

author

2016-07-12 02:12 UTC #10 lore raw

PATCH 8/9 ARM: dts: sun7i: bananapi-m1-plus: Add PMIC regulators and OPPs for cpufreq

Hi,

Quoted 33 lines · Maxime Ripard

Hi,
Quoted 30 lines · Chen-Yu Tsai
The Bananapi M1+, like other Allwinner A20 based boards, uses the AXP209 PMIC to supply its power. The vendor FEX file's DVFS table suggests the board's CPU power rail has a voltage drop of 25 ~ 50 mV.
Add the PMIC regulator nodes and copy the DVFS table from the FEX file.
Signed-off-by Chen-Yu Tsai <[email protected]>
---
 arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts | 48 ++++++++++++++++++++++--
 1 file changed, 44 insertions(+), 4 deletions(-)
arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts +11 -0
index ba5bca0fe997..7bb418bd1b6e 100644
@@ -105,6 +105,22 @@
      status = "okay";
 };
 
+&cpu0 {
+     cpu-supply = <&reg_dcdc2>;
+
+     /* The custom DVFS table suggests a voltage drop of 25 ~ 50 mV */
+     operating-points = <
+             /* kHz    uV */
+             1080000 1450000
+             912000  1425000
+             864000  1350000
+             720000  1250000
+             528000  1150000

Quoted 8 lines

arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts line 123
Quoted 5 lines
arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts +5 -0
+             312000  1100000
+             144000  1050000
+             >;
+};
+
We've always tried to not use all the non-sense OPPs coming from the FEX files. Have you experienced any issues with the default ones?

I'll find some time to run a stress test on it.

Quoted 1 line

The other patches have been queued either for 4.8 as fixes, or 4.9.

Thanks!

ChenYu

Quoted 8 lines

Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Chen-Yu Tsai

author

2016-07-06 09:10 UTC #11 lore raw

PATCH 9/9 ARM: dts: sun7i: bananapi-m1-plus: Enable USB OTG

In reply to Chen-Yu Tsai

The Bananapi M1+ supports USB OTG, with the PMIC doing VBUS sensing.

Enable the USB OTG related functions. This also enables the previously missing USB PHY node, which also handles some initial setup for the normal USB hosts.

Signed-off-by Chen-Yu Tsai <[email protected]>

---
 arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts | 35 ++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts +35 -0

index 7bb418bd1b6e..5182989757ca 100644
@@ -204,6 +204,10 @@
 	status = "okay";
 };
 
+&otg_sram {
+	status = "okay";
+};
+
 &pio {
 	gmac_power_pin_bpi_m1p: gmac_power_pin at 0 {
 		allwinner,pins = "PH23";

@@ -232,6 +236,13 @@
 		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
 		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
 	};
+
+	usb0_id_detect_pin_bpi_m1p: usb0_id_detect_pin at 0 {
+		allwinner,pins = "PH4";
+		allwinner,function = "gpio_in";
+		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+	};
 };
 
 #include "axp209.dtsi"

@@ -262,8 +273,32 @@
 	regulator-name = "avcc";
 };
 
+&reg_usb0_vbus {
+	/* defaults from sunxi-common-regulators.dtsi */
+	status = "okay";
+};
+
 &uart0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart0_pins_a>;
 	status = "okay";
 };
+
+&usb_otg {
+	dr_mode = "otg";
+	status = "okay";
+};
+
+&usb_power_supply {
+	status = "okay";
+};
+
+&usbphy {
+	pinctrl-names = "default";
+	pinctrl-0 = <&usb0_id_detect_pin_bpi_m1p>;
+	usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 USB0-IDDET */
+	usb0_vbus_power-supply = <&usb_power_supply>;
+	usb0_vbus-supply = <&reg_usb0_vbus>;
+	/* USB host VBUS is always on */
+	status = "okay";
+};

Signature · 1 line

2.8.1

A message that is not in the archive (sent off-list or not yet received): 1467796250-22010-1-git-send-email-wens-jdAy2FN1RRM@public.gmane.org

Richard Kojedzinszky

2016-11-20 22:09 UTC #13 lore raw

Hi there,

I own a sinovoip's bananapi m1+, and using the latest dts and latest mainline kernel the os does not boot up, the mmc does not get initialized. I had to make mmc0 and mmc3 compatible with "allwinner,sun5i-a13-mmc", then the device booted up well. It turned out to me that actually the MMC_CAP_1_8V_DDR flag
in drivers/mmc/host/sunxi-mmc.c:1249 caused the wrong behaviour. If I just remove that capability, the board also boots up well. I dont know what have I found.

And also, as a board has usb ports in it, I had to enable the usb phy. I have a local dts which works for me now, should not it be included in mainline?

I have attached my dts which makes my device boot up well.

Regards,

Quoted 32 lines · Chen-Yu Tsai

Hi Maxime,
These are a bunch of fixes I did to get my boards running. Some of them are cleanups, while others enable hardware that we already support on other boards, such as USB or the audio codec.
Regards
ChenYu
Chen-Yu Tsai (9):
ARM: dts: sun7i: lamobo-r1: Fix USB-based WiFi module power
ARM: dts: sun7i: lamobo-r1: Remove usb1 vbus regulator
ARM: dts: sun7i: lamobo-r1: Fix GPIO flags in reg_ahci_5v
ARM: dts: sun7i: lamobo-r1: Enable audio codec
ARM: dts: sun7i: bananapi-m1-plus: Reindent whole file using tabs
ARM: dts: sun7i: bananapi-m1-plus: Unify suffix for board specific
labels
ARM: dts: sun7i: bananapi-m1-plus: red LED is power LED
ARM: dts: sun7i: bananapi-m1-plus: Add PMIC regulators and OPPs for
cpufreq
ARM: dts: sun7i: bananapi-m1-plus: Enable USB OTG
 arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts | 342 
++++++++++++++--------- 
 arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts        |  20 +- 
 2 files changed, 218 insertions(+), 144 deletions(-) 
Signature · 1 line
2.8.1 

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