a few sdhci/imx clean up and fix patches
Subsystems (5)
v2 cover a few sdhci/imx clean up and fix patches
Patch 1~10 are mainly sdhci cleanup patches while patch 7,9,10 are fixes which seems needed for stable tree as well.
The main work is:
1) using more robust mmc_regulator_set_vqmmc
2) add auto retune support
3) improve sdhci-esdhc-imx stability
4) add state save and restore for low power mode
Change Log:v1->v2:
* address all Andrian's comments
* below patches are dropped
mmc: sdhci: move sdhci_get_cd() forward to avoid declaration
mmc: core: fix a comment typo
mmc: sdhci: re-factor sdhci_start_signal_voltage()
mmc: core: mmc_regulator_set_vqmmc not return error if vqmmc/vmmc not
exist
mmc: sdhci: check SDHCI_QUIRK2_NO_1_8_V when do voltage switch
mmc: sdhci: rename quirk SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12
Above clean up is not needed so far according to Andrian.
mmc: sdhci: fix incorrect get data interrupt during no data transfer
This one is not needed anymore cause Andrian had another fix already in tree.
(commit 0e0a35d2d4058 mmc: sdhci: Track whether a reset is pending)
mmc: core: disable auto retune during card detection process
This one will sent out in another patch series to fix in CORE.
v1:
http://www.spinics.net/lists/linux-mmc/msg36316.html
Dong Aisheng (15):
mmc: sdhci: using common mmc_regulator_set_vqmmc()
mmc: sdhci-esdhc-imx: remove SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
mmc: sdhci-esdhc-imx: add esdhc specific suspend resume callback
mmc: sdhci-esdhc-imx: restore watermark level setting after resume
mmc: sdhci-esdhci-imx: disable DLL delay line settings explicitly
mmc: sdhci-esdhc-imx: support setting tuning start point
doc: dt: fsl-imx-esdhc: add set tuning start point binding
mmc: sdhci: add standard hw auto retuning support
mmc: sdhci-esdhc-imx: enable hw auto retuning for STD_TUNING
mmc: sdhci-esdhc-imx: enable hw auto retuning for MAN_TUNING
mmc: sdhci-esdhc-imx: fix strobe DLL lock wrong clock issue
mmc: sdhci-esdhc-imx: factor out hw related initialization into
function
mmc: sdhci-esdhc-imx: move tuning static configuration into hwinit
function
mmc: sdhci-esdhci-imx: re-initialize hw state after resume
mmc: sdhci-esdhc-imx: clear tuning bits during driver probe
.../devicetree/bindings/mmc/fsl-imx-esdhc.txt | 2 + drivers/mmc/host/sdhci-esdhc-imx.c | 149 ++++++++++++++------- drivers/mmc/host/sdhci.c | 24 ++-- drivers/mmc/host/sdhci.h | 3 + include/linux/platform_data/mmc-esdhc-imx.h | 1 + 5 files changed, 122 insertions(+), 57 deletions(-)
Signature · 1 line
1.9.1
PATCH v2 1/15 mmc: sdhci: using common mmc_regulator_set_vqmmc()
Switch to use the more robust common mmc_regulator_set_vqmmc() function in MMC core which set the target voltage as close as possible to target voltage.
We did not re-factor the whole sdhci_start_signal_voltage_switch() cause we want to keep the original signal switch order between host and card to avoid potential break.
--- drivers/mmc/host/sdhci.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-)
drivers/mmc/host/sdhci.c +3 -6
@@ -1835,8 +1835,7 @@ static int sdhci_start_signal_voltage_switch(struct mmc_host *mmc,sdhci_writew (host, ctrl,SDHCI_HOST_CONTROL2 );if (!IS_ERR (mmc->supply.vqmmc)) { - ret =regulator_set_voltage (mmc->supply.vqmmc,2700000 , -3600000 ); + ret =mmc_regulator_set_vqmmc (mmc, ios);if (ret) {pr_warn ("%s: Switching to 3.3V signalling voltage failed\n" ,mmc_hostname (mmc));
@@ -1859,8 +1858,7 @@ static int sdhci_start_signal_voltage_switch(struct mmc_host *mmc,if (!(host->flags &SDHCI_SIGNALING_180 ))return -EINVAL ;if (!IS_ERR (mmc->supply.vqmmc)) { - ret =regulator_set_voltage (mmc->supply.vqmmc, -1700000 ,1950000 ); + ret =mmc_regulator_set_vqmmc (mmc, ios);if (ret) {pr_warn ("%s: Switching to 1.8V signalling voltage failed\n" ,mmc_hostname (mmc));
@@ -1892,8 +1890,7 @@ static int sdhci_start_signal_voltage_switch(struct mmc_host *mmc,if (!(host->flags &SDHCI_SIGNALING_120 ))return -EINVAL ;if (!IS_ERR (mmc->supply.vqmmc)) { - ret =regulator_set_voltage (mmc->supply.vqmmc,1100000 , -1300000 ); + ret =mmc_regulator_set_vqmmc (mmc, ios);if (ret) {pr_warn ("%s: Switching to 1.2V signalling voltage failed\n" ,mmc_hostname (mmc));
Signature · 1 line
1.9.1
Adrian Hunter
maintainerPATCH v2 1/15 mmc: sdhci: using common mmc_regulator_set_vqmmc()
Quoted 9 lines · Dong Aisheng
Switch to use the more robust common
mmc_regulator_set_vqmmc()function in MMC core which set the target voltage as close as possible to target voltage.We did not re-factor the whole
sdhci_start_signal_voltage_switch()cause we want to keep the original signal switch order between host and card to avoid potential break.Signed-off-by Dong Aisheng <[email protected]>
Quoted 39 lines
--- drivers/mmc/host/sdhci.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-)drivers/mmc/host/sdhci.c +3
-6@@ -1835,8 +1835,7 @@ static int sdhci_start_signal_voltage_switch(struct mmc_host *mmc,sdhci_writew (host, ctrl,SDHCI_HOST_CONTROL2 );if (!IS_ERR (mmc->supply.vqmmc)) { - ret =regulator_set_voltage (mmc->supply.vqmmc,2700000 , -3600000 ); + ret =mmc_regulator_set_vqmmc (mmc, ios);if (ret) {pr_warn ("%s: Switching to 3.3V signalling voltage failed\n" ,mmc_hostname (mmc));@@ -1859,8 +1858,7 @@ static int sdhci_start_signal_voltage_switch(struct mmc_host *mmc,if (!(host->flags &SDHCI_SIGNALING_180 ))return -EINVAL ;if (!IS_ERR (mmc->supply.vqmmc)) { - ret =regulator_set_voltage (mmc->supply.vqmmc, -1700000 ,1950000 ); + ret =mmc_regulator_set_vqmmc (mmc, ios);if (ret) {pr_warn ("%s: Switching to 1.8V signalling voltage failed\n" ,mmc_hostname (mmc));@@ -1892,8 +1890,7 @@ static int sdhci_start_signal_voltage_switch(struct mmc_host *mmc,if (!(host->flags &SDHCI_SIGNALING_120 ))return -EINVAL ;if (!IS_ERR (mmc->supply.vqmmc)) { - ret =regulator_set_voltage (mmc->supply.vqmmc,1100000 , -1300000 ); + ret =mmc_regulator_set_vqmmc (mmc, ios);if (ret) {pr_warn ("%s: Switching to 1.2V signalling voltage failed\n" ,mmc_hostname (mmc));
PATCH v2 2/15 mmc: sdhci-esdhc-imx: remove SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
In reply to Dong AishengThe driver has already implemented the private .set_timeout() callback for common SDHCI code to do correct timeout value setting, it does not need call sdhci_calc_timeout(), so this quirk actually is not working. Remove it now.
--- drivers/mmc/host/sdhci-esdhc-imx.c | 2 -- 1 file changed, 2 deletions(-)
drivers/mmc/host/sdhci-esdhc-imx.c +0 -2
@@ -1147,8 +1147,6 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)if (IS_ERR (imx_data->pins_default))dev_warn (mmc_dev (host->mmc),"could not get default state\n" ); - host->quirks |=SDHCI_QUIRK_BROKEN_TIMEOUT_VAL ; -if (imx_data->socdata->flags &ESDHC_FLAG_ENGCM07207 )/* Fix errata ENGcm07207 present on i.MX25 and i.MX35 */ host->quirks |=SDHCI_QUIRK_NO_MULTIBLOCK
Signature · 1 line
1.9.1
PATCH v2 3/15 mmc: sdhci-esdhc-imx: add esdhc specific suspend resume callback
In reply to Dong AishengIt will be used for platform specific suspend/resume state save/restore work for some low power mode like Mega/Fast or LPSR mode.
--- drivers/mmc/host/sdhci-esdhc-imx.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-)
drivers/mmc/host/sdhci-esdhc-imx.c +11 -1
@@ -1254,6 +1254,16 @@ static int sdhci_esdhc_imx_remove(struct platform_device *pdev) }#ifdef CONFIG_PM +static int sdhci_esdhc_suspend (struct device *dev) +{ +return sdhci_pltfm_suspend (dev); +} + +static int sdhci_esdhc_resume (struct device *dev) +{ +return sdhci_pltfm_resume (dev); +} +static int sdhci_esdhc_runtime_suspend (struct device *dev) {struct sdhci_host *host =dev_get_drvdata (dev);
@@ -1289,7 +1299,7 @@ static int sdhci_esdhc_runtime_resume(struct device *dev)#endif static const struct dev_pm_ops sdhci_esdhc_pmops = { - SET_SYSTEM_SLEEP_PM_OPS(sdhci_pltfm_suspend, sdhci_pltfm_resume) + SET_SYSTEM_SLEEP_PM_OPS(sdhci_esdhc_suspend, sdhci_esdhc_resume)SET_RUNTIME_PM_OPS (sdhci_esdhc_runtime_suspend, sdhci_esdhc_runtime_resume,NULL ) };
Signature · 1 line
1.9.1
PATCH v2 4/15 mmc: sdhci-esdhc-imx: restore watermark level setting after resume
In reply to Dong AishengCurrently, we config the watermark_level register only in probe. This will cause the mmc write operation timeout issue after system resume back in LPSR mode. Because in LPSR mode, after system resume back, the watermark_level register(0x44) changes to 0x08000880, which set the write watermark level as 0, and set the read watermark level as 128. This value is incorrect.
This patch restores the setting of watermark level register after system resume back.
--- drivers/mmc/host/sdhci-esdhc-imx.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-)
drivers/mmc/host/sdhci-esdhc-imx.c +10 -1
@@ -39,6 +39,7 @@#define ESDHC_VENDOR_SPEC_VSELECT (1 << 1)#define ESDHC_VENDOR_SPEC_FRC_SDCLK_ON (1 << 8)#define ESDHC_WTMK_LVL 0x44 +#define ESDHC_WTMK_DEFAULT_VAL 0x10401040#define ESDHC_MIX_CTRL 0x48#define ESDHC_MIX_CTRL_DDREN (1 << 3)#define ESDHC_MIX_CTRL_AC23EN (1 << 7)
@@ -1157,7 +1158,7 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)* to something insane. Change it back here. */ if (esdhc_is_usdhc (imx_data)) { -writel (0x10401040 , host->ioaddr +ESDHC_WTMK_LVL ); +writel (ESDHC_WTMK_DEFAULT_VAL , host->ioaddr +ESDHC_WTMK_LVL ); host->quirks2 |=SDHCI_QUIRK2_PRESET_VALUE_BROKEN ; host->mmc->caps |=MMC_CAP_1_8V_DDR ;
@@ -1261,6 +1262,14 @@ static int sdhci_esdhc_suspend(struct device *dev)static int sdhci_esdhc_resume (struct device *dev) { +struct sdhci_host *host =dev_get_drvdata (dev); +struct sdhci_pltfm_host *pltfm_host =sdhci_priv (host); +struct pltfm_imx_data *imx_data =sdhci_pltfm_priv (pltfm_host); + +/* restore watermark setting in case it's lost in low power mode */ +if (esdhc_is_usdhc (imx_data)) +writel (ESDHC_WTMK_DEFAULT_VAL , host->ioaddr +ESDHC_WTMK_LVL ); +return sdhci_pltfm_resume (dev); }
Signature · 1 line
1.9.1
Adrian Hunter
maintainerPATCH v2 4/15 mmc: sdhci-esdhc-imx: restore watermark level setting after resume
Quoted 11 lines · Dong Aisheng
Currently, we config the
watermark_levelregister only in probe. This will cause the mmc write operation timeout issue after system resume back in LPSR mode. Because in LPSR mode, after system resume back, thewatermark_levelregister(0x44) changes to0x08000880, which set the write watermark level as 0, and set the read watermark level as 128. This value is incorrect.This patch restores the setting of watermark level register after system resume back.
Signed-off-by Dong Aisheng <[email protected]>
Quoted 41 lines
--- drivers/mmc/host/sdhci-esdhc-imx.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-)drivers/mmc/host/sdhci-esdhc-imx.c +10
-1@@ -39,6 +39,7 @@#define ESDHC_VENDOR_SPEC_VSELECT (1 << 1)#define ESDHC_VENDOR_SPEC_FRC_SDCLK_ON (1 << 8)#define ESDHC_WTMK_LVL 0x44 +#define ESDHC_WTMK_DEFAULT_VAL 0x10401040#define ESDHC_MIX_CTRL 0x48#define ESDHC_MIX_CTRL_DDREN (1 << 3)#define ESDHC_MIX_CTRL_AC23EN (1 << 7)@@ -1157,7 +1158,7 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)* to something insane. Change it back here. */ if (esdhc_is_usdhc (imx_data)) { -writel (0x10401040 , host->ioaddr +ESDHC_WTMK_LVL ); +writel (ESDHC_WTMK_DEFAULT_VAL , host->ioaddr +ESDHC_WTMK_LVL ); host->quirks2 |=SDHCI_QUIRK2_PRESET_VALUE_BROKEN ; host->mmc->caps |=MMC_CAP_1_8V_DDR ;@@ -1261,6 +1262,14 @@ static int sdhci_esdhc_suspend(struct device *dev)static int sdhci_esdhc_resume (struct device *dev) { +struct sdhci_host *host =dev_get_drvdata (dev); +struct sdhci_pltfm_host *pltfm_host =sdhci_priv (host); +struct pltfm_imx_data *imx_data =sdhci_pltfm_priv (pltfm_host); + +/* restore watermark setting in case it's lost in low power mode */ +if (esdhc_is_usdhc (imx_data)) +writel (ESDHC_WTMK_DEFAULT_VAL , host->ioaddr +ESDHC_WTMK_LVL ); +return sdhci_pltfm_resume (dev); }
PATCH v2 5/15 mmc: sdhci-esdhci-imx: disable DLL delay line settings explicitly
In reply to Dong AishengFrom: Dong Aisheng <[email protected]>
Disable DLL delay line settings explicitly during driver initialization in case ROM/uBoot had set an invalid delay.
e.g. MX6DL ROM has set the default delay line(DLLCTRL) to 0x1000021, the uSDHC clock timing will become marginal when works on DDR mode due to default delay and will possibly see CRC errors in case the board is not perfectly designed on the eMMC chip layout.
--- drivers/mmc/host/sdhci-esdhc-imx.c | 3 +++ 1 file changed, 3 insertions(+)
drivers/mmc/host/sdhci-esdhc-imx.c +3 -0
@@ -1187,6 +1187,9 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)*/ writel (readl (host->ioaddr +0x6c ) |BIT (7 ), host->ioaddr +0x6c ); + +/* disable DLL_CTRL delay line settings */ +writel (0x0 , host->ioaddr +ESDHC_DLL_CTRL ); }if (imx_data->socdata->flags &ESDHC_FLAG_MAN_TUNING )
Signature · 1 line
1.9.1
PATCH v2 6/15 mmc: sdhci-esdhc-imx: support setting tuning start point
In reply to Dong AishengThe delay cells of some SoCs may have less delay per one cell, for such SoCs, user could set the start delay cell point to bypass the first a few meaningless tuning commands.
--- drivers/mmc/host/sdhci-esdhc-imx.c | 14 +++++++++++--- include/linux/platform_data/mmc-esdhc-imx.h | 1 + 2 files changed, 12 insertions(+), 3 deletions(-)
drivers/mmc/host/sdhci-esdhc-imx.c +11 -3
@@ -76,7 +76,8 @@#define ESDHC_TUNING_CTRL 0xcc#define ESDHC_STD_TUNING_EN (1 << 24)/* NOTE: the minimum valid tuning start tap for mx6sl is 1 */ -#define ESDHC_TUNING_START_TAP 0x1 +#define ESDHC_TUNING_START_TAP_DEFAULT 0x1 +#define ESDHC_TUNING_START_TAP_MASK 0xff#define ESDHC_TUNING_STEP_MASK 0x00070000#define ESDHC_TUNING_STEP_SHIFT 16
@@ -490,7 +491,12 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg) v |=ESDHC_MIX_CTRL_EXE_TUNE ; m |=ESDHC_MIX_CTRL_FBCLK_SEL ; tuning_ctrl =readl (host->ioaddr +ESDHC_TUNING_CTRL ); - tuning_ctrl |=ESDHC_STD_TUNING_EN |ESDHC_TUNING_START_TAP ; + tuning_ctrl |=ESDHC_STD_TUNING_EN |ESDHC_TUNING_START_TAP_DEFAULT ; +if (imx_data->boarddata.tuning_start_tap) { + tuning_ctrl &= ~ESDHC_TUNING_START_TAP_MASK ; + tuning_ctrl |= imx_data->boarddata.tuning_start_tap; + } +if (imx_data->boarddata.tuning_step) { tuning_ctrl &= ~ESDHC_TUNING_STEP_MASK ; tuning_ctrl |= imx_data->boarddata.tuning_step <<ESDHC_TUNING_STEP_SHIFT ;
@@ -976,6 +982,8 @@ sdhci_esdhc_imx_probe_dt(struct platform_device *pdev, boarddata->wp_type =ESDHC_WP_GPIO ;of_property_read_u32 (np,"fsl,tuning-step" , &boarddata->tuning_step); +of_property_read_u32 (np,"fsl,tuning-start-tap" , + &boarddata->tuning_start_tap);if (of_find_property (np,"no-1-8-v" ,NULL )) boarddata->support_vsel = false;
@@ -1198,7 +1206,7 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)if (imx_data->socdata->flags &ESDHC_FLAG_STD_TUNING )writel (readl (host->ioaddr +ESDHC_TUNING_CTRL ) | -ESDHC_STD_TUNING_EN |ESDHC_TUNING_START_TAP , +ESDHC_STD_TUNING_EN |ESDHC_TUNING_START_TAP_DEFAULT , host->ioaddr +ESDHC_TUNING_CTRL );if (imx_data->socdata->flags &ESDHC_FLAG_ERR004536 )
include/linux/platform_data/mmc-esdhc-imx.h +1 -0
@@ -46,5 +46,6 @@ struct esdhc_platform_data {bool support_vsel;unsigned int delay_line;unsigned int tuning_step;/* The delay cell steps in tuning procedure */ + unsigned int tuning_start_tap; /* The start delay cell point in tuning procedure */ };#endif /* __ASM_ARCH_IMX_ESDHC_H */
Signature · 1 line
1.9.1
PATCH v2 7/15 doc: dt: fsl-imx-esdhc: add set tuning start point binding
In reply to Dong Aishengadd tuning start point binding
--- Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt | 2 ++ 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt +2 -0
@@ -28,6 +28,8 @@ Optional properties: transparent level shifters on the outputs of the controller. Two cells are required, first cell specifies minimum slot voltage (mV), second cell specifies maximum slot voltage (mV). Several ranges could be specified. +- fsl,tuning-start-tap: Specify the start dealy cell point when send first CMD19 + in tuning procedure. - fsl,tuning-step: Specify the increasing delay cell steps in tuning procedure. The uSDHC use one delay cell as default increasing step to do tuning process. This property allows user to change the tuning step to more than one delay
Signature · 1 line
1.9.1
PATCH v2 7/15 doc: dt: fsl-imx-esdhc: add set tuning start point binding
Quoted 12 lines · Dong Aisheng
add tuning start point binding
Signed-off-by Dong Aisheng <[email protected]>--- Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt | 2 ++ 1 file changed, 2 insertions(+)Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt +0
-0
Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt Optional properties: · line 35
Quoted 8 lines
Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt +2
-0@@ -28,6 +28,8 @@ Optional properties: transparent level shifters on the outputs of the controller. Two cells are required, first cell specifies minimum slot voltage (mV), second cell specifies maximum slot voltage (mV). Several ranges could be specified. +- fsl,tuning-start-tap: Specify the start dealy cell point when send first CMD19 + in tuning procedure. - fsl,tuning-step: Specify the increasing delay cell steps in tuning procedure. The uSDHC use one delay cell as default increasing step to do tuning process. This property allows user to change the tuning step to more than one delay
Hi Dong
You say this is a patch which should be part of stable. How does it fulfil the requirements listed in
Linux/Documentation/stable_kernel_rules.txt
Thanks
Andrew
PATCH v2 7/15 doc: dt: fsl-imx-esdhc: add set tuning start point binding
Hi Andrew,
Quoted 24 lines · Andrew Lunn
Quoted 12 lines · Dong Aisheng
add tuning start point binding
Signed-off-by Dong Aisheng <[email protected]>--- Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt | 2 ++ 1 file changed, 2 insertions(+)Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt +0
-0Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt Optional properties: · line 35
Quoted 8 lines
Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt +2
-0@@ -28,6 +28,8 @@ Optional properties: transparent level shifters on the outputs of the controller. Two cells are required, first cell specifies minimum slot voltage (mV), second cell specifies maximum slot voltage (mV). Several ranges could be specified. +- fsl,tuning-start-tap: Specify the start dealy cell point when send first CMD19 + in tuning procedure. - fsl,tuning-step: Specify the increasing delay cell steps in tuning procedure. The uSDHC use one delay cell as default increasing step to do tuning process. This property allows user to change the tuning step to more than one delayHi Dong
Quoted 5 lines
You say this is a patch which should be part of stable. How does it fulfil the requirements listed in
Linux/Documentation/stable_kernel_rules.txt
Sorry i'm not so familiar with stable rules before the posting.
This patch is mainly to separate the binding doc changes from the driver changes in patch 6.
Why we need add the tuning-start-tap is because we met some tuning problem on boards like MX7D SDB RevC, the board timing slight difference may cause the default tuning steps(2 cells) can't cover the required tuning range, then tuning fail.
This patch allow users to bypass the first a few meaningless tuning ranges if they meet the problem.
Since there's no users in tree currently, i'm not sure if it breaks the rule. But indeed people may need it if they meet this problem.
Regards
Dong Aisheng
Quoted 2 lines
Thanks
Andrew
PATCH v2 8/15 mmc: sdhci: add standard hw auto retuning support
In reply to Dong AishengIf HW supports SDHCI_TUNING_MODE_3 which is auto retuning, we won't retune during runtime suspend and resume, instead we use Re-tuning Request signaled via SDHCI_INT_RETUNE interrupt to do retuning and hw auto retuning during data transfer to guarantee the signal sample window correction.
This can avoid a mass of repeatedly retuning during small file system data access and improve the performance.
--- drivers/mmc/host/sdhci.c | 15 ++++++++++++--- drivers/mmc/host/sdhci.h | 3 +++ 2 files changed, 15 insertions(+), 3 deletions(-)
drivers/mmc/host/sdhci.c +12 -3
@@ -229,6 +229,10 @@ static void sdhci_init(struct sdhci_host *host, int soft)SDHCI_INT_TIMEOUT |SDHCI_INT_DATA_END |SDHCI_INT_RESPONSE ; +if (host->tuning_mode ==SDHCI_TUNING_MODE_2 || + host->tuning_mode ==SDHCI_TUNING_MODE_3 ) + host->ier |=SDHCI_INT_RETUNE ; +sdhci_writel (host, host->ier,SDHCI_INT_ENABLE );sdhci_writel (host, host->ier,SDHCI_SIGNAL_ENABLE );
@@ -2673,6 +2677,9 @@ static irqreturn_t sdhci_irq(int irq, void *dev_id)pr_err ("%s: Card is consuming too much power!\n" ,mmc_hostname (host->mmc)); +if (intmask &SDHCI_INT_RETUNE ) +mmc_retune_needed (host->mmc); +if (intmask &SDHCI_INT_CARD_INT ) {sdhci_enable_sdio_irq_nolock (host, false); host->thread_isr |=SDHCI_INT_CARD_INT ;
@@ -2682,7 +2689,7 @@ static irqreturn_t sdhci_irq(int irq, void *dev_id) intmask &= ~(SDHCI_INT_CARD_INSERT |SDHCI_INT_CARD_REMOVE |SDHCI_INT_CMD_MASK |SDHCI_INT_DATA_MASK |SDHCI_INT_ERROR |SDHCI_INT_BUS_POWER | -SDHCI_INT_CARD_INT ); +SDHCI_INT_RETUNE |SDHCI_INT_CARD_INT );if (intmask) { unexpected |= intmask;
@@ -2787,7 +2794,8 @@ int sdhci_suspend_host(struct sdhci_host *host)sdhci_disable_card_detection (host);mmc_retune_timer_stop (host->mmc); -mmc_retune_needed (host->mmc); +if (host->tuning_mode !=SDHCI_TUNING_MODE_3 ) +mmc_retune_needed (host->mmc);if (!device_may_wakeup (mmc_dev (host->mmc))) { host->ier =0 ;
@@ -2848,7 +2856,8 @@ int sdhci_runtime_suspend_host(struct sdhci_host *host)unsigned long flags;mmc_retune_timer_stop (host->mmc); -mmc_retune_needed (host->mmc); +if (host->tuning_mode !=SDHCI_TUNING_MODE_3 ) +mmc_retune_needed (host->mmc);spin_lock_irqsave (&host->lock, flags); host->ier &=SDHCI_INT_CARD_INT ;
drivers/mmc/host/sdhci.h +3 -0
@@ -128,6 +128,7 @@#define SDHCI_INT_CARD_INSERT 0x00000040#define SDHCI_INT_CARD_REMOVE 0x00000080#define SDHCI_INT_CARD_INT 0x00000100 +#define SDHCI_INT_RETUNE 0x00001000#define SDHCI_INT_ERROR 0x00008000#define SDHCI_INT_TIMEOUT 0x00010000#define SDHCI_INT_CRC 0x00020000
@@ -518,6 +519,8 @@ struct sdhci_host {unsigned int tuning_count;/* Timer count for re-tuning */ unsigned int tuning_mode;/* Re-tuning mode supported by host */ #define SDHCI_TUNING_MODE_1 0 +#define SDHCI_TUNING_MODE_2 1 +#define SDHCI_TUNING_MODE_3 2unsigned long private[0 ]____cacheline_aligned ; };
Signature · 1 line
1.9.1
Adrian Hunter
maintainerPATCH v2 8/15 mmc: sdhci: add standard hw auto retuning support
Quoted 10 lines · Dong Aisheng
If HW supports
SDHCI_TUNING_MODE_3which is auto retuning, we won't retune during runtime suspend and resume, instead we use Re-tuning Request signaled viaSDHCI_INT_RETUNEinterrupt to do retuning and hw auto retuning during data transfer to guarantee the signal sample window correction.This can avoid a mass of repeatedly retuning during small file system data access and improve the performance.
Signed-off-by Dong Aisheng <[email protected]>
Quoted 81 lines
--- drivers/mmc/host/sdhci.c | 15 ++++++++++++--- drivers/mmc/host/sdhci.h | 3 +++ 2 files changed, 15 insertions(+), 3 deletions(-)drivers/mmc/host/sdhci.c +12
-3@@ -229,6 +229,10 @@ static void sdhci_init(struct sdhci_host *host, int soft)SDHCI_INT_TIMEOUT |SDHCI_INT_DATA_END |SDHCI_INT_RESPONSE ; +if (host->tuning_mode ==SDHCI_TUNING_MODE_2 || + host->tuning_mode ==SDHCI_TUNING_MODE_3 ) + host->ier |=SDHCI_INT_RETUNE ; +sdhci_writel (host, host->ier,SDHCI_INT_ENABLE );sdhci_writel (host, host->ier,SDHCI_SIGNAL_ENABLE );@@ -2673,6 +2677,9 @@ static irqreturn_t sdhci_irq(int irq, void *dev_id)pr_err ("%s: Card is consuming too much power!\n" ,mmc_hostname (host->mmc)); +if (intmask &SDHCI_INT_RETUNE ) +mmc_retune_needed (host->mmc); +if (intmask &SDHCI_INT_CARD_INT ) {sdhci_enable_sdio_irq_nolock (host, false); host->thread_isr |=SDHCI_INT_CARD_INT ;@@ -2682,7 +2689,7 @@ static irqreturn_t sdhci_irq(int irq, void *dev_id) intmask &= ~(SDHCI_INT_CARD_INSERT |SDHCI_INT_CARD_REMOVE |SDHCI_INT_CMD_MASK |SDHCI_INT_DATA_MASK |SDHCI_INT_ERROR |SDHCI_INT_BUS_POWER | -SDHCI_INT_CARD_INT ); +SDHCI_INT_RETUNE |SDHCI_INT_CARD_INT );if (intmask) { unexpected |= intmask;@@ -2787,7 +2794,8 @@ int sdhci_suspend_host(struct sdhci_host *host)sdhci_disable_card_detection (host);mmc_retune_timer_stop (host->mmc); -mmc_retune_needed (host->mmc); +if (host->tuning_mode !=SDHCI_TUNING_MODE_3 ) +mmc_retune_needed (host->mmc);if (!device_may_wakeup (mmc_dev (host->mmc))) { host->ier =0 ;@@ -2848,7 +2856,8 @@ int sdhci_runtime_suspend_host(struct sdhci_host *host)unsigned long flags;mmc_retune_timer_stop (host->mmc); -mmc_retune_needed (host->mmc); +if (host->tuning_mode !=SDHCI_TUNING_MODE_3 ) +mmc_retune_needed (host->mmc);spin_lock_irqsave (&host->lock, flags); host->ier &=SDHCI_INT_CARD_INT ;drivers/mmc/host/sdhci.h +3
-0@@ -128,6 +128,7 @@#define SDHCI_INT_CARD_INSERT 0x00000040#define SDHCI_INT_CARD_REMOVE 0x00000080#define SDHCI_INT_CARD_INT 0x00000100 +#define SDHCI_INT_RETUNE 0x00001000#define SDHCI_INT_ERROR 0x00008000#define SDHCI_INT_TIMEOUT 0x00010000#define SDHCI_INT_CRC 0x00020000@@ -518,6 +519,8 @@ struct sdhci_host {unsigned int tuning_count;/* Timer count for re-tuning */ unsigned int tuning_mode;/* Re-tuning mode supported by host */ #define SDHCI_TUNING_MODE_1 0 +#define SDHCI_TUNING_MODE_2 1 +#define SDHCI_TUNING_MODE_3 2unsigned long private[0 ]____cacheline_aligned ; };
PATCH v2 9/15 mmc: sdhci-esdhc-imx: enable hw auto retuning for STD_TUNING
In reply to Dong AishengEnable HW auto retuning when set SDHCI_CTRL_EXEC_TUNING and clear it when clear SDHCI_CTRL_TUNED_CLK.
--- drivers/mmc/host/sdhci-esdhc-imx.c | 3 +++ 1 file changed, 3 insertions(+)
drivers/mmc/host/sdhci-esdhc-imx.c +3 -0
@@ -45,6 +45,7 @@#define ESDHC_MIX_CTRL_AC23EN (1 << 7)#define ESDHC_MIX_CTRL_EXE_TUNE (1 << 22)#define ESDHC_MIX_CTRL_SMPCLK_SEL (1 << 23) +#define ESDHC_MIX_CTRL_AUTO_TUNE_EN (1 << 24)#define ESDHC_MIX_CTRL_FBCLK_SEL (1 << 25)#define ESDHC_MIX_CTRL_HS400_EN (1 << 26)/* Bits 3 and 6 are not SDHCI standard definitions */
@@ -485,11 +486,13 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg) }else { v &= ~ESDHC_MIX_CTRL_SMPCLK_SEL ; m &= ~ESDHC_MIX_CTRL_FBCLK_SEL ; + m &= ~ESDHC_MIX_CTRL_AUTO_TUNE_EN ; }if (val &SDHCI_CTRL_EXEC_TUNING ) { v |=ESDHC_MIX_CTRL_EXE_TUNE ; m |=ESDHC_MIX_CTRL_FBCLK_SEL ; + m |=ESDHC_MIX_CTRL_AUTO_TUNE_EN ; tuning_ctrl =readl (host->ioaddr +ESDHC_TUNING_CTRL ); tuning_ctrl |=ESDHC_STD_TUNING_EN |ESDHC_TUNING_START_TAP_DEFAULT ;if (imx_data->boarddata.tuning_start_tap) {
Signature · 1 line
1.9.1
PATCH v2 10/15 mmc: sdhci-esdhc-imx: enable hw auto retuning for MAN_TUNING
In reply to Dong AishengIndicating hw auto retuning support for mx6qdl in the fake caps_1 register and enable auto retuning in post_tuning process after tuning completes.
--- drivers/mmc/host/sdhci-esdhc-imx.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-)
drivers/mmc/host/sdhci-esdhc-imx.c +8 -3
@@ -302,7 +302,8 @@ static u32 esdhc_readl_le(struct sdhci_host *host, int reg)/* imx6q/dl does not have cap_1 register, fake one */ val =SDHCI_SUPPORT_DDR50 |SDHCI_SUPPORT_SDR104 |SDHCI_SUPPORT_SDR50 - |SDHCI_USE_SDR50_TUNING ; + |SDHCI_USE_SDR50_TUNING + | (SDHCI_TUNING_MODE_3 <<SDHCI_RETUNING_MODE_SHIFT );if (imx_data->socdata->flags &ESDHC_FLAG_HS400 ) val |=SDHCI_SUPPORT_HS400 ;
@@ -472,10 +473,13 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)writel (new_val, host->ioaddr +ESDHC_VENDOR_SPEC );if (imx_data->socdata->flags &ESDHC_FLAG_MAN_TUNING ) { new_val =readl (host->ioaddr +ESDHC_MIX_CTRL ); -if (val &SDHCI_CTRL_TUNED_CLK ) +if (val &SDHCI_CTRL_TUNED_CLK ) { new_val |=ESDHC_MIX_CTRL_SMPCLK_SEL ; -else + new_val |=ESDHC_MIX_CTRL_AUTO_TUNE_EN ; + }else { new_val &= ~ESDHC_MIX_CTRL_SMPCLK_SEL ; + new_val &= ~ESDHC_MIX_CTRL_AUTO_TUNE_EN ; + }writel (new_val , host->ioaddr +ESDHC_MIX_CTRL ); }else if (imx_data->socdata->flags &ESDHC_FLAG_STD_TUNING ) {u32 v =readl (host->ioaddr +SDHCI_ACMD12_ERR );
@@ -761,6 +765,7 @@ static void esdhc_post_tuning(struct sdhci_host *host) reg =readl (host->ioaddr +ESDHC_MIX_CTRL ); reg &= ~ESDHC_MIX_CTRL_EXE_TUNE ; + reg |=ESDHC_MIX_CTRL_AUTO_TUNE_EN ;writel (reg, host->ioaddr +ESDHC_MIX_CTRL ); }
Signature · 1 line
1.9.1
PATCH v2 10/15 mmc: sdhci-esdhc-imx: enable hw auto retuning for MAN_TUNING
Dong Aisheng, All,
Quoted 3 lines · Dong Aisheng
Indicating hw auto retuning support for mx6qdl in the fake
caps_1register and enable auto retuning inpost_tuningprocess after tuning completes.
Have you tried this change with a SDIO3.0 device? I'm asking because a similar change in latest NXP 4.1.15 kernel broke SDIO3.0 support. With this tuning, the kernel would report:
mmc2: Got data interrupt 0x00000002 even though no data operation was in progress.
Doing a 'git bisect' and then reverting this patch fixed the issue. Although I haven't tested that change on mainline kernel, I wanted you to know about this observation before it gets merged.
As a FYI, the issue has been reported to NXP community:
https://community.nxp.com/thread/431316
Regards,
Gary
PATCH v2 10/15 mmc: sdhci-esdhc-imx: enable hw auto retuning for MAN_TUNING
Quoted 8 lines · Gary Bisson
Dong Aisheng, All,
Quoted 3 lines · Dong Aisheng
Indicating hw auto retuning support for mx6qdl in the fake
caps_1register and enable auto retuning inpost_tuningprocess after tuning completes.Have you tried this change with a SDIO3.0 device? I'm asking because a
Tested with SD3.0 device.
Not really for SDIO3.0 device since there's no SDIO3.0 device on my available MX6Q/DL boards.
Quoted 5 lines
similar change in latest NXP 4.1.15 kernel broke SDIO3.0 support. With this tuning, the kernel would report:
mmc2: Got data interrupt0x00000002even though no data operation was in progress.
Can you provide the full enumeration log?
Quoted 7 lines
Doing a 'git bisect' and then reverting this patch fixed the issue. Although I haven't tested that change on mainline kernel, I wanted you to know about this observation before it gets merged.
As a FYI, the issue has been reported to NXP community:
https://community.nxp.com/thread/431316
Thanks for nofity.
I will check it on my side.
Regards
Dong Aisheng
Quoted 2 lines
Regards,
Gary
PATCH v2 10/15 mmc: sdhci-esdhc-imx: enable hw auto retuning for MAN_TUNING
Quoted 8 lines · Dong Aisheng
Quoted 7 lines · Gary Bisson
Dong Aisheng, All,
Quoted 3 lines · Dong Aisheng
Indicating hw auto retuning support for mx6qdl in the fake
caps_1register and enable auto retuning inpost_tuningprocess after tuning completes.
Quoted 5 lines
Quoted 1 line
Have you tried this change with a SDIO3.0 device? I'm asking because a
Tested with SD3.0 device.
Not really for SDIO3.0 device since there's no SDIO3.0 device on my available MX6Q/DL boards.
Someone answered on the Community that it has been tested on i.MX7 SABRE board but not on i.MX6 right?
Quoted 7 lines
Quoted 5 lines
similar change in latest NXP 4.1.15 kernel broke SDIO3.0 support. With this tuning, the kernel would report:
mmc2: Got data interrupt0x00000002even though no data operation was in progress.Can you provide the full enumeration log?
Here is the mmc related part of dmesg:
# dmesg | grep mmc2 mmc2: SDHCI controller on 2194000.usdhc [2194000.usdhc] using ADMA mmc2: queuing unknown CIS tuple 0x01 (3 bytes) mmc2: queuing unknown CIS tuple 0x1a (5 bytes) mmc2: queuing unknown CIS tuple 0x1b (8 bytes) mmc2: queuing unknown CIS tuple 0x14 (0 bytes) mmc2: queuing unknown CIS tuple 0x80 (1 bytes) mmc2: queuing unknown CIS tuple 0x81 (1 bytes) mmc2: queuing unknown CIS tuple 0x82 (1 bytes) mmc2: new ultra high speed SDR104 SDIO card at address 0001 mmc2: queuing unknown CIS tuple 0x01 (3 bytes) mmc2: queuing unknown CIS tuple 0x1a (5 bytes) mmc2: queuing unknown CIS tuple 0x1b (8 bytes) mmc2: queuing unknown CIS tuple 0x14 (0 bytes) ar6k_wlan mmc2:0001:1: Direct firmware load for qsetup30.bin failed with error -2 mmc2: Got data interrupt 0x00000002 even though no data operation was in progress. mmc2: Got data interrupt 0x00000002 even though no data operation was in progress.
Without the MAN_TUN patch, everything is the same (as expected) but without the last two errors. Note that when WiFi connection is up, this warning keeps poping up every few seconds.
Quoted 10 lines
Quoted 7 lines
Doing a 'git bisect' and then reverting this patch fixed the issue. Although I haven't tested that change on mainline kernel, I wanted you to know about this observation before it gets merged.
As a FYI, the issue has been reported to NXP community:
https://community.nxp.com/thread/431316Thanks for nofity.
I will check it on my side.
Not sure you've seen my last post from today, but you can actually try the device I'm using (QCA9377) on SABRE using the evaluation kit:
http://www.silexamerica.com/products/connectivity-solutions/embedded-wireless/sdio-radios/sx-sdcac/
Maybe there's a hw mod to do on SABRE in order to get SDIO3.0/1.8V vcc.
Regards,
Gary
PATCH v2 10/15 mmc: sdhci-esdhc-imx: enable hw auto retuning for MAN_TUNING
Hi Gary,
Quoted 9 lines · Gary Bisson
Quoted 8 lines · Dong Aisheng
Quoted 7 lines · Gary Bisson
Dong Aisheng, All,
Quoted 3 lines · Dong Aisheng
Indicating hw auto retuning support for mx6qdl in the fake
caps_1register and enable auto retuning inpost_tuningprocess after tuning completes.
Quoted 9 lines
Quoted 5 lines
Quoted 1 line
Have you tried this change with a SDIO3.0 device? I'm asking because a
Tested with SD3.0 device.
Not really for SDIO3.0 device since there's no SDIO3.0 device on my available MX6Q/DL boards.Someone answered on the Community that it has been tested on i.MX7 SABRE board but not on i.MX6 right?
Yes, we tested this feature with MX7 SDB board.
However, MX7 is slightly a bit different from MX6 that it's using STD_TUNING rather than MAN_TUNING.
I just tried MAN_TUNING on MX7 which is the same as MX6, but i still couldn't see your issue.
May try more and also on MX6 boards.
Quoted 30 lines
Quoted 7 lines
Quoted 5 lines
similar change in latest NXP 4.1.15 kernel broke SDIO3.0 support. With this tuning, the kernel would report:
mmc2: Got data interrupt0x00000002even though no data operation was in progress.Can you provide the full enumeration log?
Here is the mmc related part of dmesg:
# dmesg | grep mmc2 mmc2: SDHCI controller on 2194000.usdhc [2194000.usdhc] using ADMA mmc2: queuing unknown CIS tuple 0x01 (3 bytes) mmc2: queuing unknown CIS tuple 0x1a (5 bytes) mmc2: queuing unknown CIS tuple 0x1b (8 bytes) mmc2: queuing unknown CIS tuple 0x14 (0 bytes) mmc2: queuing unknown CIS tuple 0x80 (1 bytes) mmc2: queuing unknown CIS tuple 0x81 (1 bytes) mmc2: queuing unknown CIS tuple 0x82 (1 bytes) mmc2: new ultra high speed SDR104 SDIO card at address 0001 mmc2: queuing unknown CIS tuple 0x01 (3 bytes) mmc2: queuing unknown CIS tuple 0x1a (5 bytes) mmc2: queuing unknown CIS tuple 0x1b (8 bytes) mmc2: queuing unknown CIS tuple 0x14 (0 bytes) ar6k_wlan mmc2:0001:1: Direct firmware load for qsetup30.bin failed with error -2 mmc2: Got data interrupt 0x00000002 even though no data operation was in progress. mmc2: Got data interrupt 0x00000002 even though no data operation was in progress.
Quoted 4 lines
Without the
MAN_TUNpatch, everything is the same (as expected) but without the last two errors. Note that when WiFi connection is up, this warning keeps poping up every few seconds.
Could you please enable CONFIG_MMC_DEBUG and send out the full card enumeration log?
Quoted 8 lines
Quoted 8 lines
Quoted 7 lines
Doing a 'git bisect' and then reverting this patch fixed the issue. Although I haven't tested that change on mainline kernel, I wanted you to know about this observation before it gets merged.
As a FYI, the issue has been reported to NXP community:
https://community.nxp.com/thread/431316
Quoted 7 lines
Quoted 2 lines
Thanks for nofity.
I will check it on my side.Not sure you've seen my last post from today, but you can actually try the device I'm using (QCA9377) on SABRE using the evaluation kit:
http://www.silexamerica.com/products/connectivity-solutions/embedded-wireless/sdio-radios/sx-sdcac/
I do not have that WiFi card.
But i have a Broadcom SDIO3.0 WiFi card, i will find way to run it on MX6 board.
Quoted 2 lines
Maybe there's a hw mod to do on SABRE in order to get SDIO3.0/1.8V vcc.
Did your card work on 1.8v IO voltage?
AFAIK usually the SDIO3.0 external WiFi card may not support 1.8v VIO and needs special HW rework.
Quoted 2 lines
Regards,
Gary
Regards
Dong Aisheng
PATCH v2 11/15 mmc: sdhci-esdhc-imx: fix strobe DLL lock wrong clock issue
In reply to Dong AishengWhen enable DDR, the clock factor definition is changed. e.g. original 200Mhz will become 100Mhz once MIX_CTRL_DDREN bit is set So we need to update the clock setting then the strobe dll can lock the correct clock rate.
Additionally we also need disable the clock before locking strobe dll.
--- drivers/mmc/host/sdhci-esdhc-imx.c | 7 +++++++ 1 file changed, 7 insertions(+)
drivers/mmc/host/sdhci-esdhc-imx.c +7 -0
@@ -853,6 +853,11 @@ static void esdhc_set_strobe_dll(struct sdhci_host *host)u32 v;if (host->mmc->actual_clock >ESDHC_STROBE_DLL_CLK_FREQ ) { +/* disable clock before enabling strobe dll */ +writel (readl (host->ioaddr +ESDHC_VENDOR_SPEC ) & + ~ESDHC_VENDOR_SPEC_FRC_SDCLK_ON , + host->ioaddr +ESDHC_VENDOR_SPEC ); +/* force a reset on strobe dll */ writel (ESDHC_STROBE_DLL_CTRL_RESET , host->ioaddr +ESDHC_STROBE_DLL_CTRL );
@@ -914,6 +919,8 @@ static void esdhc_set_uhs_signaling(struct sdhci_host *host, unsigned timing) m |=ESDHC_MIX_CTRL_DDREN |ESDHC_MIX_CTRL_HS400_EN ;writel (m, host->ioaddr +ESDHC_MIX_CTRL ); imx_data->is_ddr =1 ; +/* update clock after enable DDR for strobe DLL lock */ + host->ops->set_clock (host, host->clock);esdhc_set_strobe_dll (host);break ; }
Signature · 1 line
1.9.1
PATCH v2 12/15 mmc: sdhci-esdhc-imx: factor out hw related initialization into function
In reply to Dong AishengMove all hw related static initializations into a separate function which helps concentrate the hw related initialization code. And that function could also be called by other places later as a basic hw state restore.
e.g. suspend/resume where the hw state is possible to lost due to low power mode.
--- drivers/mmc/host/sdhci-esdhc-imx.c | 72 +++++++++++++++++++++----------------- 1 file changed, 40 insertions(+), 32 deletions(-)
drivers/mmc/host/sdhci-esdhc-imx.c +40 -32
@@ -979,6 +979,44 @@ static const struct sdhci_pltfm_data sdhci_esdhc_imx_pdata = { .ops = &sdhci_esdhc_ops, }; +static void sdhci_esdhc_imx_hwinit (struct sdhci_host *host) +{ +struct sdhci_pltfm_host *pltfm_host =sdhci_priv (host); +struct pltfm_imx_data *imx_data =sdhci_pltfm_priv (pltfm_host); + +if (esdhc_is_usdhc (imx_data)) { +/* +* The imx6q ROM code will change the default watermark +* level setting to something insane. Change it back here. +*/ +writel (ESDHC_WTMK_DEFAULT_VAL , host->ioaddr +ESDHC_WTMK_LVL ); + +/* +* ROM code will change the bit burst_length_enable setting +* to zero if this usdhc is choosed to boot system. Change +* it back here, otherwise it will impact the performance a +* lot. This bit is used to enable/disable the burst length +* for the external AHB2AXI bridge, it's usefully especially +* for INCR transfer because without burst length indicator, +* the AHB2AXI bridge does not know the burst length in +* advance. And without burst length indicator, AHB INCR +* transfer can only be converted to singles on the AXI side. +*/ +writel (readl (host->ioaddr +SDHCI_HOST_CONTROL ) + |ESDHC_BURST_LEN_EN_INCR , + host->ioaddr +SDHCI_HOST_CONTROL ); +/* +* errata ESDHC_FLAG_ERR004536 fix for MX6Q TO1.2 and MX6DL +* TO1.1, it's harmless for MX6SL +*/ +writel (readl (host->ioaddr +0x6c ) |BIT (7 ), + host->ioaddr +0x6c ); + +/* disable DLL_CTRL delay line settings */ +writel (0x0 , host->ioaddr +ESDHC_DLL_CTRL ); + } +} +#ifdef CONFIG_OF static int sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,
@@ -1176,43 +1214,11 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev) host->quirks |=SDHCI_QUIRK_NO_MULTIBLOCK |SDHCI_QUIRK_BROKEN_ADMA ; -/* -* The imx6q ROM code will change the default watermark level setting -* to something insane. Change it back here. -*/ if (esdhc_is_usdhc (imx_data)) { -writel (ESDHC_WTMK_DEFAULT_VAL , host->ioaddr +ESDHC_WTMK_LVL ); - host->quirks2 |=SDHCI_QUIRK2_PRESET_VALUE_BROKEN ; host->mmc->caps |=MMC_CAP_1_8V_DDR ; - -/* -* ROM code will change the bit burst_length_enable setting -* to zero if this usdhc is choosed to boot system. Change -* it back here, otherwise it will impact the performance a -* lot. This bit is used to enable/disable the burst length -* for the external AHB2AXI bridge, it's usefully especially -* for INCR transfer because without burst length indicator, -* the AHB2AXI bridge does not know the burst length in -* advance. And without burst length indicator, AHB INCR -* transfer can only be converted to singles on the AXI side. -*/ -writel (readl (host->ioaddr +SDHCI_HOST_CONTROL ) - |ESDHC_BURST_LEN_EN_INCR , - host->ioaddr +SDHCI_HOST_CONTROL ); -if (!(imx_data->socdata->flags &ESDHC_FLAG_HS200 )) host->quirks2 |=SDHCI_QUIRK2_BROKEN_HS200 ; - -/* -* errata ESDHC_FLAG_ERR004536 fix for MX6Q TO1.2 and MX6DL -* TO1.1, it's harmless for MX6SL -*/ -writel (readl (host->ioaddr +0x6c ) |BIT (7 ), - host->ioaddr +0x6c ); - -/* disable DLL_CTRL delay line settings */ -writel (0x0 , host->ioaddr +ESDHC_DLL_CTRL ); }if (imx_data->socdata->flags &ESDHC_FLAG_MAN_TUNING )
@@ -1237,6 +1243,8 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)if (err) goto disable_clk; +sdhci_esdhc_imx_hwinit (host); + err =sdhci_add_host (host);if (err) goto disable_clk;
Signature · 1 line
1.9.1
Adrian Hunter
maintainerPATCH v2 12/15 mmc: sdhci-esdhc-imx: factor out hw related initialization into function
Quoted 8 lines · Dong Aisheng
Move all hw related static initializations into a separate function which helps concentrate the hw related initialization code. And that function could also be called by other places later as a basic hw state restore.
e.g. suspend/resume where the hw state is possible to lost due to low power mode.Signed-off-by Dong Aisheng <[email protected]>
Quoted 107 lines
--- drivers/mmc/host/sdhci-esdhc-imx.c | 72 +++++++++++++++++++++----------------- 1 file changed, 40 insertions(+), 32 deletions(-)drivers/mmc/host/sdhci-esdhc-imx.c +40
-32@@ -979,6 +979,44 @@ static const struct sdhci_pltfm_data sdhci_esdhc_imx_pdata = { .ops = &sdhci_esdhc_ops, }; +static void sdhci_esdhc_imx_hwinit (struct sdhci_host *host) +{ +struct sdhci_pltfm_host *pltfm_host =sdhci_priv (host); +struct pltfm_imx_data *imx_data =sdhci_pltfm_priv (pltfm_host); + +if (esdhc_is_usdhc (imx_data)) { +/* +* The imx6q ROM code will change the default watermark +* level setting to something insane. Change it back here. +*/ +writel (ESDHC_WTMK_DEFAULT_VAL , host->ioaddr +ESDHC_WTMK_LVL ); + +/* +* ROM code will change the bit burst_length_enable setting +* to zero if this usdhc is choosed to boot system. Change +* it back here, otherwise it will impact the performance a +* lot. This bit is used to enable/disable the burst length +* for the external AHB2AXI bridge, it's usefully especially +* for INCR transfer because without burst length indicator, +* the AHB2AXI bridge does not know the burst length in +* advance. And without burst length indicator, AHB INCR +* transfer can only be converted to singles on the AXI side. +*/ +writel (readl (host->ioaddr +SDHCI_HOST_CONTROL ) + |ESDHC_BURST_LEN_EN_INCR , + host->ioaddr +SDHCI_HOST_CONTROL ); +/* +* errata ESDHC_FLAG_ERR004536 fix for MX6Q TO1.2 and MX6DL +* TO1.1, it's harmless for MX6SL +*/ +writel (readl (host->ioaddr +0x6c ) |BIT (7 ), + host->ioaddr +0x6c ); + +/* disable DLL_CTRL delay line settings */ +writel (0x0 , host->ioaddr +ESDHC_DLL_CTRL ); + } +} +#ifdef CONFIG_OF static int sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,@@ -1176,43 +1214,11 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev) host->quirks |=SDHCI_QUIRK_NO_MULTIBLOCK |SDHCI_QUIRK_BROKEN_ADMA ; -/* -* The imx6q ROM code will change the default watermark level setting -* to something insane. Change it back here. -*/ if (esdhc_is_usdhc (imx_data)) { -writel (ESDHC_WTMK_DEFAULT_VAL , host->ioaddr +ESDHC_WTMK_LVL ); - host->quirks2 |=SDHCI_QUIRK2_PRESET_VALUE_BROKEN ; host->mmc->caps |=MMC_CAP_1_8V_DDR ; - -/* -* ROM code will change the bit burst_length_enable setting -* to zero if this usdhc is choosed to boot system. Change -* it back here, otherwise it will impact the performance a -* lot. This bit is used to enable/disable the burst length -* for the external AHB2AXI bridge, it's usefully especially -* for INCR transfer because without burst length indicator, -* the AHB2AXI bridge does not know the burst length in -* advance. And without burst length indicator, AHB INCR -* transfer can only be converted to singles on the AXI side. -*/ -writel (readl (host->ioaddr +SDHCI_HOST_CONTROL ) - |ESDHC_BURST_LEN_EN_INCR , - host->ioaddr +SDHCI_HOST_CONTROL ); -if (!(imx_data->socdata->flags &ESDHC_FLAG_HS200 )) host->quirks2 |=SDHCI_QUIRK2_BROKEN_HS200 ; - -/* -* errata ESDHC_FLAG_ERR004536 fix for MX6Q TO1.2 and MX6DL -* TO1.1, it's harmless for MX6SL -*/ -writel (readl (host->ioaddr +0x6c ) |BIT (7 ), - host->ioaddr +0x6c ); - -/* disable DLL_CTRL delay line settings */ -writel (0x0 , host->ioaddr +ESDHC_DLL_CTRL ); }if (imx_data->socdata->flags &ESDHC_FLAG_MAN_TUNING )@@ -1237,6 +1243,8 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)if (err) goto disable_clk; +sdhci_esdhc_imx_hwinit (host); + err =sdhci_add_host (host);if (err) goto disable_clk;
PATCH v2 13/15 mmc: sdhci-esdhc-imx: move tuning static configuration into hwinit function
In reply to Dong AishengMove tuning static configuration into basic hwinit function. Tuning configuration may also be lost in low power mode, so need restore in hwinit().
--- drivers/mmc/host/sdhci-esdhc-imx.c | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-)
drivers/mmc/host/sdhci-esdhc-imx.c +18 -18
@@ -484,7 +484,6 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg) }else if (imx_data->socdata->flags &ESDHC_FLAG_STD_TUNING ) {u32 v =readl (host->ioaddr +SDHCI_ACMD12_ERR );u32 m =readl (host->ioaddr +ESDHC_MIX_CTRL ); -u32 tuning_ctrl;if (val &SDHCI_CTRL_TUNED_CLK ) { v |=ESDHC_MIX_CTRL_SMPCLK_SEL ; }else {
@@ -497,18 +496,6 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg) v |=ESDHC_MIX_CTRL_EXE_TUNE ; m |=ESDHC_MIX_CTRL_FBCLK_SEL ; m |=ESDHC_MIX_CTRL_AUTO_TUNE_EN ; - tuning_ctrl =readl (host->ioaddr +ESDHC_TUNING_CTRL ); - tuning_ctrl |=ESDHC_STD_TUNING_EN |ESDHC_TUNING_START_TAP_DEFAULT ; -if (imx_data->boarddata.tuning_start_tap) { - tuning_ctrl &= ~ESDHC_TUNING_START_TAP_MASK ; - tuning_ctrl |= imx_data->boarddata.tuning_start_tap; - } - -if (imx_data->boarddata.tuning_step) { - tuning_ctrl &= ~ESDHC_TUNING_STEP_MASK ; - tuning_ctrl |= imx_data->boarddata.tuning_step <<ESDHC_TUNING_STEP_SHIFT ; - } -writel (tuning_ctrl, host->ioaddr +ESDHC_TUNING_CTRL ); }else { v &= ~ESDHC_MIX_CTRL_EXE_TUNE ; }
@@ -983,6 +970,7 @@ static void sdhci_esdhc_imx_hwinit(struct sdhci_host *host) {struct sdhci_pltfm_host *pltfm_host =sdhci_priv (host);struct pltfm_imx_data *imx_data =sdhci_pltfm_priv (pltfm_host); +int tmp;if (esdhc_is_usdhc (imx_data)) {/*
@@ -1014,6 +1002,23 @@ static void sdhci_esdhc_imx_hwinit(struct sdhci_host *host)/* disable DLL_CTRL delay line settings */ writel (0x0 , host->ioaddr +ESDHC_DLL_CTRL ); + +if (imx_data->socdata->flags &ESDHC_FLAG_STD_TUNING ) { + tmp =readl (host->ioaddr +ESDHC_TUNING_CTRL ); + tmp |=ESDHC_STD_TUNING_EN | +ESDHC_TUNING_START_TAP_DEFAULT ; +if (imx_data->boarddata.tuning_start_tap) { + tmp &= ~ESDHC_TUNING_START_TAP_MASK ; + tmp |= imx_data->boarddata.tuning_start_tap; + } + +if (imx_data->boarddata.tuning_step) { + tmp &= ~ESDHC_TUNING_STEP_MASK ; + tmp |= imx_data->boarddata.tuning_step + <<ESDHC_TUNING_STEP_SHIFT ; + } +writel (tmp, host->ioaddr +ESDHC_TUNING_CTRL ); + } } }
@@ -1225,11 +1230,6 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev) sdhci_esdhc_ops.platform_execute_tuning = esdhc_executing_tuning; -if (imx_data->socdata->flags &ESDHC_FLAG_STD_TUNING ) -writel (readl (host->ioaddr +ESDHC_TUNING_CTRL ) | -ESDHC_STD_TUNING_EN |ESDHC_TUNING_START_TAP_DEFAULT , - host->ioaddr +ESDHC_TUNING_CTRL ); -if (imx_data->socdata->flags &ESDHC_FLAG_ERR004536 ) host->quirks |=SDHCI_QUIRK_BROKEN_ADMA ;
Signature · 1 line
1.9.1
PATCH v2 14/15 mmc: sdhci-esdhci-imx: re-initialize hw state after resume
In reply to Dong Aishengsdhci_esdhc_imx_hwinit() includes all basic hw intialization. Calling it after resume to re-initialize hw in case its state is already lost in low power mode.
--- drivers/mmc/host/sdhci-esdhc-imx.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-)
drivers/mmc/host/sdhci-esdhc-imx.c +2 -5
@@ -1297,12 +1297,9 @@ static int sdhci_esdhc_suspend(struct device *dev)static int sdhci_esdhc_resume (struct device *dev) {struct sdhci_host *host =dev_get_drvdata (dev); -struct sdhci_pltfm_host *pltfm_host =sdhci_priv (host); -struct pltfm_imx_data *imx_data =sdhci_pltfm_priv (pltfm_host); -/* restore watermark setting in case it's lost in low power mode */ -if (esdhc_is_usdhc (imx_data)) -writel (ESDHC_WTMK_DEFAULT_VAL , host->ioaddr +ESDHC_WTMK_LVL ); +/* re-initialize hw state in case it's lost in low power mode */ +sdhci_esdhc_imx_hwinit (host);return sdhci_pltfm_resume (dev); }
Signature · 1 line
1.9.1
Adrian Hunter
maintainerPATCH v2 14/15 mmc: sdhci-esdhci-imx: re-initialize hw state after resume
Quoted 5 lines · Dong Aisheng
sdhci_esdhc_imx_hwinit()includes all basic hw intialization. Calling it after resume to re-initialize hw in case its state is already lost in low power mode.Signed-off-by Dong Aisheng <[email protected]>
Quoted 24 lines
--- drivers/mmc/host/sdhci-esdhc-imx.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-)drivers/mmc/host/sdhci-esdhc-imx.c +2
-5@@ -1297,12 +1297,9 @@ static int sdhci_esdhc_suspend(struct device *dev)static int sdhci_esdhc_resume (struct device *dev) {struct sdhci_host *host =dev_get_drvdata (dev); -struct sdhci_pltfm_host *pltfm_host =sdhci_priv (host); -struct pltfm_imx_data *imx_data =sdhci_pltfm_priv (pltfm_host); -/* restore watermark setting in case it's lost in low power mode */ -if (esdhc_is_usdhc (imx_data)) -writel (ESDHC_WTMK_DEFAULT_VAL , host->ioaddr +ESDHC_WTMK_LVL ); +/* re-initialize hw state in case it's lost in low power mode */ +sdhci_esdhc_imx_hwinit (host);return sdhci_pltfm_resume (dev); }
PATCH v2 15/15 mmc: sdhci-esdhc-imx: clear tuning bits during driver probe
In reply to Dong AishengThe tuning bits like FBCLK_SEL, SMP_CLK_SEL and DLY_CELL which affects timing may have already been set by ROM if booting from SD3.0 mode like SDR104. Let's clear it first during driver probe before doing the new card enumeration to avoid working on the wrong timing.
Note that tuning bits are dynamical settings which may need to be kept during MMC_PM_KEEP_POWER suspend, so we did not put them into hwinit function.
--- drivers/mmc/host/sdhci-esdhc-imx.c | 5 +++++ 1 file changed, 5 insertions(+)
drivers/mmc/host/sdhci-esdhc-imx.c +5 -0
@@ -1224,6 +1224,11 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev) host->mmc->caps |=MMC_CAP_1_8V_DDR ;if (!(imx_data->socdata->flags &ESDHC_FLAG_HS200 )) host->quirks2 |=SDHCI_QUIRK2_BROKEN_HS200 ; + +/* clear tuning bits in case ROM has set it already */ +writel (0x0 , host->ioaddr +ESDHC_MIX_CTRL ); +writel (0x0 , host->ioaddr +SDHCI_ACMD12_ERR ); +writel (0x0 , host->ioaddr +ESDHC_TUNE_CTRL_STATUS ); }if (imx_data->socdata->flags &ESDHC_FLAG_MAN_TUNING )
Signature · 1 line
1.9.1
Adrian Hunter
maintainerPATCH v2 15/15 mmc: sdhci-esdhc-imx: clear tuning bits during driver probe
Quoted 10 lines · Dong Aisheng
The tuning bits like
FBCLK_SEL,SMP_CLK_SELandDLY_CELLwhich affects timing may have already been set by ROM if booting from SD3.0 mode like SDR104. Let's clear it first during driver probe before doing the new card enumeration to avoid working on the wrong timing.Note that tuning bits are dynamical settings which may need to be kept during
MMC_PM_KEEP_POWERsuspend, so we did not put them into hwinit function.Signed-off-by Dong Aisheng <[email protected]>
Quoted 21 lines
--- drivers/mmc/host/sdhci-esdhc-imx.c | 5 +++++ 1 file changed, 5 insertions(+)drivers/mmc/host/sdhci-esdhc-imx.c +5
-0@@ -1224,6 +1224,11 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev) host->mmc->caps |=MMC_CAP_1_8V_DDR ;if (!(imx_data->socdata->flags &ESDHC_FLAG_HS200 )) host->quirks2 |=SDHCI_QUIRK2_BROKEN_HS200 ; + +/* clear tuning bits in case ROM has set it already */ +writel (0x0 , host->ioaddr +ESDHC_MIX_CTRL ); +writel (0x0 , host->ioaddr +SDHCI_ACMD12_ERR ); +writel (0x0 , host->ioaddr +ESDHC_TUNE_CTRL_STATUS ); }if (imx_data->socdata->flags &ESDHC_FLAG_MAN_TUNING )
v2 cover a few sdhci/imx clean up and fix patches
In reply to Dong AishengQuoted 2 lines · Dong Aisheng
Patch 1~10 are mainly sdhci cleanup patches while patch 7,9,10 are fixes which seems needed for stable tree as well.
Hi Dong
Fixed should be first, so they can be cherry-picked into stable. Cleanups come afterwards, since they will not be back ported into stable.
Please change the order of the patches within the series.
Andrew
Quoted 65 lines
The main work is:
1) using more robustmmc_regulator_set_vqmmc
2) add auto retune support
3) improve sdhci-esdhc-imx stability
4) add state save and restore for low power modeChange Log:
v1->v2:
* address all Andrian's comments
* below patches are dropped
mmc: sdhci: movesdhci_get_cd()forward to avoid declaration
mmc: core: fix a comment typo
mmc: sdhci: re-factorsdhci_start_signal_voltage()
mmc: core:mmc_regulator_set_vqmmcnot return error if vqmmc/vmmc not
exist
mmc: sdhci: checkSDHCI_QUIRK2_NO_1_8_Vwhen do voltage switch
mmc: sdhci: rename quirkSDHCI_QUIRK_MULTIBLOCK_READ_ACMD12
Above clean up is not needed so far according to Andrian.mmc: sdhci: fix incorrect get data interrupt during no data transfer
This one is not needed anymore cause Andrian had another fix already in tree.
(commit0e0a35d2d4058mmc: sdhci: Track whether a reset is pending)mmc: core: disable auto retune during card detection process
This one will sent out in another patch series to fix in CORE.v1:
http://www.spinics.net/lists/linux-mmc/msg36316.htmlDong Aisheng (15):
mmc: sdhci: using commonmmc_regulator_set_vqmmc()
mmc: sdhci-esdhc-imx: removeSDHCI_QUIRK_BROKEN_TIMEOUT_VAL
mmc: sdhci-esdhc-imx: add esdhc specific suspend resume callback
mmc: sdhci-esdhc-imx: restore watermark level setting after resume
mmc: sdhci-esdhci-imx: disable DLL delay line settings explicitly
mmc: sdhci-esdhc-imx: support setting tuning start point
doc: dt: fsl-imx-esdhc: add set tuning start point binding
mmc: sdhci: add standard hw auto retuning support
mmc: sdhci-esdhc-imx: enable hw auto retuning forSTD_TUNING
mmc: sdhci-esdhc-imx: enable hw auto retuning forMAN_TUNING
mmc: sdhci-esdhc-imx: fix strobe DLL lock wrong clock issue
mmc: sdhci-esdhc-imx: factor out hw related initialization into
function
mmc: sdhci-esdhc-imx: move tuning static configuration into hwinit
function
mmc: sdhci-esdhci-imx: re-initialize hw state after resume
mmc: sdhci-esdhc-imx: clear tuning bits during driver probe.../devicetree/bindings/mmc/fsl-imx-esdhc.txt | 2 + drivers/mmc/host/sdhci-esdhc-imx.c | 149 ++++++++++++++------- drivers/mmc/host/sdhci.c | 24 ++-- drivers/mmc/host/sdhci.h | 3 + include/linux/platform_data/mmc-esdhc-imx.h | 1 + 5 files changed, 122 insertions(+), 57 deletions(-)Signature · 7 lines
1.9.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel at lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
v2 cover a few sdhci/imx clean up and fix patches
Quoted 4 lines · Andrew Lunn
Quoted 2 lines · Dong Aisheng
Patch 1~10 are mainly sdhci cleanup patches while patch 7,9,10 are fixes which seems needed for stable tree as well.
Sorry for above a bit misleading information derived from V1
Quoted 6 lines
Hi Dong
Fixed should be first, so they can be cherry-picked into stable. Cleanups come afterwards, since they will not be back ported into stable.
Thanks for the suggestion.
I think except patch 2 (mmc: sdhci-esdhc-imx: remove SDHCI_QUIRK_BROKEN_TIMEOUT_VAL) which is only a one line change, all others are good to be cherry-picked into stable since they improves the stability and avoid potential issue. Patch 2 seems won't block the cherry-pick.
So do you want me to reorder and resend?
Besides it, another patch in V1 as follows should also go to stable.
mmc: sdhci: fix incorrect get data interrupt during no data transfer I could send it separately for stable tree.
Regards
Dong Aisheng
Quoted 70 lines
Please change the order of the patches within the series.
Andrew
Quoted 65 lines
The main work is:
1) using more robustmmc_regulator_set_vqmmc
2) add auto retune support
3) improve sdhci-esdhc-imx stability
4) add state save and restore for low power modeChange Log:
v1->v2:
* address all Andrian's comments
* below patches are dropped
mmc: sdhci: movesdhci_get_cd()forward to avoid declaration
mmc: core: fix a comment typo
mmc: sdhci: re-factorsdhci_start_signal_voltage()
mmc: core:mmc_regulator_set_vqmmcnot return error if vqmmc/vmmc not
exist
mmc: sdhci: checkSDHCI_QUIRK2_NO_1_8_Vwhen do voltage switch
mmc: sdhci: rename quirkSDHCI_QUIRK_MULTIBLOCK_READ_ACMD12
Above clean up is not needed so far according to Andrian.mmc: sdhci: fix incorrect get data interrupt during no data transfer
This one is not needed anymore cause Andrian had another fix already in tree.
(commit0e0a35d2d4058mmc: sdhci: Track whether a reset is pending)mmc: core: disable auto retune during card detection process
This one will sent out in another patch series to fix in CORE.v1:
http://www.spinics.net/lists/linux-mmc/msg36316.htmlDong Aisheng (15):
mmc: sdhci: using commonmmc_regulator_set_vqmmc()
mmc: sdhci-esdhc-imx: removeSDHCI_QUIRK_BROKEN_TIMEOUT_VAL
mmc: sdhci-esdhc-imx: add esdhc specific suspend resume callback
mmc: sdhci-esdhc-imx: restore watermark level setting after resume
mmc: sdhci-esdhci-imx: disable DLL delay line settings explicitly
mmc: sdhci-esdhc-imx: support setting tuning start point
doc: dt: fsl-imx-esdhc: add set tuning start point binding
mmc: sdhci: add standard hw auto retuning support
mmc: sdhci-esdhc-imx: enable hw auto retuning forSTD_TUNING
mmc: sdhci-esdhc-imx: enable hw auto retuning forMAN_TUNING
mmc: sdhci-esdhc-imx: fix strobe DLL lock wrong clock issue
mmc: sdhci-esdhc-imx: factor out hw related initialization into
function
mmc: sdhci-esdhc-imx: move tuning static configuration into hwinit
function
mmc: sdhci-esdhci-imx: re-initialize hw state after resume
mmc: sdhci-esdhc-imx: clear tuning bits during driver probe.../devicetree/bindings/mmc/fsl-imx-esdhc.txt | 2 + drivers/mmc/host/sdhci-esdhc-imx.c | 149 ++++++++++++++------- drivers/mmc/host/sdhci.c | 24 ++-- drivers/mmc/host/sdhci.h | 3 + include/linux/platform_data/mmc-esdhc-imx.h | 1 + 5 files changed, 122 insertions(+), 57 deletions(-)Signature · 7 lines
1.9.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel at lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
v2 cover a few sdhci/imx clean up and fix patches
Quoted 4 lines
Thanks for the suggestion.
I think except patch 2 (mmc: sdhci-esdhc-imx: removeSDHCI_QUIRK_BROKEN_TIMEOUT_VAL) which is only a one line change, all others are good to be cherry-picked into stable.
You need to be very explicit about what you want going into stable. Otherwise none of them will end up in stable.
Documentation/SubmittingPatches says you should include a Fixes: tag in each patch indicating when the bug you are fixing was added to the kernel. You should also be including Cc: stable at vger.kernel.org.
Andrew
Adrian Hunter
maintainerv2 cover a few sdhci/imx clean up and fix patches
In reply to Dong AishengQuoted 2 lines · Dong Aisheng
Patch 1~10 are mainly sdhci cleanup patches while patch 7,9,10 are fixes which seems needed for stable tree as well.
I have ack'ed all the sdhci-related patches. i.e. all but patch 7 the dt bindings change.
I am not sure what needs to be done for stable. I would suggest these patches are queued for 4.8, then Dong can send the relevant patches to the linux-stable mailing list separately after -rc1.
Quoted 57 lines
The main work is:
1) using more robustmmc_regulator_set_vqmmc
2) add auto retune support
3) improve sdhci-esdhc-imx stability
4) add state save and restore for low power modeChange Log:
v1->v2:
* address all Adrian's comments
* below patches are dropped
mmc: sdhci: movesdhci_get_cd()forward to avoid declaration
mmc: core: fix a comment typo
mmc: sdhci: re-factorsdhci_start_signal_voltage()
mmc: core:mmc_regulator_set_vqmmcnot return error if vqmmc/vmmc not
exist
mmc: sdhci: checkSDHCI_QUIRK2_NO_1_8_Vwhen do voltage switch
mmc: sdhci: rename quirkSDHCI_QUIRK_MULTIBLOCK_READ_ACMD12
Above clean up is not needed so far according to Adrian.mmc: sdhci: fix incorrect get data interrupt during no data transfer
This one is not needed anymore cause Adrian had another fix already in tree.
(commit0e0a35d2d4058mmc: sdhci: Track whether a reset is pending)mmc: core: disable auto retune during card detection process
This one will sent out in another patch series to fix in CORE.v1:
http://www.spinics.net/lists/linux-mmc/msg36316.htmlDong Aisheng (15):
mmc: sdhci: using commonmmc_regulator_set_vqmmc()
mmc: sdhci-esdhc-imx: removeSDHCI_QUIRK_BROKEN_TIMEOUT_VAL
mmc: sdhci-esdhc-imx: add esdhc specific suspend resume callback
mmc: sdhci-esdhc-imx: restore watermark level setting after resume
mmc: sdhci-esdhci-imx: disable DLL delay line settings explicitly
mmc: sdhci-esdhc-imx: support setting tuning start point
doc: dt: fsl-imx-esdhc: add set tuning start point binding
mmc: sdhci: add standard hw auto retuning support
mmc: sdhci-esdhc-imx: enable hw auto retuning forSTD_TUNING
mmc: sdhci-esdhc-imx: enable hw auto retuning forMAN_TUNING
mmc: sdhci-esdhc-imx: fix strobe DLL lock wrong clock issue
mmc: sdhci-esdhc-imx: factor out hw related initialization into
function
mmc: sdhci-esdhc-imx: move tuning static configuration into hwinit
function
mmc: sdhci-esdhci-imx: re-initialize hw state after resume
mmc: sdhci-esdhc-imx: clear tuning bits during driver probe.../devicetree/bindings/mmc/fsl-imx-esdhc.txt | 2 + drivers/mmc/host/sdhci-esdhc-imx.c | 149 ++++++++++++++------- drivers/mmc/host/sdhci.c | 24 ++-- drivers/mmc/host/sdhci.h | 3 + include/linux/platform_data/mmc-esdhc-imx.h | 1 + 5 files changed, 122 insertions(+), 57 deletions(-)
v2 cover a few sdhci/imx clean up and fix patches
Quoted 11 lines · Adrian Hunter
Quoted 2 lines · Dong Aisheng
Patch 1~10 are mainly sdhci cleanup patches while patch 7,9,10 are fixes which seems needed for stable tree as well.
I have ack'ed all the sdhci-related patches. i.e. all but patch 7 the dt bindings change.
I am not sure what needs to be done for stable. I would suggest these patches are queued for 4.8, then Dong can send the relevant patches to the linux-stable mailing list separately after -rc1.
Good suggestion!
I also think that would be a better way due to many updates recently which may cause trouble on the simply back porting.
Regards
Dong Aisheng
Quoted 58 lines
Quoted 57 lines
The main work is:
1) using more robustmmc_regulator_set_vqmmc
2) add auto retune support
3) improve sdhci-esdhc-imx stability
4) add state save and restore for low power modeChange Log:
v1->v2:
* address all Adrian's comments
* below patches are dropped
mmc: sdhci: movesdhci_get_cd()forward to avoid declaration
mmc: core: fix a comment typo
mmc: sdhci: re-factorsdhci_start_signal_voltage()
mmc: core:mmc_regulator_set_vqmmcnot return error if vqmmc/vmmc not
exist
mmc: sdhci: checkSDHCI_QUIRK2_NO_1_8_Vwhen do voltage switch
mmc: sdhci: rename quirkSDHCI_QUIRK_MULTIBLOCK_READ_ACMD12
Above clean up is not needed so far according to Adrian.mmc: sdhci: fix incorrect get data interrupt during no data transfer
This one is not needed anymore cause Adrian had another fix already in tree.
(commit0e0a35d2d4058mmc: sdhci: Track whether a reset is pending)mmc: core: disable auto retune during card detection process
This one will sent out in another patch series to fix in CORE.v1:
http://www.spinics.net/lists/linux-mmc/msg36316.htmlDong Aisheng (15):
mmc: sdhci: using commonmmc_regulator_set_vqmmc()
mmc: sdhci-esdhc-imx: removeSDHCI_QUIRK_BROKEN_TIMEOUT_VAL
mmc: sdhci-esdhc-imx: add esdhc specific suspend resume callback
mmc: sdhci-esdhc-imx: restore watermark level setting after resume
mmc: sdhci-esdhci-imx: disable DLL delay line settings explicitly
mmc: sdhci-esdhc-imx: support setting tuning start point
doc: dt: fsl-imx-esdhc: add set tuning start point binding
mmc: sdhci: add standard hw auto retuning support
mmc: sdhci-esdhc-imx: enable hw auto retuning forSTD_TUNING
mmc: sdhci-esdhc-imx: enable hw auto retuning forMAN_TUNING
mmc: sdhci-esdhc-imx: fix strobe DLL lock wrong clock issue
mmc: sdhci-esdhc-imx: factor out hw related initialization into
function
mmc: sdhci-esdhc-imx: move tuning static configuration into hwinit
function
mmc: sdhci-esdhci-imx: re-initialize hw state after resume
mmc: sdhci-esdhc-imx: clear tuning bits during driver probe.../devicetree/bindings/mmc/fsl-imx-esdhc.txt | 2 + drivers/mmc/host/sdhci-esdhc-imx.c | 149 ++++++++++++++------- drivers/mmc/host/sdhci.c | 24 ++-- drivers/mmc/host/sdhci.h | 3 + include/linux/platform_data/mmc-esdhc-imx.h | 1 + 5 files changed, 122 insertions(+), 57 deletions(-)
Ulf Hansson
Appliedv2 cover a few sdhci/imx clean up and fix patches
In reply to Dong AishengQuoted 59 lines · Dong Aisheng
Patch 1~10 are mainly sdhci cleanup patches while patch 7,9,10 are fixes which seems needed for stable tree as well.
The main work is:
1) using more robustmmc_regulator_set_vqmmc
2) add auto retune support
3) improve sdhci-esdhc-imx stability
4) add state save and restore for low power modeChange Log:
v1->v2:
* address all Andrian's comments
* below patches are dropped
mmc: sdhci: movesdhci_get_cd()forward to avoid declaration
mmc: core: fix a comment typo
mmc: sdhci: re-factorsdhci_start_signal_voltage()
mmc: core:mmc_regulator_set_vqmmcnot return error if vqmmc/vmmc not
exist
mmc: sdhci: checkSDHCI_QUIRK2_NO_1_8_Vwhen do voltage switch
mmc: sdhci: rename quirkSDHCI_QUIRK_MULTIBLOCK_READ_ACMD12
Above clean up is not needed so far according to Andrian.mmc: sdhci: fix incorrect get data interrupt during no data transfer
This one is not needed anymore cause Andrian had another fix already in tree.
(commit0e0a35d2d4058mmc: sdhci: Track whether a reset is pending)mmc: core: disable auto retune during card detection process
This one will sent out in another patch series to fix in CORE.v1:
http://www.spinics.net/lists/linux-mmc/msg36316.htmlDong Aisheng (15):
mmc: sdhci: using commonmmc_regulator_set_vqmmc()
mmc: sdhci-esdhc-imx: removeSDHCI_QUIRK_BROKEN_TIMEOUT_VAL
mmc: sdhci-esdhc-imx: add esdhc specific suspend resume callback
mmc: sdhci-esdhc-imx: restore watermark level setting after resume
mmc: sdhci-esdhci-imx: disable DLL delay line settings explicitly
mmc: sdhci-esdhc-imx: support setting tuning start point
doc: dt: fsl-imx-esdhc: add set tuning start point binding
mmc: sdhci: add standard hw auto retuning support
mmc: sdhci-esdhc-imx: enable hw auto retuning forSTD_TUNING
mmc: sdhci-esdhc-imx: enable hw auto retuning forMAN_TUNING
mmc: sdhci-esdhc-imx: fix strobe DLL lock wrong clock issue
mmc: sdhci-esdhc-imx: factor out hw related initialization into
function
mmc: sdhci-esdhc-imx: move tuning static configuration into hwinit
function
mmc: sdhci-esdhci-imx: re-initialize hw state after resume
mmc: sdhci-esdhc-imx: clear tuning bits during driver probe.../devicetree/bindings/mmc/fsl-imx-esdhc.txt | 2 + drivers/mmc/host/sdhci-esdhc-imx.c | 149 ++++++++++++++------- drivers/mmc/host/sdhci.c | 24 ++-- drivers/mmc/host/sdhci.h | 3 + include/linux/platform_data/mmc-esdhc-imx.h | 1 + 5 files changed, 122 insertions(+), 57 deletions(-)
Quoted 3 lines
--
1.9.1
Thanks, applied for next!
Kind regards
Uffe