coresight-etm3x: Add ARM ETM 3.5 Cortex-A5 peripheral ID
PATCH v2 1/2 coresight-etm3x: Add ARM ETM 3.5 Cortex-A5 peripheral ID
--- drivers/hwtracing/coresight/coresight-etm3x.c | 5 +++++ 1 file changed, 5 insertions(+)
drivers/hwtracing/coresight/coresight-etm3x.c +5 -0
@@ -885,6 +885,11 @@ static struct amba_id etm_ids[] = { .mask = 0x0003ffff, .data = "ETM 3.3", }, + {/* ETM 3.5 - Cortex-A5 */ + .id = 0x0003b955, + .mask = 0x0003ffff, + .data = "ETM 3.5", + }, {/* ETM 3.5 */ .id = 0x0003b956, .mask = 0x0003ffff,
Signature · 1 line
1.9.1
PATCH v2 2/2 ARM: dts: at91: sama5d2: add ETM and ETB nodes
Add node to support SAMA5D2 Embedded Trace Macrocell and Embedded Trace Buffer.
This patch depends on coresight-etm3x: Add ARM ETM-A5 peripheral ID for proper coresight functionality.
It also depends on clocksource: timer-atmel-pit: enable mck to not stall SAMA5D2 on bootup.
--- arch/arm/boot/dts/sama5d2.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+)
arch/arm/boot/dts/sama5d2.dtsi +29 -0
@@ -77,6 +77,35 @@ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>; }; + etb { + compatible = "arm,coresight-etb10", "arm,primecell"; + reg = <0x740000 0x1000>; + + clocks = <&mck>; + clock-names = "apb_pclk"; + + port { + etb_in: endpoint { + slave-mode; + remote-endpoint = <&etm_out>; + }; + }; + }; + + etm { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0x73C000 0x1000>; + + clocks = <&mck>; + clock-names = "apb_pclk"; + + port { + etm_out: endpoint { + remote-endpoint = <&etb_in>; + }; + }; + }; + memory { reg = <0x20000000 0x20000000>; };
Signature · 1 line
1.9.1
PATCH v2 2/2 ARM: dts: at91: sama5d2: add ETM and ETB nodes
Quoted 54 lines · Olivier Schonken
Add node to support SAMA5D2 Embedded Trace Macrocell and Embedded Trace Buffer.
This patch depends on coresight-etm3x: Add ARM ETM-A5 peripheral ID for proper coresight functionality.
It also depends on clocksource: timer-atmel-pit: enable mck to not stall SAMA5D2 on bootup.Signed-off-by Olivier Schonken <[email protected]>--- arch/arm/boot/dts/sama5d2.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+)arch/arm/boot/dts/sama5d2.dtsi +29
-1@@ -77,6 +77,35 @@ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>; }; + etb { + compatible = "arm,coresight-etb10", "arm,primecell"; + reg = <0x740000 0x1000>; + + clocks = <&mck>; + clock-names = "apb_pclk"; + + port { + etb_in: endpoint { + slave-mode; + remote-endpoint = <&etm_out>; + }; + }; + }; + + etm { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0x73C000 0x1000>; + + clocks = <&mck>; + clock-names = "apb_pclk"; + + port { + etm_out: endpoint { + remote-endpoint = <&etb_in>; + }; + }; + }; + memory { reg = <0x20000000 0x20000000>; }; --
Quoted 2 lines
1.9.1
PATCH v2 2/2 ARM: dts: at91: sama5d2: add ETM and ETB nodes
Hi All
Just wondering if there are still some issues regarding the sama5d2 ETM and ETB nodes patch that I have to change/update.
If I should resend at a better time for it to not get lost in the noise just let me know.
I see that I accidentily left Boris out in the initial resend of the patch. My apologies. Will forward the initial send to him as well.
Regards
Olivier Schonken
Quoted 59 lines · Mathieu Poirier
Quoted 54 lines · Olivier Schonken
Add node to support SAMA5D2 Embedded Trace Macrocell and Embedded Trace Buffer.
This patch depends on coresight-etm3x: Add ARM ETM-A5 peripheral ID for proper coresight functionality.
It also depends on clocksource: timer-atmel-pit: enable mck to not stall SAMA5D2 on bootup.Signed-off-by Olivier Schonken <[email protected]>--- arch/arm/boot/dts/sama5d2.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+)arch/arm/boot/dts/sama5d2.dtsi +29
-1@@ -77,6 +77,35 @@ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>; }; + etb { + compatible = "arm,coresight-etb10", "arm,primecell"; + reg = <0x740000 0x1000>; + + clocks = <&mck>; + clock-names = "apb_pclk"; + + port { + etb_in: endpoint { + slave-mode; + remote-endpoint = <&etm_out>; + }; + }; + }; + + etm { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0x73C000 0x1000>; + + clocks = <&mck>; + clock-names = "apb_pclk"; + + port { + etm_out: endpoint { + remote-endpoint = <&etb_in>; + }; + }; + }; + memory { reg = <0x20000000 0x20000000>; }; --Quoted 2 lines
1.9.1
Acked-by Mathieu Poirier <[email protected]>
PATCH v2 2/2 ARM: dts: at91: sama5d2: add ETM and ETB nodes
Quoted 7 lines · Olivier Schonken
Hi All
Just wondering if there are still some issues regarding the sama5d2 ETM and ETB nodes patch that I have to change/update.
If I should resend at a better time for it to not get lost in the noise just let me know.
No action is needed on your side. This patch is still on my todo list and I'm planning to merge it for 4.9.
At first it was a bit late for 4.8 and finally, I forgot to take it inside my last DT pull request. It is my mistake, sorry about that.
Signature · 3 lines
Alexandre Belloni, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com
PATCH v2 2/2 ARM: dts: at91: sama5d2: add ETM and ETB nodes
In reply to Olivier SchonkenQuoted 9 lines · On Tue, 5 Jul 2016 10:05:50 +0200 Olivier Schonken…
Add node to support SAMA5D2 Embedded Trace Macrocell and Embedded Trace Buffer.
This patch depends on coresight-etm3x: Add ARM ETM-A5 peripheral ID for proper coresight functionality.
It also depends on clocksource: timer-atmel-pit: enable mck to not stall SAMA5D2 on bootup.Signed-off-by Olivier Schonken <[email protected]>
Quoted 44 lines
--- arch/arm/boot/dts/sama5d2.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+)arch/arm/boot/dts/sama5d2.dtsi +29
-0@@ -77,6 +77,35 @@ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>; }; + etb { + compatible = "arm,coresight-etb10", "arm,primecell"; + reg = <0x740000 0x1000>; + + clocks = <&mck>; + clock-names = "apb_pclk"; + + port { + etb_in: endpoint { + slave-mode; + remote-endpoint = <&etm_out>; + }; + }; + }; + + etm { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0x73C000 0x1000>; + + clocks = <&mck>; + clock-names = "apb_pclk"; + + port { + etm_out: endpoint { + remote-endpoint = <&etb_in>; + }; + }; + }; + memory { reg = <0x20000000 0x20000000>; };
Alexandre Belloni
AppliedPATCH v2 2/2 ARM: dts: at91: sama5d2: add ETM and ETB nodes
In reply to Olivier SchonkenQuoted 8 lines · Olivier Schonken
Add node to support SAMA5D2 Embedded Trace Macrocell and Embedded Trace Buffer.
This patch depends on coresight-etm3x: Add ARM ETM-A5 peripheral ID for proper coresight functionality.
It also depends on clocksource: timer-atmel-pit: enable mck to not stall SAMA5D2 on bootup.
Quoted 5 lines
Signed-off-by Olivier Schonken <[email protected]>--- arch/arm/boot/dts/sama5d2.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+)
Applied, thanks.
Signature · 3 lines
Alexandre Belloni, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com
PATCH v2 1/2 coresight-etm3x: Add ARM ETM 3.5 Cortex-A5 peripheral ID
In reply to Olivier SchonkenQuoted 22 lines · Olivier Schonken
Signed-off-by Olivier Schonken <[email protected]>--- drivers/hwtracing/coresight/coresight-etm3x.c | 5 +++++ 1 file changed, 5 insertions(+)drivers/hwtracing/coresight/coresight-etm3x.c +5
-1@@ -885,6 +885,11 @@ static struct amba_id etm_ids[] = { .mask = 0x0003ffff, .data = "ETM 3.3", }, + {/* ETM 3.5 - Cortex-A5 */ + .id = 0x0003b955, + .mask = 0x0003ffff, + .data = "ETM 3.5", + }, {/* ETM 3.5 */ .id = 0x0003b956, .mask = 0x0003ffff, --
Quoted 2 lines
1.9.1
Applied - thanks.
Mathieu