perf fixes
Subsystems (5)
Linus,
Please pull the latest perf-urgent-for-linus git tree from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git perf-urgent-for-linus
# HEAD: 674d2d69b14f677a771ceec4b48bfade94a0c5f1 Merge tag 'perf-core-for-mingo-20160725' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/core
This tree contains tooling fixes plus some additions:
- fixes to the vdso2c build environment that Stephen Rothwell is using for the linux-next build (Arnaldo Carvalho de Melo)
- AVX-512 instruction mappings (Adrian Hunter)
- misc fixes
Thanks,
Ingo
------------------>
Adrian Hunter (4):
x86/insn: perf tools: Fix vcvtph2ps instruction decoding x86/insn: Add AVX-512 support to the instruction decoder
perf tools: Add AVX-512 support to the instruction decoder used by Intel PT perf tools: Add AVX-512 instructions to the new instructions test
Arnaldo Carvalho de Melo (5):
perf tests kmod-path: Fix build on ubuntu:16.04-x-armhf tools build: Add HOSTARCH Makefile variable
objtool: Use tools/scripts/Makefile.arch to get ARCH and HOSTARCH
objtool: Always use host headers
Revert "perf tools: event.h needs asm/perf_regs.h"
Josh Poimboeuf (1):
tools build: Fix objtool build with ARCH=x86_64
Stephen Rothwell (1):
x86: Make the vdso2c compiler use the host architecture headers
arch/x86/entry/vdso/Makefile | 2 +- arch/x86/include/asm/inat.h | 17 +- arch/x86/include/asm/insn.h | 12 +- arch/x86/lib/insn.c | 18 +- arch/x86/lib/x86-opcode-map.txt | 263 ++- arch/x86/tools/gen-insn-attr-x86.awk | 11 +- tools/objtool/Build | 2 +- tools/objtool/Makefile | 8 +- tools/perf/arch/x86/tests/insn-x86-dat-32.c | 1018 ++++++++++- tools/perf/arch/x86/tests/insn-x86-dat-64.c | 940 +++++++++- tools/perf/arch/x86/tests/insn-x86-dat-src.c | 1789 ++++++++++++++++++++ tools/perf/tests/kmod-path.c | 1 + tools/perf/util/event.h | 1 - .../util/intel-pt-decoder/gen-insn-attr-x86.awk | 11 +- tools/perf/util/intel-pt-decoder/inat.h | 17 +- tools/perf/util/intel-pt-decoder/insn.c | 18 +- tools/perf/util/intel-pt-decoder/insn.h | 12 +- .../perf/util/intel-pt-decoder/x86-opcode-map.txt | 263 ++- tools/scripts/Makefile.arch | 41 +- 19 files changed, 4221 insertions(+), 223 deletions(-)
arch/x86/entry/vdso/Makefile +1 -1
@@ -55,7 +55,7 @@ VDSO_LDFLAGS_vdso.lds = -m64 -Wl,-soname=linux-vdso.so.1 \ $(obj)/vdso64.so.dbg: $(src)/vdso.lds $(vobjs) FORCE $(call if_changed,vdso) -HOST_EXTRACFLAGS += -I$(srctree)/tools/include -I$(srctree)/include/uapi -I$(srctree)/arch/x86/include/uapi +HOST_EXTRACFLAGS += -I$(srctree)/tools/include -I$(srctree)/include/uapi -I$(srctree)/arch/$(SUBARCH)/include/uapi hostprogs-y += vdso2c quiet_cmd_vdso2c = VDSO2C $@
arch/x86/include/asm/inat.h +15 -2
@@ -48,6 +48,7 @@/* AVX VEX prefixes */ #define INAT_PFX_VEX2 13/* 2-bytes VEX prefix */ #define INAT_PFX_VEX3 14/* 3-bytes VEX prefix */ +#define INAT_PFX_EVEX 15/* EVEX prefix */ #define INAT_LSTPFX_MAX 3#define INAT_LGCPFX_MAX 11
@@ -89,6 +90,7 @@#define INAT_VARIANT (1 << (INAT_FLAG_OFFS + 4))#define INAT_VEXOK (1 << (INAT_FLAG_OFFS + 5))#define INAT_VEXONLY (1 << (INAT_FLAG_OFFS + 6)) +#define INAT_EVEXONLY (1 << (INAT_FLAG_OFFS + 7))/* Attribute making macros for attribute tables */ #define INAT_MAKE_PREFIX (pfx) (pfx << INAT_PFX_OFFS)#define INAT_MAKE_ESCAPE (esc) (esc << INAT_ESC_OFFS)
@@ -141,7 +143,13 @@ static inline int inat_last_prefix_id(insn_attr_t attr)static inline int inat_is_vex_prefix (insn_attr_t attr) { attr &=INAT_PFX_MASK ; -return attr ==INAT_PFX_VEX2 || attr ==INAT_PFX_VEX3 ; +return attr ==INAT_PFX_VEX2 || attr ==INAT_PFX_VEX3 || + attr ==INAT_PFX_EVEX ; +} + +static inline int inat_is_evex_prefix (insn_attr_t attr) +{ +return (attr &INAT_PFX_MASK ) ==INAT_PFX_EVEX ; }static inline int inat_is_vex3_prefix (insn_attr_t attr)
@@ -216,6 +224,11 @@ static inline int inat_accept_vex(insn_attr_t attr)static inline int inat_must_vex (insn_attr_t attr) { -return attr &INAT_VEXONLY ; +return attr & (INAT_VEXONLY |INAT_EVEXONLY ); +} + +static inline int inat_must_evex (insn_attr_t attr) +{ +return attr &INAT_EVEXONLY ; }#endif
arch/x86/include/asm/insn.h +11 -1
@@ -91,6 +91,7 @@ struct insn {#define X86_VEX_B (vex) ((vex) & 0x20)/* VEX3 Byte1 */ #define X86_VEX_L (vex) ((vex) & 0x04)/* VEX3 Byte2, VEX2 Byte1 */ /* VEX bit fields */ +#define X86_EVEX_M (vex) ((vex) & 0x03)/* EVEX Byte1 */ #define X86_VEX3_M (vex) ((vex) & 0x1f)/* VEX3 Byte1 */ #define X86_VEX2_M 1/* VEX2.M always 1 */ #define X86_VEX_V (vex) (((vex) & 0x78) >> 3)/* VEX3 Byte2, VEX2 Byte1 */
@@ -133,6 +134,13 @@ static inline int insn_is_avx(struct insn *insn)return (insn->vex_prefix.value !=0 ); } +static inline int insn_is_evex (struct insn *insn) +{ +if (!insn->prefixes.got) +insn_get_prefixes (insn); +return (insn->vex_prefix.nbytes ==4 ); +} +/* Ensure this instruction is decoded completely */ static inline int insn_complete (struct insn *insn) {
@@ -144,8 +152,10 @@ static inline insn_byte_t insn_vex_m_bits(struct insn *insn) {if (insn->vex_prefix.nbytes ==2 )/* 2 bytes VEX */ return X86_VEX2_M ; -else +else if (insn->vex_prefix.nbytes ==3 )/* 3 bytes VEX */ return X86_VEX3_M (insn->vex_prefix.bytes[1 ]); +else /* EVEX */ +return X86_EVEX_M (insn->vex_prefix.bytes[1 ]); }static inline insn_byte_t insn_vex_p_bits (struct insn *insn)
arch/x86/lib/insn.c +15 -3
@@ -155,14 +155,24 @@ void insn_get_prefixes(struct insn *insn)/* * In 32-bits mode, if the [7:6] bits (mod bits of * ModRM) on the second byte are not 11b, it is -* LDS or LES. +* LDS or LES or BOUND. */ if (X86_MODRM_MOD (b2) !=3 ) goto vex_end; } insn->vex_prefix.bytes[0 ] = b; insn->vex_prefix.bytes[1 ] = b2; -if (inat_is_vex3_prefix (attr)) { +if (inat_is_evex_prefix (attr)) { + b2 =peek_nbyte_next (insn_byte_t, insn,2 ); + insn->vex_prefix.bytes[2 ] = b2; + b2 =peek_nbyte_next (insn_byte_t, insn,3 ); + insn->vex_prefix.bytes[3 ] = b2; + insn->vex_prefix.nbytes =4 ; + insn->next_byte +=4 ; +if (insn->x86_64 &&X86_VEX_W (b2)) +/* VEX.W overrides opnd_size */ + insn->opnd_bytes =8 ; + }else if (inat_is_vex3_prefix (attr)) { b2 =peek_nbyte_next (insn_byte_t, insn,2 ); insn->vex_prefix.bytes[2 ] = b2; insn->vex_prefix.nbytes =3 ;
@@ -221,7 +231,9 @@ void insn_get_opcode(struct insn *insn) m =insn_vex_m_bits (insn); p =insn_vex_p_bits (insn); insn->attr =inat_get_avx_attribute (op, m, p); -if (!inat_accept_vex (insn->attr) && !inat_is_group (insn->attr)) +if ((inat_must_evex (insn->attr) && !insn_is_evex (insn)) || + (!inat_accept_vex (insn->attr) && + !inat_is_group (insn->attr))) insn->attr =0 ;/* This instruction is bad */ goto end;/* VEX has only 1 byte for opcode */ }
arch/x86/lib/x86-opcode-map.txt +171 -92
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arch/x86/tools/gen-insn-attr-x86.awk +8 -3
@@ -72,12 +72,14 @@ BEGIN { lprefix_expr = "\\((66|F2|F3)\\)" max_lprefix = 4 - # All opcodes starting with lower-case 'v' or with (v1) superscript + # All opcodes starting with lower-case 'v', 'k' or with (v1) superscript # accepts VEX prefix - vexok_opcode_expr = "^v.*" + vexok_opcode_expr = "^[vk].*" vexok_expr = "\\(v1\\)" # All opcodes with (v) superscript supports *only* VEX prefix vexonly_expr = "\\(v\\)" + # All opcodes with (ev) superscript supports *only* EVEX prefix + evexonly_expr = "\\(ev\\)" prefix_expr = "\\(Prefix\\)" prefix_num["Operand-Size"] = "INAT_PFX_OPNDSZ"
@@ -95,6 +97,7 @@ BEGIN { prefix_num["Address-Size"] = "INAT_PFX_ADDRSZ" prefix_num["VEX+1byte"] = "INAT_PFX_VEX2" prefix_num["VEX+2byte"] = "INAT_PFX_VEX3" + prefix_num["EVEX"] = "INAT_PFX_EVEX" clear_vars() }
@@ -319,7 +322,9 @@ function convert_operands(count,opnd, i,j,imm,mod) flags = add_flags(flags, "INAT_MODRM") # check VEX codes - if (match(ext, vexonly_expr)) + if (match(ext, evexonly_expr)) + flags = add_flags(flags, "INAT_VEXOK | INAT_EVEXONLY") + else if (match(ext, vexonly_expr)) flags = add_flags(flags, "INAT_VEXOK | INAT_VEXONLY") else if (match(ext, vexok_expr) || match(opcode, vexok_opcode_expr)) flags = add_flags(flags, "INAT_VEXOK")
tools/objtool/Build +1 -1
@@ -1,4 +1,4 @@ -objtool-y += arch/$(ARCH)/ +objtool-y += arch/$(SRCARCH)/ objtool-y += builtin-check.o objtool-y += elf.o objtool-y += special.o
tools/objtool/Makefile +3 -5
@@ -1,11 +1,9 @@ include ../scripts/Makefile.include +include ../scripts/Makefile.arch -ifndef ($(ARCH)) -ARCH ?= $(shell uname -m) ifeq ($(ARCH),x86_64) ARCH := x86 endif -endif # always use the host compiler CC = gcc
@@ -26,7 +24,7 @@ OBJTOOL_IN := $(OBJTOOL)-in.o all: $(OBJTOOL) -INCLUDES := -I$(srctree)/tools/include -I$(srctree)/tools/arch/$(ARCH)/include/uapi +INCLUDES := -I$(srctree)/tools/include -I$(srctree)/tools/arch/$(HOSTARCH)/include/uapi CFLAGS += -Wall -Werror $(EXTRA_WARNINGS) -fomit-frame-pointer -O2 -g $(INCLUDES) LDFLAGS += -lelf $(LIBSUBCMD)
@@ -35,7 +33,7 @@ elfshdr := $(shell echo '\#include <libelf.h>' | $(CC) $(CFLAGS) -x c -E - | gre CFLAGS += $(if $(elfshdr),,-DLIBELF_USE_DEPRECATED) AWK = awk -export srctree OUTPUT CFLAGS ARCH AWK +export srctree OUTPUT CFLAGS SRCARCH AWK include $(srctree)/tools/build/Makefile.include $(OBJTOOL_IN): fixdep FORCE
tools/perf/arch/x86/tests/insn-x86-dat-32.c +1014 -4
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tools/perf/arch/x86/tests/insn-x86-dat-64.c +936 -4
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tools/perf/arch/x86/tests/insn-x86-dat-src.c +1789 -0
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tools/perf/util/intel-pt-decoder/gen-insn-attr-x86.awk +8 -3
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tools/perf/util/intel-pt-decoder/inat.h +15 -2
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tools/perf/util/intel-pt-decoder/insn.c +15 -3
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tools/perf/util/intel-pt-decoder/insn.h +11 -1
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tools/perf/util/intel-pt-decoder/x86-opcode-map.txt +171 -92
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tools/scripts/Makefile.arch +36 -5
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