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ARM: dts: da850: Adjust the pinctrl muxing for the NAND on CS3

PATCH In review Karl Beldan 1 participant 4 messages Aug 3, 2016 – Aug 4, 2016 Device tree bindings

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#0 lore raw

PATCH 1/1 ARM: dts: da850: Adjust the pinctrl muxing for the NAND on CS3

- Adjust the settings to also allow driving EMA_D[8..15] for 16bits NANDs. These are shared with GPIO3[0..7] which have no in-tree user.
- Remove the useless CS4 setting

---
 arch/arm/boot/dts/da850.dtsi | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)
arch/arm/boot/dts/da850.dtsi +8 -4
index 3a00978..ae5dc18 100644
@@ -43,16 +43,20 @@
 
 			nand_cs3_pins: pinmux_nand_pins {
 				pinctrl-single,bits = <
-					/* EMA_OE, EMA_WE */
-					0x1c 0x00110000  0x00ff0000
-					/* EMA_CS[4],EMA_CS[3]*/
-					0x1c 0x00000110  0x00000ff0
+					/* EMA_OE, EMA_WE, EMA_CS[3] */
+					0x1c 0x00110010  0x00ff00f0
 					/*
 					 * EMA_D[0], EMA_D[1], EMA_D[2],
 					 * EMA_D[3], EMA_D[4], EMA_D[5],
 					 * EMA_D[6], EMA_D[7]
 					 */
 					0x24 0x11111111  0xffffffff
+					/*
+					 * EMA_D[8],  EMA_D[9],  EMA_D[10],
+					 * EMA_D[11], EMA_D[12], EMA_D[13],
+					 * EMA_D[14], EMA_D[15]
+					 */
+					0x20 0x11111111  0xffffffff
 					/* EMA_A[1], EMA_A[2] */
 					0x30 0x01100000  0x0ff00000
 				>;
Signature · 1 line
2.9.0.rc1
#1 lore raw
Quoted 4 lines · Karl Beldan

- Adjust the settings to also allow driving EMA_D[8..15] for 16bits NANDs. These are shared with GPIO3[0..7] which have no in-tree user.
- Remove the useless CS4 setting

Please drop it, I think it is better to create several pinctrls instead.

Karl

#2 lore raw
In reply to Karl Beldan

2016-08-03 17:06 GMT+00:00 Karl Beldan <[email protected]>:

Quoted 42 lines

- Adjust the settings to also allow driving EMA_D[8..15] for 16bits NANDs. These are shared with GPIO3[0..7] which have no in-tree user.
- Remove the useless CS4 setting

---
 arch/arm/boot/dts/da850.dtsi | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)
arch/arm/boot/dts/da850.dtsi +8 -5
index 3a00978..ae5dc18 100644
@@ -43,16 +43,20 @@
 
                        nand_cs3_pins: pinmux_nand_pins {
                                pinctrl-single,bits = <
-                                       /* EMA_OE, EMA_WE */
-                                       0x1c 0x00110000  0x00ff0000
-                                       /* EMA_CS[4],EMA_CS[3]*/
-                                       0x1c 0x00000110  0x00000ff0
+                                       /* EMA_OE, EMA_WE, EMA_CS[3] */
+                                       0x1c 0x00110010  0x00ff00f0
                                        /*
                                         * EMA_D[0], EMA_D[1], EMA_D[2],
                                         * EMA_D[3], EMA_D[4], EMA_D[5],
                                         * EMA_D[6], EMA_D[7]
                                         */
                                        0x24 0x11111111  0xffffffff
+                                       /*
+                                        * EMA_D[8],  EMA_D[9],  EMA_D[10],
+                                        * EMA_D[11], EMA_D[12], EMA_D[13],
+                                        * EMA_D[14], EMA_D[15]
+                                        */
+                                       0x20 0x11111111  0xffffffff
                                        /* EMA_A[1], EMA_A[2] */
                                        0x30 0x01100000  0x0ff00000
                                >;
--

2.9.0.rc1

Quoted 1 line

Please discard this one I think it is better that I make groups for the

NAND.

Karl

#3 lore raw

PATCH 1/1 ARM: dts: da850: Adjust the pinctrl muxing for the NAND on CS3

Quoted 36 lines · Karl Beldan

2016-08-03 17:06 GMT+00:00 Karl Beldan <[email protected]>:

Quoted 34 lines

- Adjust the settings to also allow driving EMA_D[8..15] for 16bits NANDs. These are shared with GPIO3[0..7] which have no in-tree user.
- Remove the useless CS4 setting

---
 arch/arm/boot/dts/da850.dtsi | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)
arch/arm/boot/dts/da850.dtsi +6 -4
index 3a00978..ae5dc18 100644
@@ -43,16 +43,20 @@
 
                        nand_cs3_pins: pinmux_nand_pins {
                                pinctrl-single,bits = <
-                                       /* EMA_OE, EMA_WE */
-                                       0x1c 0x00110000  0x00ff0000
-                                       /* EMA_CS[4],EMA_CS[3]*/
-                                       0x1c 0x00000110  0x00000ff0
+                                       /* EMA_OE, EMA_WE, EMA_CS[3] */
+                                       0x1c 0x00110010  0x00ff00f0
                                        /*
                                         * EMA_D[0], EMA_D[1], EMA_D[2],
                                         * EMA_D[3], EMA_D[4], EMA_D[5],
                                         * EMA_D[6], EMA_D[7]
                                         */
                                        0x24 0x11111111  0xffffffff
+                                       /*
+                                        * EMA_D[8],  EMA_D[9],  EMA_D[10],
+                                        * EMA_D[11], EMA_D[12], EMA_D[13],
+                                        * EMA_D[14], EMA_D[15]
Quoted 8 lines
Quoted 8 lines
arch/arm/boot/dts/da850.dtsi +2 -1
+                                        */
+                                       0x20 0x11111111  0xffffffff
                                        /* EMA_A[1], EMA_A[2] */
                                        0x30 0x01100000  0x0ff00000
                                >;
--

2.9.0.rc1

Please discard this one I think it is better that I make groups for the NAND.

Karl