i2c: intel_i2c: SMBus driver PCI addition (e.g. BayTrail)

PATCH Superseded Stefan Roese 4 participants 7 messages Aug 9, 2016 – Aug 18, 2016

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Stefan Roese

author

2016-08-09 05:41 UTC #0 lore raw

PATCH v2 1/1 i2c: intel_i2c: SMBus driver PCI addition (e.g. BayTrail)

This patch adds support for the SMBus block read/write functionality. Other protocols like the SMBus quick command need to get added if this is needed.

This patch also removed the SMBus related defines from the Ivybridge pch.h header. As they are integrated in this driver and should be used from here. This change is added in this patch to avoid compile breakage to keep the source git bisectable.

Tested on a congatec BayTrail board to configure the SMSC2513 USB hub.

Signed-off-by Stefan Roese <[email protected]>

Cc Bin Meng <[email protected]>

Cc Simon Glass <[email protected]>

Cc Heiko Schocher <[email protected]>

Cc George McCollister <[email protected]>

---
v2:
- Avoid using BSS. Patch from Simon intergrated to fix problem before relocation.
- Remove IvyBridge code and add PCI device for IvyBridge (Panther Point PCH).
- Add overrun check to smbus_block_read() as suggested by George

 arch/x86/include/asm/arch-ivybridge/pch.h |  26 ---
 drivers/i2c/intel_i2c.c                   | 290 +++++++++++++++++++++++++++---
 2 files changed, 269 insertions(+), 47 deletions(-)

arch/x86/include/asm/arch-ivybridge/pch.h +0 ~~-26~~

index 4725250..9c51f63 100644
@@ -134,32 +134,6 @@
 #define SATA_IOBP_SP0G3IR	0xea000151
 #define SATA_IOBP_SP1G3IR	0xea000051
 
-/* PCI Configuration Space (D31:F3): SMBus */
-#define PCH_SMBUS_DEV		PCI_BDF(0, 0x1f, 3)
-#define SMB_BASE		0x20
-#define HOSTC			0x40
-#define SMB_RCV_SLVA		0x09
-
-/* HOSTC bits */
-#define I2C_EN			(1 << 2)
-#define SMB_SMI_EN		(1 << 1)
-#define HST_EN			(1 << 0)
-
-/* SMBus I/O bits. */
-#define SMBHSTSTAT		0x0
-#define SMBHSTCTL		0x2
-#define SMBHSTCMD		0x3
-#define SMBXMITADD		0x4
-#define SMBHSTDAT0		0x5
-#define SMBHSTDAT1		0x6
-#define SMBBLKDAT		0x7
-#define SMBTRNSADD		0x9
-#define SMBSLVDATA		0xa
-#define SMLINK_PIN_CTL		0xe
-#define SMBUS_PIN_CTL		0xf
-
-#define SMBUS_TIMEOUT		(10 * 1000 * 100)
-
 #define VCH		0x0000	/* 32bit */
 #define VCAP1		0x0004	/* 32bit */
 #define VCAP2		0x0008	/* 32bit */

drivers/i2c/intel_i2c.c +269 ~~-21~~

328 lines not on this page · raw message

Signature · 1 line

2.9.2

Simon Glass

2016-08-10 02:59 UTC #1 lore raw

PATCH v2 1/1 i2c: intel_i2c: SMBus driver PCI addition (e.g. BayTrail)

Hi Stefan,

Quoted 25 lines · Stefan Roese

This patch adds support for the SMBus block read/write functionality. Other protocols like the SMBus quick command need to get added if this is needed.
This patch also removed the SMBus related defines from the Ivybridge pch.h header. As they are integrated in this driver and should be used from here. This change is added in this patch to avoid compile breakage to keep the source git bisectable.
Tested on a congatec BayTrail board to configure the SMSC2513 USB hub.
Signed-off-by Stefan Roese <[email protected]>
Cc Bin Meng <[email protected]>
Cc Simon Glass <[email protected]>
Cc Heiko Schocher <[email protected]>
Cc George McCollister <[email protected]>
---
v2:
- Avoid using BSS. Patch from Simon intergrated to fix problem before relocation.
- Remove IvyBridge code and add PCI device for IvyBridge (Panther Point PCH).
- Add overrun check to smbus_block_read() as suggested by George

Quoted 4 lines

 arch/x86/include/asm/arch-ivybridge/pch.h |  26 ---
 drivers/i2c/intel_i2c.c                   | 290 +++++++++++++++++++++++++++---
 2 files changed, 269 insertions(+), 47 deletions(-)

This does not crash, but I see nothing on the bus with 'i2c dev 0; i2c probe'. Is that expected?

Reviewed-by Simon Glass <[email protected]>

Bin Meng

2016-08-12 01:41 UTC #2 lore raw

PATCH v2 1/1 i2c: intel_i2c: SMBus driver PCI addition (e.g. BayTrail)

Quoted 33 lines · Simon Glass

Hi Stefan,
Quoted 25 lines · Stefan Roese
This patch adds support for the SMBus block read/write functionality. Other protocols like the SMBus quick command need to get added if this is needed.
This patch also removed the SMBus related defines from the Ivybridge pch.h header. As they are integrated in this driver and should be used from here. This change is added in this patch to avoid compile breakage to keep the source git bisectable.
Tested on a congatec BayTrail board to configure the SMSC2513 USB hub.
Signed-off-by Stefan Roese <[email protected]>
Cc Bin Meng <[email protected]>
Cc Simon Glass <[email protected]>
Cc Heiko Schocher <[email protected]>
Cc George McCollister <[email protected]>
---
v2:
- Avoid using BSS. Patch from Simon intergrated to fix problem before relocation.
- Remove IvyBridge code and add PCI device for IvyBridge (Panther Point PCH).
- Add overrun check to smbus_block_read() as suggested by George
Quoted 4 lines
 arch/x86/include/asm/arch-ivybridge/pch.h |  26 ---
 drivers/i2c/intel_i2c.c                   | 290 +++++++++++++++++++++++++++---
 2 files changed, 269 insertions(+), 47 deletions(-)

Quoted 4 lines

This does not crash, but I see nothing on the bus with 'i2c dev 0; i2c probe'. Is that expected?
Reviewed-by Simon Glass <[email protected]>

applied to u-boot-x86, thanks!

Stefan Roese

author

2016-08-15 10:02 UTC #3 lore raw

PATCH v2 1/1 i2c: intel_i2c: SMBus driver PCI addition (e.g. BayTrail)

In reply to Simon Glass

Hi Simon,

Quoted 26 lines · Simon Glass

Quoted 25 lines · Stefan Roese
This patch adds support for the SMBus block read/write functionality. Other protocols like the SMBus quick command need to get added if this is needed.
This patch also removed the SMBus related defines from the Ivybridge pch.h header. As they are integrated in this driver and should be used from here. This change is added in this patch to avoid compile breakage to keep the source git bisectable.
Tested on a congatec BayTrail board to configure the SMSC2513 USB hub.
Signed-off-by Stefan Roese <[email protected]>
Cc Bin Meng <[email protected]>
Cc Simon Glass <[email protected]>
Cc Heiko Schocher <[email protected]>
Cc George McCollister <[email protected]>
---
v2:
- Avoid using BSS. Patch from Simon intergrated to fix problem before relocation.
- Remove IvyBridge code and add PCI device for IvyBridge (Panther Point PCH).
- Add overrun check to smbus_block_read() as suggested by George

Quoted 7 lines

Quoted 4 lines
 arch/x86/include/asm/arch-ivybridge/pch.h |  26 ---
 drivers/i2c/intel_i2c.c                   | 290 +++++++++++++++++++++++++++---
 2 files changed, 269 insertions(+), 47 deletions(-)
This does not crash, but I see nothing on the bus with 'i2c dev 0; i2c probe'. Is that expected?

This depends on the devices available on the I2C bus. As SMBus defines multiples protocols (byte read/write, block read/write...), and your I2C devices probably don't support the currently implemented block read/write protocol, we need to find a way configure / switch the SMBus protocol. Do you have an idea on how to do this? Perhaps we need to add a config call for this to switch between the different protocols? And also add a way to do this from the cmdline. Perhaps "i2c flags" can be used for this?

Thanks,
Stefan

Simon Glass

2016-08-16 04:50 UTC #4 lore raw

PATCH v2 1/1 i2c: intel_i2c: SMBus driver PCI addition (e.g. BayTrail)

Hi Stefan,

Quoted 42 lines · Stefan Roese

Hi Simon,
Quoted 28 lines · Simon Glass
Quoted 26 lines · Stefan Roese
This patch adds support for the SMBus block read/write functionality. Other protocols like the SMBus quick command need to get added if this is needed.
This patch also removed the SMBus related defines from the Ivybridge pch.h header. As they are integrated in this driver and should be used from here. This change is added in this patch to avoid compile breakage to keep the source git bisectable.
Tested on a congatec BayTrail board to configure the SMSC2513 USB hub.
Signed-off-by Stefan Roese <[email protected]>
Cc Bin Meng <[email protected]>
Cc Simon Glass <[email protected]>
Cc Heiko Schocher <[email protected]>
Cc George McCollister <[email protected]>
---
v2:
- Avoid using BSS. Patch from Simon intergrated to fix problem before relocation.
- Remove IvyBridge code and add PCI device for IvyBridge (Panther Point PCH).
- Add overrun check to smbus_block_read() as suggested by George
Quoted 8 lines
Quoted 5 lines
 arch/x86/include/asm/arch-ivybridge/pch.h |  26 ---
 drivers/i2c/intel_i2c.c                   | 290
+++++++++++++++++++++++++++---
 2 files changed, 269 insertions(+), 47 deletions(-)
This does not crash, but I see nothing on the bus with 'i2c dev 0; i2c probe'. Is that expected?

Quoted 8 lines

This depends on the devices available on the I2C bus. As SMBus defines multiples protocols (byte read/write, block read/write...), and your I2C devices probably don't support the currently implemented block read/write protocol, we need to find a way configure / switch the SMBus protocol. Do you have an idea on how to do this? Perhaps we need to add a config call for this to switch between the different protocols? And also add a way to do this from the cmdline. Perhaps "i2c flags" can be used for this?

Yes I suppose a flag is the best idea. You should be able to add one to the existing flags. Then it can be configured from the device or via the command line 'i2c flags'.

Regards,
Simon

Heiko Schocher

2016-08-16 05:03 UTC #5 lore raw

PATCH v2 1/1 i2c: intel_i2c: SMBus driver PCI addition (e.g. BayTrail)

Hello Simon, Stefan,

Am 16.08.2016 um 06:50 schrieb Simon Glass:

Quoted 54 lines

Hi Stefan,
Quoted 42 lines · Stefan Roese
Hi Simon,
Quoted 28 lines · Simon Glass
Quoted 26 lines · Stefan Roese
This patch adds support for the SMBus block read/write functionality. Other protocols like the SMBus quick command need to get added if this is needed.
This patch also removed the SMBus related defines from the Ivybridge pch.h header. As they are integrated in this driver and should be used from here. This change is added in this patch to avoid compile breakage to keep the source git bisectable.
Tested on a congatec BayTrail board to configure the SMSC2513 USB hub.
Signed-off-by Stefan Roese <[email protected]>
Cc Bin Meng <[email protected]>
Cc Simon Glass <[email protected]>
Cc Heiko Schocher <[email protected]>
Cc George McCollister <[email protected]>
---
v2:
- Avoid using BSS. Patch from Simon intergrated to fix problem before relocation.
- Remove IvyBridge code and add PCI device for IvyBridge (Panther Point PCH).
- Add overrun check to smbus_block_read() as suggested by George
Quoted 8 lines
Quoted 5 lines
  arch/x86/include/asm/arch-ivybridge/pch.h |  26 ---
  drivers/i2c/intel_i2c.c                   | 290
+++++++++++++++++++++++++++---
  2 files changed, 269 insertions(+), 47 deletions(-)
This does not crash, but I see nothing on the bus with 'i2c dev 0; i2c probe'. Is that expected?
Quoted 8 lines
This depends on the devices available on the I2C bus. As SMBus defines multiples protocols (byte read/write, block read/write...), and your I2C devices probably don't support the currently implemented block read/write protocol, we need to find a way configure / switch the SMBus protocol. Do you have an idea on how to do this? Perhaps we need to add a config call for this to switch between the different protocols? And also add a way to do this from the cmdline. Perhaps "i2c flags" can be used for this?

Quoted 3 lines

Yes I suppose a flag is the best idea. You should be able to add one to the existing flags. Then it can be configured from the device or via the command line 'i2c flags'.

Yes, an "i2c flag" seems a good solution.

Hmm.. thinking about it ...

May we need such a functionality like in linux:/include/uapi/linux/i2c.h I2C_FUNC_* and i2c_check_functionality() ?

bye,
Heiko

Signature · 2 lines

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

Simon Glass

2016-08-18 03:44 UTC #6 lore raw

PATCH v2 1/1 i2c: intel_i2c: SMBus driver PCI addition (e.g. BayTrail)

Hi,

Quoted 69 lines · Heiko Schocher

Hello Simon, Stefan,
Am 16.08.2016 um 06:50 schrieb Simon Glass:
Quoted 60 lines
Hi Stefan,
Quoted 46 lines · Stefan Roese
Hi Simon,
Quoted 30 lines · Simon Glass
Quoted 27 lines · Stefan Roese
This patch adds support for the SMBus block read/write functionality. Other protocols like the SMBus quick command need to get added if this is needed.
This patch also removed the SMBus related defines from the Ivybridge pch.h header. As they are integrated in this driver and should be used from here. This change is added in this patch to avoid compile breakage to keep the source git bisectable.
Tested on a congatec BayTrail board to configure the SMSC2513 USB hub.
Signed-off-by Stefan Roese <[email protected]>
Cc Bin Meng <[email protected]>
Cc Simon Glass <[email protected]>
Cc Heiko Schocher <[email protected]>
Cc George McCollister <[email protected]>
---
v2:
- Avoid using BSS. Patch from Simon intergrated to fix problem before relocation.
- Remove IvyBridge code and add PCI device for IvyBridge (Panther Point PCH).
- Add overrun check to smbus_block_read() as suggested by George
Quoted 8 lines
Quoted 5 lines
  arch/x86/include/asm/arch-ivybridge/pch.h |  26 ---
  drivers/i2c/intel_i2c.c                   | 290
+++++++++++++++++++++++++++---
  2 files changed, 269 insertions(+), 47 deletions(-)
This does not crash, but I see nothing on the bus with 'i2c dev 0; i2c probe'. Is that expected?
Quoted 8 lines
This depends on the devices available on the I2C bus. As SMBus defines multiples protocols (byte read/write, block read/write...), and your I2C devices probably don't support the currently implemented block read/write protocol, we need to find a way configure / switch the SMBus protocol. Do you have an idea on how to do this? Perhaps we need to add a config call for this to switch between the different protocols? And also add a way to do this from the cmdline. Perhaps "i2c flags" can be used for this?
Quoted 3 lines
Yes I suppose a flag is the best idea. You should be able to add one to the existing flags. Then it can be configured from the device or via the command line 'i2c flags'.

Quoted 6 lines

Yes, an "i2c flag" seems a good solution.
Hmm.. thinking about it ...
May we need such a functionality like in linux:/include/uapi/linux/i2c.h I2C_FUNC_* and i2c_check_functionality() ?

Possibly. I wonder if struct dm_i2c_bus could have a capability flags value?

Regards,
Simon