Add R8A7792 DU support

Hello.

Here's the set of 2 patches against Simon Horman's 'renesas.git' repo,
'renesas-devel-20160725-v4.7-rc7' tag. We're adding the R8A7792 DU clocks and device nodes. They have been tested on the Blanche board -- I'm not posting the Blanche patch only because it also has some strange interaction with the Ethernet chip, so that NFS root can't work anymore...

[1/2] ARM: dts: r8a7792: add DU clocks
[2/2] ARM: dts: r8a7792: add DU support

WBR, Sergei

Describe the DU0/1 clocks and their parent, ZX clock in the R8A7792 device tree.

---
 arch/arm/boot/dts/r8a7792.dtsi |   13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

Index: renesas/arch/arm/boot/dts/r8a7792.dtsi
===================================================================
@@ -660,6 +660,13 @@
 			clock-div = <2>;
 			clock-mult = <1>;
 		};
+		zx_clk: zx {
+			compatible = "fixed-factor-clock";
+			clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
+			#clock-cells = <0>;
+			clock-div = <3>;
+			clock-mult = <1>;
+		};
 		zs_clk: zs {
 			compatible = "fixed-factor-clock";
 			clocks = <&cpg_clocks R8A7792_CLK_PLL1>;

@@ -761,15 +768,17 @@
 				     "renesas,cpg-mstp-clocks";
 			reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
 			clocks = <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>,
-				 <&p_clk>, <&p_clk>;
+				 <&p_clk>, <&p_clk>, <&zx_clk>, <&zx_clk>;
 			#clock-cells = <1>;
 			clock-indices = <
 				R8A7792_CLK_HSCIF1 R8A7792_CLK_HSCIF0
 				R8A7792_CLK_SCIF3 R8A7792_CLK_SCIF2
 				R8A7792_CLK_SCIF1 R8A7792_CLK_SCIF0
+				R8A7792_CLK_DU1 R8A7792_CLK_DU0
 			>;
 			clock-output-names = "hscif1", "hscif0", "scif3",
-					     "scif2", "scif1", "scif0";
+					     "scif2", "scif1", "scif0",
+					     "du1", "du0";
 		};
 		mstp8_clks: mstp8_clks at e6150990 {
 			compatible = "renesas,r8a7792-mstp-clocks",

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Define the generic R8A7792 part of the DU device node.

---
 arch/arm/boot/dts/r8a7792.dtsi |   28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

Index: renesas/arch/arm/boot/dts/r8a7792.dtsi
===================================================================
@@ -556,6 +556,34 @@
 			status = "disabled";
 		};
 
+		du: display at feb00000 {
+			compatible = "renesas,du-r8a7792";
+			reg = <0 0xfeb00000 0 0x40000>;
+			reg-names = "du";
+			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp7_clks R8A7792_CLK_DU0>,
+				 <&mstp7_clks R8A7792_CLK_DU1>;
+			clock-names = "du.0", "du.1";
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port at 0 {
+					reg = <0>;
+					du_out_rgb0: endpoint {
+					};
+				};
+				port at 1 {
+					reg = <1>;
+					du_out_rgb1: endpoint {
+					};
+				};
+			};
+		};
+
 		can0: can at e6e80000 {
 			compatible = "renesas,can-r8a7792",
 				     "renesas,rcar-gen2-can";

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Forgot to mention that the patch #2 depends on the R8A7792 DU driver patch
posted last night.

MBR, Sergei

Thanks.

The driver changes look line an incremental update to what is already done for other R-Car Gen2 SoCs. And I am assuming that applying these patches without the driver change is harmless - the driver just won't be initialised until both the driver and DTS changes are present.

With the above reasoning I have queued up these patches with Geert's reviewed-by tag. Please let me know if that is not desirable for some reason.

Hello.

Looks like this effect is confined to only one Blanche board, so I'm going
to start posting the pending patches.

WBR, Sergei