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ARM: dts: keystone-k2g: Add device state controller node

PATCH Superseded Andrew F. Davis 1 participant 3 messages Aug 9, 2016 Device tree bindings

v1 of 2 Superseded Latest is v2 →

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#0 lore raw

PATCH 1/3 ARM: dts: keystone-k2g: Add device state controller node

Add the device state controller node as a syscon node to the Keystone 2 Galileo SoC. This module provides similar device control functionality as that on the existing K2 SoCs.

One example usage would be the boot address programming of the DSP processor sub-system.

---
 arch/arm/boot/dts/keystone-k2g.dtsi | 5 +++++
 1 file changed, 5 insertions(+)
arch/arm/boot/dts/keystone-k2g.dtsi +5 -0
index 3372615..fe17dc4 100644
@@ -83,6 +83,11 @@
 			pinctrl-single,function-mask = <0x001b0007>;
 		};
 
+		devctrl: device-state-control@02620000 {
+			compatible = "ti,keystone-devctrl", "syscon";
+			reg = <0x02620000 0x1000>;
+		};
+
 		uart0: serial@02530c00 {
 			compatible = "ns16550a";
 			current-speed = <115200>;
Signature · 1 line
2.9.2
#1 lore raw

PATCH 2/3 ARM: dts: keystone-k2g: Add keystone IRQ controller node

Add the Keystone IRQ controller IP node on Keystone 2 Galileo SoC. This allows the ARM CorePac core to receive interrupts from remote processor devices (eg: DSP) on the SoC.

The IP is identical in functionality to that of the equivalent nodes on existing K2 SoCs. The only difference is the ARM INTC interrupt id/event number.

---
 arch/arm/boot/dts/keystone-k2g.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm/boot/dts/keystone-k2g.dtsi +8 -0
index fe17dc4..eccda9c 100644
@@ -98,5 +98,13 @@
 			clock-frequency = <200000000>;
 			status = "disabled";
 		};
+
+		kirq0: keystone_irq@026202a0 {
+			compatible = "ti,keystone-irq";
+			interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>;
+			interrupt-controller;
+			#interrupt-cells = <1>;
+			ti,syscon-dev = <&devctrl 0x2a0>;
+		};
 	};
 };
Signature · 1 line
2.9.2
#2 lore raw

PATCH 3/3 ARM: dts: keystone-k2g: Add DSP GPIO controller node

In reply to Andrew F. Davis

Add the DSP GPIO controller node on Keystone 2 Galileo SoC. This is used to send interrupts to the only DSP processor subsystem present on the SoC. The IP is identical to that of the equivalent nodes on existing K2 SoCs.

---
 arch/arm/boot/dts/keystone-k2g.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)
arch/arm/boot/dts/keystone-k2g.dtsi +7 -0
index eccda9c..025ad12 100644
@@ -106,5 +106,12 @@
 			#interrupt-cells = <1>;
 			ti,syscon-dev = <&devctrl 0x2a0>;
 		};
+
+		dspgpio0: keystone_dsp_gpio@02620240 {
+			compatible = "ti,keystone-dsp-gpio";
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio,syscon-dev = <&devctrl 0x240>;
+		};
 	};
 };
Signature · 1 line
2.9.2