Add DSP control nodes for K2G

Hello all,

This series adds the nodes needed to control the DSP available on this SoC. These are similar to the nodes already present the other K2x SoCs.

Thanks,
Andrew

Andrew F. Davis (3):
ARM: dts: keystone-k2g: Add device state controller node
ARM: dts: keystone-k2g: Add keystone IRQ controller node
ARM: dts: keystone-k2g: Add DSP GPIO controller node

 arch/arm/boot/dts/keystone-k2g.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

2.9.2

Add the device state controller node as a syscon node to the K2G SoC. This module provides similar device control functionality as that on the existing K2 SoCs.

One example usage would be the boot address programming of the DSP processor sub-system.

---
 arch/arm/boot/dts/keystone-k2g.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

index 3372615..fe17dc4 100644
@@ -83,6 +83,11 @@
 			pinctrl-single,function-mask = <0x001b0007>;
 		};
 
+		devctrl: device-state-control@02620000 {
+			compatible = "ti,keystone-devctrl", "syscon";
+			reg = <0x02620000 0x1000>;
+		};
+
 		uart0: serial@02530c00 {
 			compatible = "ns16550a";
 			current-speed = <115200>;

2.9.2

Add the Keystone IRQ controller IP node on K2G SoC. This allows the ARM CorePac core to receive interrupts from remote processor devices (eg: DSP) on the SoC.

The IP is identical in functionality to that of the equivalent nodes on existing K2 SoCs. The only difference is the ARM INTC interrupt id/event number.

---
 arch/arm/boot/dts/keystone-k2g.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

index fe17dc4..eccda9c 100644
@@ -98,5 +98,13 @@
 			clock-frequency = <200000000>;
 			status = "disabled";
 		};
+
+		kirq0: keystone_irq@026202a0 {
+			compatible = "ti,keystone-irq";
+			interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>;
+			interrupt-controller;
+			#interrupt-cells = <1>;
+			ti,syscon-dev = <&devctrl 0x2a0>;
+		};
 	};
 };

2.9.2

Add the DSP GPIO controller node on K2G SoC. This is used to send interrupts to the only DSP processor subsystem present on the SoC. The IP is identical to that of the equivalent nodes on existing K2 SoCs.

---
 arch/arm/boot/dts/keystone-k2g.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

index eccda9c..025ad12 100644
@@ -106,5 +106,12 @@
 			#interrupt-cells = <1>;
 			ti,syscon-dev = <&devctrl 0x2a0>;
 		};
+
+		dspgpio0: keystone_dsp_gpio@02620240 {
+			compatible = "ti,keystone-dsp-gpio";
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio,syscon-dev = <&devctrl 0x240>;
+		};
 	};
 };

2.9.2

The series looks good to me. I will add them to the next merge window queue...