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clk: sunxi-ng: Fix inverted test condition in ccu_helper_wait_for_lock

PATCH New Chen-Yu Tsai 3 participants 3 messages Jul 14, 2016 – Aug 10, 2016

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#0 lore raw

PATCH 1/1 clk: sunxi-ng: Fix inverted test condition in ccu_helper_wait_for_lock

The condition passed to read*_poll_timeout() is the break condition, i.e. wait for this condition to happen and return success.

The original code assumed the opposite, resulting in a warning when the PLL clock rate was changed but never lost it's lock as far as the readout indicated. This was verified by checking the read out register value.

Fixes 1d80c14248d6 ("clk: sunxi-ng: Add common infrastructure")
---
 drivers/clk/sunxi-ng/ccu_common.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/clk/sunxi-ng/ccu_common.c +1 -1
index fc17b5295e16..51d4bac97ab3 100644
@@ -31,7 +31,7 @@ void ccu_helper_wait_for_lock(struct ccu_common *common, u32 lock)
 		return;
 
 	WARN_ON(readl_relaxed_poll_timeout(common->base + common->reg, reg,
-					   !(reg & lock), 100, 70000));
+					   reg & lock, 100, 70000));
 }
 
 int sunxi_ccu_probe(struct device_node *node, void __iomem *reg,
Signature · 1 line
2.8.1
#1 lore raw

PATCH 1/1 clk: sunxi-ng: Fix inverted test condition in ccu_helper_wait_for_lock

Quoted 10 lines · Chen-Yu Tsai

The condition passed to read*_poll_timeout() is the break condition, i.e. wait for this condition to happen and return success.

The original code assumed the opposite, resulting in a warning when the PLL clock rate was changed but never lost it's lock as far as the readout indicated. This was verified by checking the read out register value.

Fixes 1d80c14248d6 ("clk: sunxi-ng: Add common infrastructure")

Mike, Stephen, could you add that patch on top of the current branch?

Thanks,
Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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Applied
#2 lore raw

PATCH 1/1 clk: sunxi-ng: Fix inverted test condition in ccu_helper_wait_for_lock

Quoted 9 lines · Maxime Ripard
Quoted 8 lines · Chen-Yu Tsai

The condition passed to read*_poll_timeout() is the break condition, i.e. wait for this condition to happen and return success.

The original code assumed the opposite, resulting in a warning when the PLL clock rate was changed but never lost it's lock as far as the readout indicated. This was verified by checking the read out register value.

Quoted 7 lines
Quoted 2 lines
Fixes 1d80c14248d6 ("clk: sunxi-ng: Add common infrastructure")

Mike, Stephen, could you add that patch on top of the current branch?

Applied to clk-fixes

Signature · 2 lines
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