Skip to contentSkip to conversation

i2c-octeon and i2c-thunderx driver

PATCH Applied Jan Glauber 2 participants 10 messages Aug 24, 2016 – Aug 25, 2016

Subsystems (2)
I2C subsystem host drivers Cavium I2C driver
lore
Share & tools
lore

Jan Glauber

author
#0 lore raw

v11 cover i2c-octeon and i2c-thunderx driver

Hi Wolfram,

this update should address all comments. The probe funtion is much easier to read now after using the managed device functions.

We also had an issue with the 5ms timeout and some ipmi/ssif commands so I dropped the timeout setting to get the 1s default.

Changes to v10:
- Proper use of managed device functions
- Renamed files
- Removed i2c class setting
- Droped timeout setting
- Improved Kconfig dependency
- Removed most probing kernel messages
- select SMBUS instead of if-defing
- Removed bogus i2c pointer check
- Explicitely mention GPL version
- Drop whitespace fixes from MAINTAINERS patch

Changes to v9:
- rebased on top of upstreamed octeon i2c fixes
- reduced default sclk to 700Mhz

Changes to v8:
- Use device property for clock-frequency setting in thunderx, get rid of of_find_node_by_name
- Simplify adap.name by using device name
- SMBUS ACPI handling
- Re-phrase SMBUS error/not-specified message

Thanks,
Jan

-------------------------------------------------

Jan Glauber (8):
i2c: octeon: Rename driver to prepare for split
i2c: octeon: Split the driver into two parts
i2c: thunderx: Add i2c driver for ThunderX SOC
i2c: thunderx: Add SMBUS alert support
i2c: octeon,thunderx: Move register offsets to struct
i2c: octeon: Sort include files alphabetically
i2c: octeon: Use booleon values for booleon variables
i2c: octeon: thunderx: Add MAINTAINERS entry

 MAINTAINERS                                        |    8 +
 drivers/i2c/busses/Kconfig                         |   11 +
 drivers/i2c/busses/Makefile                        |    3 +
 .../i2c/busses/{i2c-octeon.c => i2c-octeon-core.c} | 1039 ++++++--------------
 drivers/i2c/busses/i2c-octeon-core.h               |  211 ++++
 drivers/i2c/busses/i2c-octeon-platdrv.c            |  288 ++++++
 drivers/i2c/busses/i2c-thunderx-pcidrv.c           |  259 +++++
 7 files changed, 1077 insertions(+), 742 deletions(-)
 rename drivers/i2c/busses/{i2c-octeon.c => i2c-octeon-core.c} (57%)
 create mode 100644 drivers/i2c/busses/i2c-octeon-core.h
 create mode 100644 drivers/i2c/busses/i2c-octeon-platdrv.c
 create mode 100644 drivers/i2c/busses/i2c-thunderx-pcidrv.c
Signature · 1 line
2.9.0.rc0.21.g7777322
author
#1 lore raw

PATCH v11 1/8 i2c: octeon: Rename driver to prepare for split

This is an intermediate commit in preparation of the driver split. The module rename in this commit will be reverted in the next patch, this is just done to make the series bisectible.

Signed-off-by Jan Glauber <[email protected]>
---
 drivers/i2c/busses/Makefile                               | 2 +-
 drivers/i2c/busses/{i2c-octeon.c => i2c-octeon-platdrv.c} | 0
 2 files changed, 1 insertion(+), 1 deletion(-)
 rename drivers/i2c/busses/{i2c-octeon.c => i2c-octeon-platdrv.c} (100%)
drivers/i2c/busses/Makefile +1 -1
index 37f2819..f2c9c6f 100644
@@ -91,7 +91,7 @@ obj-$(CONFIG_I2C_UNIPHIER)	+= i2c-uniphier.o
 obj-$(CONFIG_I2C_UNIPHIER_F)	+= i2c-uniphier-f.o
 obj-$(CONFIG_I2C_VERSATILE)	+= i2c-versatile.o
 obj-$(CONFIG_I2C_WMT)		+= i2c-wmt.o
-obj-$(CONFIG_I2C_OCTEON)	+= i2c-octeon.o
+obj-$(CONFIG_I2C_OCTEON)	+= i2c-octeon-platdrv.o
 obj-$(CONFIG_I2C_XILINX)	+= i2c-xiic.o
 obj-$(CONFIG_I2C_XLR)		+= i2c-xlr.o
 obj-$(CONFIG_I2C_XLP9XX)	+= i2c-xlp9xx.o
drivers/i2c/busses/i2c-octeon-platdrv.c renamed from drivers/i2c/busses/i2c-octeon.c +0 -0
similarity index 100%
rename from drivers/i2c/busses/i2c-octeon.c
rename to drivers/i2c/busses/i2c-octeon-platdrv.c
Signature · 1 line
2.9.0.rc0.21.g7777322
author
#2 lore raw

PATCH v11 2/8 i2c: octeon: Split the driver into two parts

In reply to Jan Glauber

Move common functionality into a separate file in preparation of the re-use from the ThunderX i2c driver.

Functions are slightly re-ordered but no other changes are included.

Signed-off-by Jan Glauber <[email protected]>
---
 drivers/i2c/busses/Makefile             |   3 +-
 drivers/i2c/busses/i2c-octeon-core.c    | 810 ++++++++++++++++++++++++++
 drivers/i2c/busses/i2c-octeon-core.h    | 197 +++++++
 drivers/i2c/busses/i2c-octeon-platdrv.c | 973 +-------------------------------
 4 files changed, 1010 insertions(+), 973 deletions(-)
 create mode 100644 drivers/i2c/busses/i2c-octeon-core.c
 create mode 100644 drivers/i2c/busses/i2c-octeon-core.h
drivers/i2c/busses/Makefile +2 -1
index f2c9c6f..f975263 100644
@@ -91,7 +91,8 @@ obj-$(CONFIG_I2C_UNIPHIER)	+= i2c-uniphier.o
 obj-$(CONFIG_I2C_UNIPHIER_F)	+= i2c-uniphier-f.o
 obj-$(CONFIG_I2C_VERSATILE)	+= i2c-versatile.o
 obj-$(CONFIG_I2C_WMT)		+= i2c-wmt.o
-obj-$(CONFIG_I2C_OCTEON)	+= i2c-octeon-platdrv.o
+i2c-octeon-objs := i2c-octeon-core.o i2c-octeon-platdrv.o
+obj-$(CONFIG_I2C_OCTEON)	+= i2c-octeon.o
 obj-$(CONFIG_I2C_XILINX)	+= i2c-xiic.o
 obj-$(CONFIG_I2C_XLR)		+= i2c-xlr.o
 obj-$(CONFIG_I2C_XLP9XX)	+= i2c-xlp9xx.o
drivers/i2c/busses/i2c-octeon-core.c new file +810 -0

810 lines not on this page · raw message

drivers/i2c/busses/i2c-octeon-core.h new file +197 -0

197 lines not on this page · raw message

drivers/i2c/busses/i2c-octeon-platdrv.c +1 -972

999 lines not on this page · raw message

Signature · 1 line
2.9.0.rc0.21.g7777322
author
#3 lore raw

PATCH v11 3/8 i2c: thunderx: Add i2c driver for ThunderX SOC

In reply to Jan Glauber

The ThunderX SOC uses the same i2c block as the Octeon SOC. The main difference is that on ThunderX the device is a PCI device so device probing is done via PCI, interrupts are MSI-X. The clock rates can be set via device tree or ACPI.

Signed-off-by Jan Glauber <[email protected]>
---
 drivers/i2c/busses/Kconfig               |  10 ++
 drivers/i2c/busses/Makefile              |   2 +
 drivers/i2c/busses/i2c-octeon-core.h     |  16 ++-
 drivers/i2c/busses/i2c-thunderx-pcidrv.c | 209 +++++++++++++++++++++++++++++++
 4 files changed, 234 insertions(+), 3 deletions(-)
 create mode 100644 drivers/i2c/busses/i2c-thunderx-pcidrv.c
drivers/i2c/busses/Kconfig +10 -0
index 5c3993b..d69a342 100644
@@ -956,6 +956,16 @@ config I2C_OCTEON
 	  This driver can also be built as a module.  If so, the module
 	  will be called i2c-octeon.
 
+config I2C_THUNDERX
+	tristate "Cavium ThunderX I2C bus support"
+	depends on 64BIT && PCI && (ARM64 || COMPILE_TEST)
+	help
+	  Say yes if you want to support the I2C serial bus on Cavium
+	  ThunderX SOC.
+
+	  This driver can also be built as a module.  If so, the module
+	  will be called i2c-thunderx.
+
 config I2C_XILINX
 	tristate "Xilinx I2C Controller"
 	depends on HAS_IOMEM
drivers/i2c/busses/Makefile +2 -0
index f975263..29764cc 100644
@@ -93,6 +93,8 @@ obj-$(CONFIG_I2C_VERSATILE)	+= i2c-versatile.o
 obj-$(CONFIG_I2C_WMT)		+= i2c-wmt.o
 i2c-octeon-objs := i2c-octeon-core.o i2c-octeon-platdrv.o
 obj-$(CONFIG_I2C_OCTEON)	+= i2c-octeon.o
+i2c-thunderx-objs := i2c-octeon-core.o i2c-thunderx-pcidrv.o
+obj-$(CONFIG_I2C_THUNDERX)	+= i2c-thunderx.o
 obj-$(CONFIG_I2C_XILINX)	+= i2c-xiic.o
 obj-$(CONFIG_I2C_XLR)		+= i2c-xlr.o
 obj-$(CONFIG_I2C_XLP9XX)	+= i2c-xlp9xx.o
drivers/i2c/busses/i2c-octeon-core.h +13 -3
index 81c6a81..33c7e1f 100644
@@ -8,9 +8,15 @@
 #include <linux/pci.h>
 
 /* Register offsets */
-#define SW_TWSI			0x00
-#define TWSI_INT		0x10
-#define SW_TWSI_EXT		0x18
+#if IS_ENABLED(CONFIG_I2C_THUNDERX)
+	#define SW_TWSI			0x1000
+	#define TWSI_INT		0x1010
+	#define SW_TWSI_EXT		0x1018
+#else
+	#define SW_TWSI			0x00
+	#define TWSI_INT		0x10
+	#define SW_TWSI_EXT		0x18
+#endif
 
 /* Controller command patterns */
 #define SW_TWSI_V		BIT_ULL(63)	/* Valid bit */

@@ -94,6 +100,7 @@
 struct octeon_i2c {
 	wait_queue_head_t queue;
 	struct i2c_adapter adap;
+	struct clk *clk;
 	int irq;
 	int hlc_irq;		/* For cn7890 only */
 	u32 twsi_freq;

@@ -109,6 +116,9 @@ struct octeon_i2c {
 	void (*hlc_int_disable)(struct octeon_i2c *);
 	atomic_t int_enable_cnt;
 	atomic_t hlc_int_enable_cnt;
+#if IS_ENABLED(CONFIG_I2C_THUNDERX)
+	struct msix_entry i2c_msix;
+#endif
 };
 
 static inline void octeon_i2c_writeq_flush(u64 val, void __iomem *addr)
drivers/i2c/busses/i2c-thunderx-pcidrv.c new file +209 -0

209 lines not on this page · raw message

Signature · 1 line
2.9.0.rc0.21.g7777322
author
#4 lore raw

PATCH v11 4/8 i2c: thunderx: Add SMBUS alert support

In reply to Jan Glauber

Add SMBUS alert interrupt support. For now only device tree is supported for specifying the alert. In case of ACPI an error is returned.

Signed-off-by Jan Glauber <[email protected]>
---
 drivers/i2c/busses/Kconfig               |  1 +
 drivers/i2c/busses/i2c-octeon-core.h     |  3 +++
 drivers/i2c/busses/i2c-thunderx-pcidrv.c | 46 ++++++++++++++++++++++++++++++++
 3 files changed, 50 insertions(+)
drivers/i2c/busses/Kconfig +1 -0
index d69a342..1f3239e 100644
@@ -959,6 +959,7 @@ config I2C_OCTEON
 config I2C_THUNDERX
 	tristate "Cavium ThunderX I2C bus support"
 	depends on 64BIT && PCI && (ARM64 || COMPILE_TEST)
+	select I2C_SMBUS
 	help
 	  Say yes if you want to support the I2C serial bus on Cavium
 	  ThunderX SOC.
drivers/i2c/busses/i2c-octeon-core.h +3 -0
index 33c7e1f..2ed6f7a 100644
@@ -3,6 +3,7 @@
 #include <linux/delay.h>
 #include <linux/device.h>
 #include <linux/i2c.h>
+#include <linux/i2c-smbus.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
 #include <linux/pci.h>

@@ -119,6 +120,8 @@ struct octeon_i2c {
 #if IS_ENABLED(CONFIG_I2C_THUNDERX)
 	struct msix_entry i2c_msix;
 #endif
+	struct i2c_smbus_alert_setup alert_data;
+	struct i2c_client *ara;
 };
 
 static inline void octeon_i2c_writeq_flush(u64 val, void __iomem *addr)
drivers/i2c/busses/i2c-thunderx-pcidrv.c +46 -0

73 lines not on this page · raw message

Signature · 1 line
2.9.0.rc0.21.g7777322
author
#5 lore raw

PATCH v11 5/8 i2c: octeon,thunderx: Move register offsets to struct

In reply to Jan Glauber

The register offsets are different between Octeon and ThunderX so move them into the algorithm struct and get rid of the define.

Signed-off-by Jan Glauber <[email protected]>
---
 drivers/i2c/busses/i2c-octeon-core.c     | 28 ++++++++++++-------------
 drivers/i2c/busses/i2c-octeon-core.h     | 35 ++++++++++++++++----------------
 drivers/i2c/busses/i2c-octeon-platdrv.c  |  4 ++++
 drivers/i2c/busses/i2c-thunderx-pcidrv.c |  4 ++++
 4 files changed, 40 insertions(+), 31 deletions(-)
drivers/i2c/busses/i2c-octeon-core.c +14 -14
index 23384ef..a327a5f 100644
@@ -99,7 +99,7 @@ static int octeon_i2c_wait(struct octeon_i2c *i2c)
 
 static bool octeon_i2c_hlc_test_valid(struct octeon_i2c *i2c)
 {
-	return (__raw_readq(i2c->twsi_base + SW_TWSI) & SW_TWSI_V) == 0;
+	return (__raw_readq(i2c->twsi_base + SW_TWSI(i2c)) & SW_TWSI_V) == 0;
 }
 
 static bool octeon_i2c_hlc_test_ready(struct octeon_i2c *i2c, bool *first)

@@ -446,12 +446,12 @@ static int octeon_i2c_hlc_read(struct octeon_i2c *i2c, struct i2c_msg *msgs)
 	else
 		cmd |= SW_TWSI_OP_7;
 
-	octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI);
+	octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI(i2c));
 	ret = octeon_i2c_hlc_wait(i2c);
 	if (ret)
 		goto err;
 
-	cmd = __raw_readq(i2c->twsi_base + SW_TWSI);
+	cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
 	if ((cmd & SW_TWSI_R) == 0)
 		return -EAGAIN;
 

@@ -459,7 +459,7 @@ static int octeon_i2c_hlc_read(struct octeon_i2c *i2c, struct i2c_msg *msgs)
 		msgs[0].buf[j] = (cmd >> (8 * i)) & 0xff;
 
 	if (msgs[0].len > 4) {
-		cmd = __raw_readq(i2c->twsi_base + SW_TWSI_EXT);
+		cmd = __raw_readq(i2c->twsi_base + SW_TWSI_EXT(i2c));
 		for (i = 0; i  < msgs[0].len - 4 && i < 4; i++, j--)
 			msgs[0].buf[j] = (cmd >> (8 * i)) & 0xff;
 	}

@@ -496,15 +496,15 @@ static int octeon_i2c_hlc_write(struct octeon_i2c *i2c, struct i2c_msg *msgs)
 
 		for (i = 0; i < msgs[0].len - 4 && i < 4; i++, j--)
 			ext |= (u64)msgs[0].buf[j] << (8 * i);
-		octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT);
+		octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT(i2c));
 	}
 
-	octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI);
+	octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI(i2c));
 	ret = octeon_i2c_hlc_wait(i2c);
 	if (ret)
 		goto err;
 
-	cmd = __raw_readq(i2c->twsi_base + SW_TWSI);
+	cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
 	if ((cmd & SW_TWSI_R) == 0)
 		return -EAGAIN;
 

@@ -539,19 +539,19 @@ static int octeon_i2c_hlc_comp_read(struct octeon_i2c *i2c, struct i2c_msg *msgs
 		cmd |= SW_TWSI_EIA;
 		ext = (u64)msgs[0].buf[0] << SW_TWSI_IA_SHIFT;
 		cmd |= (u64)msgs[0].buf[1] << SW_TWSI_IA_SHIFT;
-		octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT);
+		octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT(i2c));
 	} else {
 		cmd |= (u64)msgs[0].buf[0] << SW_TWSI_IA_SHIFT;
 	}
 
 	octeon_i2c_hlc_int_clear(i2c);
-	octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI);
+	octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI(i2c));
 
 	ret = octeon_i2c_hlc_wait(i2c);
 	if (ret)
 		goto err;
 
-	cmd = __raw_readq(i2c->twsi_base + SW_TWSI);
+	cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
 	if ((cmd & SW_TWSI_R) == 0)
 		return -EAGAIN;
 

@@ -559,7 +559,7 @@ static int octeon_i2c_hlc_comp_read(struct octeon_i2c *i2c, struct i2c_msg *msgs
 		msgs[1].buf[j] = (cmd >> (8 * i)) & 0xff;
 
 	if (msgs[1].len > 4) {
-		cmd = __raw_readq(i2c->twsi_base + SW_TWSI_EXT);
+		cmd = __raw_readq(i2c->twsi_base + SW_TWSI_EXT(i2c));
 		for (i = 0; i  < msgs[1].len - 4 && i < 4; i++, j--)
 			msgs[1].buf[j] = (cmd >> (8 * i)) & 0xff;
 	}

@@ -606,16 +606,16 @@ static int octeon_i2c_hlc_comp_write(struct octeon_i2c *i2c, struct i2c_msg *msg
 		set_ext = true;
 	}
 	if (set_ext)
-		octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT);
+		octeon_i2c_writeq_flush(ext, i2c->twsi_base + SW_TWSI_EXT(i2c));
 
 	octeon_i2c_hlc_int_clear(i2c);
-	octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI);
+	octeon_i2c_writeq_flush(cmd, i2c->twsi_base + SW_TWSI(i2c));
 
 	ret = octeon_i2c_hlc_wait(i2c);
 	if (ret)
 		goto err;
 
-	cmd = __raw_readq(i2c->twsi_base + SW_TWSI);
+	cmd = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
 	if ((cmd & SW_TWSI_R) == 0)
 		return -EAGAIN;
drivers/i2c/busses/i2c-octeon-core.h +18 -17
index 2ed6f7a..87151ea 100644
@@ -8,17 +8,6 @@
 #include <linux/kernel.h>
 #include <linux/pci.h>
 
-/* Register offsets */
-#if IS_ENABLED(CONFIG_I2C_THUNDERX)
-	#define SW_TWSI			0x1000
-	#define TWSI_INT		0x1010
-	#define SW_TWSI_EXT		0x1018
-#else
-	#define SW_TWSI			0x00
-	#define TWSI_INT		0x10
-	#define SW_TWSI_EXT		0x18
-#endif
-
 /* Controller command patterns */
 #define SW_TWSI_V		BIT_ULL(63)	/* Valid bit */
 #define SW_TWSI_EIA		BIT_ULL(61)	/* Extended internal address */

@@ -98,9 +87,21 @@
 
 #define I2C_OCTEON_EVENT_WAIT 80 /* microseconds */
 
+/* Register offsets */
+struct octeon_i2c_reg_offset {
+	unsigned int sw_twsi;
+	unsigned int twsi_int;
+	unsigned int sw_twsi_ext;
+};
+
+#define SW_TWSI(x)	(x->roff.sw_twsi)
+#define TWSI_INT(x)	(x->roff.twsi_int)
+#define SW_TWSI_EXT(x)	(x->roff.sw_twsi_ext)
+
 struct octeon_i2c {
 	wait_queue_head_t queue;
 	struct i2c_adapter adap;
+	struct octeon_i2c_reg_offset roff;
 	struct clk *clk;
 	int irq;
 	int hlc_irq;		/* For cn7890 only */

@@ -142,9 +143,9 @@ static inline void octeon_i2c_reg_write(struct octeon_i2c *i2c, u64 eop_reg, u8
 {
 	u64 tmp;
 
-	__raw_writeq(SW_TWSI_V | eop_reg | data, i2c->twsi_base + SW_TWSI);
+	__raw_writeq(SW_TWSI_V | eop_reg | data, i2c->twsi_base + SW_TWSI(i2c));
 	do {
-		tmp = __raw_readq(i2c->twsi_base + SW_TWSI);
+		tmp = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
 	} while ((tmp & SW_TWSI_V) != 0);
 }
 

@@ -166,9 +167,9 @@ static inline u8 octeon_i2c_reg_read(struct octeon_i2c *i2c, u64 eop_reg)
 {
 	u64 tmp;
 
-	__raw_writeq(SW_TWSI_V | eop_reg | SW_TWSI_R, i2c->twsi_base + SW_TWSI);
+	__raw_writeq(SW_TWSI_V | eop_reg | SW_TWSI_R, i2c->twsi_base + SW_TWSI(i2c));
 	do {
-		tmp = __raw_readq(i2c->twsi_base + SW_TWSI);
+		tmp = __raw_readq(i2c->twsi_base + SW_TWSI(i2c));
 	} while ((tmp & SW_TWSI_V) != 0);
 
 	return tmp & 0xFF;

@@ -189,7 +190,7 @@ static inline u8 octeon_i2c_reg_read(struct octeon_i2c *i2c, u64 eop_reg)
  */
 static inline u64 octeon_i2c_read_int(struct octeon_i2c *i2c)
 {
-	return __raw_readq(i2c->twsi_base + TWSI_INT);
+	return __raw_readq(i2c->twsi_base + TWSI_INT(i2c));
 }
 
 /**

@@ -199,7 +200,7 @@ static inline u64 octeon_i2c_read_int(struct octeon_i2c *i2c)
  */
 static inline void octeon_i2c_write_int(struct octeon_i2c *i2c, u64 data)
 {
-	octeon_i2c_writeq_flush(data, i2c->twsi_base + TWSI_INT);
+	octeon_i2c_writeq_flush(data, i2c->twsi_base + TWSI_INT(i2c));
 }
 
 /* Prototypes */
drivers/i2c/busses/i2c-octeon-platdrv.c +4 -0
index c07d0ee..916ebee 100644
@@ -163,6 +163,10 @@ static int octeon_i2c_probe(struct platform_device *pdev)
 	}
 	i2c->dev = &pdev->dev;
 
+	i2c->roff.sw_twsi = 0x00;
+	i2c->roff.twsi_int = 0x10;
+	i2c->roff.sw_twsi_ext = 0x18;
+
 	res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	i2c->twsi_base = devm_ioremap_resource(&pdev->dev, res_mem);
 	if (IS_ERR(i2c->twsi_base)) {
drivers/i2c/busses/i2c-thunderx-pcidrv.c +4 -0
index e8c3ce0..bba5b42 100644
@@ -158,6 +158,10 @@ static int thunder_i2c_probe_pci(struct pci_dev *pdev,
 	if (!i2c)
 		return -ENOMEM;
 
+	i2c->roff.sw_twsi = 0x1000;
+	i2c->roff.twsi_int = 0x1010;
+	i2c->roff.sw_twsi_ext = 0x1018;
+
 	i2c->dev = dev;
 	pci_set_drvdata(pdev, i2c);
 	ret = pcim_enable_device(pdev);
Signature · 1 line
2.9.0.rc0.21.g7777322
author
#6 lore raw

PATCH v11 6/8 i2c: octeon: Sort include files alphabetically

In reply to Jan Glauber

Sort include files alphabetically to reduce probability of merge conflicts.

Signed-off-by Jan Glauber <[email protected]>
---
 drivers/i2c/busses/i2c-octeon-platdrv.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)
drivers/i2c/busses/i2c-octeon-platdrv.c +5 -5
index 916ebee..ce2765f 100644
@@ -12,16 +12,16 @@
  */
 
 #include <linux/atomic.h>
-#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
 #include <linux/interrupt.h>
+#include <linux/io.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/delay.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
 #include <linux/sched.h>
 #include <linux/slab.h>
-#include <linux/i2c.h>
-#include <linux/io.h>
-#include <linux/of.h>
 
 #include <asm/octeon/octeon.h>
 #include "i2c-octeon-core.h"
Signature · 1 line
2.9.0.rc0.21.g7777322
author
#7 lore raw

PATCH v11 7/8 i2c: octeon: Use booleon values for booleon variables

In reply to Jan Glauber

Initialize booleon values with true instead of 1.

Signed-off-by Jan Glauber <[email protected]>
---
 drivers/i2c/busses/i2c-octeon-core.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/i2c/busses/i2c-octeon-core.c +2 -2
index a327a5f..f45ea5e 100644
@@ -63,7 +63,7 @@ static bool octeon_i2c_test_ready(struct octeon_i2c *i2c, bool *first)
 static int octeon_i2c_wait(struct octeon_i2c *i2c)
 {
 	long time_left;
-	bool first = 1;
+	bool first = true;
 
 	/*
 	 * Some chip revisions don't assert the irq in the interrupt

@@ -176,7 +176,7 @@ static void octeon_i2c_hlc_disable(struct octeon_i2c *i2c)
  */
 static int octeon_i2c_hlc_wait(struct octeon_i2c *i2c)
 {
-	bool first = 1;
+	bool first = true;
 	int time_left;
 
 	/*
Signature · 1 line
2.9.0.rc0.21.g7777322
author
#8 lore raw

PATCH v11 8/8 i2c: octeon: thunderx: Add MAINTAINERS entry

In reply to Jan Glauber

The i2c Octeon and ThunderX drivers are maintained by Cavium. While at it fix the whitespace errors of the next entry.

Signed-off-by Jan Glauber <[email protected]>
Acked-by David Daney <[email protected]>
---
 MAINTAINERS | 8 ++++++++
 1 file changed, 8 insertions(+)
MAINTAINERS +8 -0
index a306795..11cba03 100644
@@ -2878,6 +2878,14 @@ S:	Maintained
 F:	drivers/iio/light/cm*
 F:	Documentation/devicetree/bindings/i2c/trivial-devices.txt
 
+CAVIUM I2C DRIVER
+M:	Jan Glauber <[email protected]>
+M:	David Daney <[email protected]>
+W:	http://www.cavium.com
+S:	Supported
+F:	drivers/i2c/busses/i2c-octeon*
+F:	drivers/i2c/busses/i2c-thunderx*
+
 CAVIUM LIQUIDIO NETWORK DRIVER
 M:     Derek Chickles <[email protected]>
 M:     Satanand Burla <[email protected]>
Signature · 1 line
2.9.0.rc0.21.g7777322
Applied
#9 lore raw
In reply to Jan Glauber
Quoted 8 lines · Jan Glauber

Hi Wolfram,

this update should address all comments. The probe funtion is much easier to read now after using the managed device functions.

We also had an issue with the 5ms timeout and some ipmi/ssif commands so I dropped the timeout setting to get the 1s default.

Quoted 11 lines

Changes to v10:
- Proper use of managed device functions
- Renamed files
- Removed i2c class setting
- Droped timeout setting
- Improved Kconfig dependency
- Removed most probing kernel messages
- select SMBUS instead of if-defing
- Removed bogus i2c pointer check
- Explicitely mention GPL version
- Drop whitespace fixes from MAINTAINERS patch

Yay, looks much better now IMO.

Applied to for-next, thanks!