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arm64: dts: ls2080a: Add 'dma-coherent' for ls2080a PCI nodes

PATCH New Liu Gang 2 participants 2 messages Sep 8, 2016 – Sep 9, 2016

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Liu Gang

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PATCH 1/1 arm64: dts: ls2080a: Add 'dma-coherent' for ls2080a PCI nodes

The 'dma-coherent' indicates that the hardware IP block can ensure the coherency of the data transferred from/to the IP block. This can avoid the software cache flush/invalid actions, and improve the performance significantly.

The PCI IP block of ls2080a has this capability, so adding this feature to improve the PCI performance.

---
 arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi +4 -0
index e3b6034..4eba766 100644
@@ -588,6 +588,7 @@
 			#address-cells = <3>;
 			#size-cells = <2>;
 			device_type = "pci";
+			dma-coherent;
 			num-lanes = <4>;
 			bus-range = <0x0 0xff>;
 			ranges = <0x81000000 0x0 0x00000000 0x10 0x00010000 0x0 0x00010000   /* downstream I/O */
@@ -612,6 +613,7 @@
 			#address-cells = <3>;
 			#size-cells = <2>;
 			device_type = "pci";
+			dma-coherent;
 			num-lanes = <4>;
 			bus-range = <0x0 0xff>;
 			ranges = <0x81000000 0x0 0x00000000 0x12 0x00010000 0x0 0x00010000   /* downstream I/O */
@@ -636,6 +638,7 @@
 			#address-cells = <3>;
 			#size-cells = <2>;
 			device_type = "pci";
+			dma-coherent;
 			num-lanes = <8>;
 			bus-range = <0x0 0xff>;
 			ranges = <0x81000000 0x0 0x00000000 0x14 0x00010000 0x0 0x00010000   /* downstream I/O */
@@ -660,6 +663,7 @@
 			#address-cells = <3>;
 			#size-cells = <2>;
 			device_type = "pci";
+			dma-coherent;
 			num-lanes = <4>;
 			bus-range = <0x0 0xff>;
 			ranges = <0x81000000 0x0 0x00000000 0x16 0x00010000 0x0 0x00010000   /* downstream I/O */
Signature · 1 line
2.1.0.27.g96db324
Applied
#1 lore raw

PATCH 1/1 arm64: dts: ls2080a: Add 'dma-coherent' for ls2080a PCI nodes

Quoted 9 lines · Liu Gang

The 'dma-coherent' indicates that the hardware IP block can ensure the coherency of the data transferred from/to the IP block. This can avoid the software cache flush/invalid actions, and improve the performance significantly.

The PCI IP block of ls2080a has this capability, so adding this feature to improve the PCI performance.

Applied, thanks.