drm/i915: fix pwm increment setup
Subsystems (3)
cover drm/i915: fix pwm increment setup
CI got confused by all the patches flowing in the earlier thread, so resend. No changes.
BR,
Jani.
Jani Nikula (1):
drm/i915/backlight: setup and cache pwm alternate increment value
Shawn Lee (1):
drm/i915/backlight: setup backlight pwm alternate increment on
backlight enable
drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_panel.c | 32 ++++++++++++++++++++++++++++---- 2 files changed, 29 insertions(+), 4 deletions(-)
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2.1.4 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
PATCH 1/2 drm/i915/backlight: setup and cache pwm alternate increment value
This will also be needed later on when setting up the alternate increment in backlight enable.
--- drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_panel.c | 14 +++++++++++--- 2 files changed, 12 insertions(+), 3 deletions(-)
drivers/gpu/drm/i915/intel_drv.h +1 -0
@@ -263,6 +263,7 @@ struct intel_panel {bool enabled;bool combination_mode;/* gen 2/4 only */ bool active_low_pwm; +bool alternate_pwm_increment;/* lpt+ */ /* PWM chip */ bool util_pin_active_low;/* bxt+ */
drivers/gpu/drm/i915/intel_panel.c +11 -3
@@ -1242,10 +1242,10 @@ static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)*/ static u32 spt_hz_to_pwm (struct intel_connector *connector,u32 pwm_freq_hz) { -struct drm_i915_private *dev_priv =to_i915 (connector->base.dev); +struct intel_panel *panel = &connector->panel;u32 mul; -if (I915_READ (SOUTH_CHICKEN1 ) &SPT_PWM_GRANULARITY ) +if (panel->backlight.alternate_pwm_increment) mul =128 ;else mul =16 ;
@@ -1261,9 +1261,10 @@ static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)static u32 lpt_hz_to_pwm (struct intel_connector *connector,u32 pwm_freq_hz) {struct drm_i915_private *dev_priv =to_i915 (connector->base.dev); +struct intel_panel *panel = &connector->panel;u32 mul, clock; -if (I915_READ (SOUTH_CHICKEN2 ) &LPT_PWM_GRANULARITY ) +if (panel->backlight.alternate_pwm_increment) mul =16 ;else mul =128 ;
@@ -1414,6 +1415,13 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unusstruct drm_i915_private *dev_priv =to_i915 (connector->base.dev);struct intel_panel *panel = &connector->panel;u32 pch_ctl1, pch_ctl2, val; +bool alt; + +if (HAS_PCH_LPT (dev_priv)) + alt =I915_READ (SOUTH_CHICKEN2 ) &LPT_PWM_GRANULARITY ; +else + alt =I915_READ (SOUTH_CHICKEN1 ) &SPT_PWM_GRANULARITY ; + panel->backlight.alternate_pwm_increment = alt; pch_ctl1 =I915_READ (BLC_PWM_PCH_CTL1 ); panel->backlight.active_low_pwm = pch_ctl1 &BLM_PCH_POLARITY ;
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2.1.4 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
PATCH 2/2 drm/i915/backlight: setup backlight pwm alternate increment on backlight enable
In reply to Jani NikulaFrom: Shawn Lee <[email protected]>
Backlight enable is supposed to do a full setup of the backlight. We were missing the PWM alternate increment bit in the south chicken registers on lpt+ pch. This potentially caused a PWM frequency change when the chicken register value was lost e.g. on suspend.
v2 by Jani, rebase on the patch caching alt increment
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97486
--- drivers/gpu/drm/i915/intel_panel.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-)
drivers/gpu/drm/i915/intel_panel.c +17 -1
@@ -841,7 +841,7 @@ static void lpt_enable_backlight(struct intel_connector *connector) {struct drm_i915_private *dev_priv =to_i915 (connector->base.dev);struct intel_panel *panel = &connector->panel; -u32 pch_ctl1, pch_ctl2; +u32 pch_ctl1, pch_ctl2, schicken; pch_ctl1 =I915_READ (BLC_PWM_PCH_CTL1 );if (pch_ctl1 &BLM_PCH_PWM_ENABLE ) {
@@ -850,6 +850,22 @@ static void lpt_enable_backlight(struct intel_connector *connector)I915_WRITE (BLC_PWM_PCH_CTL1 , pch_ctl1); } +if (HAS_PCH_LPT (dev_priv)) { + schicken =I915_READ (SOUTH_CHICKEN2 ); +if (panel->backlight.alternate_pwm_increment) + schicken |=LPT_PWM_GRANULARITY ; +else + schicken &= ~LPT_PWM_GRANULARITY ; +I915_WRITE (SOUTH_CHICKEN2 , schicken); + }else { + schicken =I915_READ (SOUTH_CHICKEN1 ); +if (panel->backlight.alternate_pwm_increment) + schicken |=SPT_PWM_GRANULARITY ; +else + schicken &= ~SPT_PWM_GRANULARITY ; +I915_WRITE (SOUTH_CHICKEN1 , schicken); + } + pch_ctl2 = panel->backlight.max <<16 ;I915_WRITE (BLC_PWM_PCH_CTL2 , pch_ctl2);
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2.1.4 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Patchwork
CI✗ Fi.CI.BAT: warning for drm/i915: fix pwm increment setup
In reply to Jani Nikula== Series Details ==
== Series Details ==
Series: drm/i915: fix pwm increment setup
URL : https://patchwork.freedesktop.org/series/12636/
State : warning
== Summary ==
Series 12636v1 drm/i915: fix pwm increment setup
https://patchwork.freedesktop.org/api/1.0/series/12636/revisions/1/mbox/
Test kms_pipe_crc_basic:
Subgroup hang-read-crc-pipe-a:
dmesg-warn -> PASS (fi-skl-6700k)
Test pm_rpm:
Subgroup basic-rte:
pass -> SKIP (fi-hsw-4770r)fi-bdw-5557u total:244 pass:229 dwarn:0 dfail:0 fail:0 skip:15 fi-bsw-n3050 total:244 pass:202 dwarn:0 dfail:0 fail:0 skip:42 fi-hsw-4770k total:244 pass:226 dwarn:0 dfail:0 fail:0 skip:18 fi-hsw-4770r total:244 pass:221 dwarn:0 dfail:0 fail:0 skip:23 fi-ilk-650 total:244 pass:183 dwarn:0 dfail:0 fail:1 skip:60 fi-ivb-3520m total:244 pass:219 dwarn:0 dfail:0 fail:0 skip:25 fi-ivb-3770 total:244 pass:207 dwarn:0 dfail:0 fail:0 skip:37 fi-skl-6260u total:244 pass:230 dwarn:0 dfail:0 fail:0 skip:14 fi-skl-6700hq total:244 pass:221 dwarn:0 dfail:0 fail:1 skip:22 fi-skl-6700k total:244 pass:219 dwarn:1 dfail:0 fail:0 skip:24 fi-skl-6770hq total:244 pass:228 dwarn:1 dfail:0 fail:1 skip:14 fi-snb-2520m total:244 pass:208 dwarn:0 dfail:0 fail:0 skip:36 fi-snb-2600 total:244 pass:207 dwarn:0 dfail:0 fail:0 skip:37
Results at /archive/results/CI_IGT_test/Patchwork_2553/
0d6fa72a8c18ec6ab4dbabf5202b8d1cad840e04 drm-intel-nightly: 2016y-09m-19d-09h-28m-11s UTC integration manifest 67275e3 drm/i915/backlight: setup backlight pwm alternate increment on backlight enable aeef3b5 drm/i915/backlight: setup and cache pwm alternate increment value
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Quoted 2 lines · Jani Nikula
CI got confused by all the patches flowing in the earlier thread, so resend. No changes.
Series lgtm.
Quoted 22 lines
BR,
Jani.Jani Nikula (1):
drm/i915/backlight: setup and cache pwm alternate increment valueShawn Lee (1):
drm/i915/backlight: setup backlight pwm alternate increment on
backlight enabledrivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_panel.c | 32 ++++++++++++++++++++++++++++---- 2 files changed, 29 insertions(+), 4 deletions(-)Signature · 6 lines
2.1.4 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Signature · 6 lines
Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Quoted 7 lines · Ville Syrjälä
Quoted 2 lines · Jani Nikula
CI got confused by all the patches flowing in the earlier thread, so resend. No changes.
Series lgtm.
Reviewed-by Ville Syrjälä <[email protected]>
Thanks for the review, pushed to drm-intel-next-queued.
BR,
Jani.
Quoted 23 lines
Quoted 23 lines
BR,
Jani.Jani Nikula (1):
drm/i915/backlight: setup and cache pwm alternate increment valueShawn Lee (1):
drm/i915/backlight: setup backlight pwm alternate increment on
backlight enabledrivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_panel.c | 32 ++++++++++++++++++++++++++++---- 2 files changed, 29 insertions(+), 4 deletions(-)Signature · 6 lines
2.1.4 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Signature · 5 lines
Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx