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u-boot-mips/master

GIT PULL New Daniel Schwierzeck 2 participants 4 messages Sep 21, 2016 – Sep 22, 2016

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#0 lore raw

Hi Tom,

this pull-request introduces:
- new board: MIPSfpga
- new board: Boston with variants for MIPS32r2/MIPS64r2 and BE/LE
- updates to DM core code needed for Boston board
- support for L2 cache and MIPS coherency manager
- various fixes on cache initialization

The following changes since commit 9b1b6d42256a4c2e59c803afdbf90d39371e61ba:

Revert "Increase default of CONFIG_SYS_MALLOC_F_LEN for SPL_OF_CONTROL" (2016-09-19 15:20:09 -0400)

are available in the git repository at:

git://git.denx.de/u-boot-mips.git master

for you to fetch changes up to 31d36f748c52b22833aa946f6c406cc8fb2f1908:

MIPS: Hang if run on a secondary CPU (2016-09-21 17:04:53 +0200)

----------------------------------------------------------------
Paul Burton (28):
board_f: Add a mach_cpu_init callback
MIPS: ath79: Use mach_cpu_init instead of arch_cpu_init
MIPS: Probe cache line sizes once during boot
MIPS: Enable use of the instruction cache earlier
MIPS: Preserve Config implementation-defined bits
MIPS: If we don't need DDR for cache init, init cache first
MIPS: Define register names for cache init
MIPS: Map CM Global Control Registers
MIPS: L2 cache support
MIPS: Join the coherent domain when a CM is present
MIPS: Malta: Enable CM & L2 support
MIPS: Ensure Config.K0=2 applies before any memory accesses
MIPS: Clear hazard between TagLo writes & cache ops
MIPS: Ensure cache ops complete in mips_cache_reset
clk: Use dummy clk_get_by_* functions when CONFIG_CLK is disabled
serial: ns16550: Support clocks via phandle
dt-bindings: Add interrupt-controller/mips-gic.h header
pci: xilinx: Add a driver for Xilinx AXI to PCIe bridge
pci: Flip condition for detecting non-PCI parent devices
net: pch_gbe: Use dm_pci_map_bar to discover MMIO base
net: pch_gbe: Make 64 bit safe
dm: regmap: Implement simple regmap_read & regmap_write
dm: core: Match compatible strings in order of priority
dm: syscon: Provide a generic syscon driver
clk: boston: Providea simple driver for Boston board clocks
boston: Introduce support for the MIPS Boston development board
MIPS: Fix cache maintenance in relocate_code & simplify
MIPS: Hang if run on a secondary CPU

Zubair Lutfullah Kakakhel (5):
net: emaclite: Use ioremap_nocache
net: emaclite: use __raw_readl/writel instead of weird define
net: emaclite: Enable driver for MIPS
mips: xilfpga: Add device tree files
mips: Add MIPSfpga platform support

 arch/mips/Kconfig                                   |  57 +++++++++++++++++
 arch/mips/cpu/Makefile                              |   2 +
 arch/mips/cpu/cm_init.S                             |  45 ++++++++++++++
 arch/mips/cpu/cpu.c                                 |   7 +++
 arch/mips/cpu/start.S                               |  93 +++++++++++++++++-----------
 arch/mips/cpu/u-boot.lds                            |   2 +
 arch/mips/dts/Makefile                              |   2 +
 arch/mips/dts/img,boston.dts                        | 222 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 arch/mips/dts/microAptiv.dtsi                       |  21 +++++++
 arch/mips/dts/nexys4ddr.dts                         |  62 +++++++++++++++++++
 arch/mips/include/asm/cache.h                       |   9 +++
 arch/mips/include/asm/cm.h                          |  62 +++++++++++++++++++
 arch/mips/include/asm/global_data.h                 |   7 +++
 arch/mips/include/asm/mipsregs.h                    |  13 ++++
 arch/mips/lib/cache.c                               | 101 ++++++++++++++++++++++++------
 arch/mips/lib/cache_init.S                          | 271 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++------
 arch/mips/mach-ath79/cpu.c                          |   2 +-
 board/imgtec/boston/Kconfig                         |  16 +++++
 board/imgtec/boston/MAINTAINERS                     |   6 ++
 board/imgtec/boston/Makefile                        |   9 +++
 board/imgtec/boston/boston-lcd.h                    |  21 +++++++
 board/imgtec/boston/boston-regs.h                   |  26 ++++++++
 board/imgtec/boston/checkboard.c                    |  30 +++++++++
 board/imgtec/boston/ddr.c                           |  30 +++++++++
 board/imgtec/boston/lowlevel_init.S                 |  56 +++++++++++++++++
 board/imgtec/malta/lowlevel_init.S                  |   6 --
 board/imgtec/xilfpga/Kconfig                        |  15 +++++
 board/imgtec/xilfpga/MAINTAINERS                    |   6 ++
 board/imgtec/xilfpga/Makefile                       |   7 +++
 board/imgtec/xilfpga/README                         |  55 +++++++++++++++++
 board/imgtec/xilfpga/xilfpga.c                      |  20 ++++++
 common/board_f.c                                    |   6 ++
 configs/boston32r2_defconfig                        |  41 +++++++++++++
 configs/boston32r2el_defconfig                      |  42 +++++++++++++
 configs/boston64r2_defconfig                        |  41 +++++++++++++
 configs/boston64r2el_defconfig                      |  42 +++++++++++++
 configs/imgtec_xilfpga_defconfig                    |  25 ++++++++
 doc/README.boston                                   |  58 ++++++++++++++++++
 drivers/clk/Kconfig                                 |   8 +++
 drivers/clk/Makefile                                |   1 +
 drivers/clk/clk_boston.c                            |  97 +++++++++++++++++++++++++++++
 drivers/core/lists.c                                |  78 +++++++++++++-----------
 drivers/core/regmap.c                               |  20 ++++++
 drivers/core/syscon-uclass.c                        |  11 ++++
 drivers/net/Kconfig                                 |   2 +-
 drivers/net/pch_gbe.c                               |  28 ++++-----
 drivers/net/xilinx_emaclite.c                       |  90 ++++++++++++++-------------
 drivers/pci/Kconfig                                 |   7 +++
 drivers/pci/Makefile                                |   1 +
 drivers/pci/pci-uclass.c                            |   2 +-
 drivers/pci/pcie_xilinx.c                           | 220 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 drivers/serial/ns16550.c                            |  21 ++++++-
 include/clk.h                                       |   2 +-
 include/configs/boston.h                            |  81 ++++++++++++++++++++++++
 include/configs/imgtec_xilfpga.h                    |  68 +++++++++++++++++++++
 include/dt-bindings/clock/boston-clock.h            |  13 ++++
 include/dt-bindings/interrupt-controller/mips-gic.h |   9 +++
 57 files changed, 2115 insertions(+), 180 deletions(-)
 create mode 100644 arch/mips/cpu/cm_init.S
 create mode 100644 arch/mips/dts/img,boston.dts
 create mode 100644 arch/mips/dts/microAptiv.dtsi
 create mode 100644 arch/mips/dts/nexys4ddr.dts
 create mode 100644 arch/mips/include/asm/cm.h
 create mode 100644 board/imgtec/boston/Kconfig
 create mode 100644 board/imgtec/boston/MAINTAINERS
 create mode 100644 board/imgtec/boston/Makefile
 create mode 100644 board/imgtec/boston/boston-lcd.h
 create mode 100644 board/imgtec/boston/boston-regs.h
 create mode 100644 board/imgtec/boston/checkboard.c
 create mode 100644 board/imgtec/boston/ddr.c
 create mode 100644 board/imgtec/boston/lowlevel_init.S
 create mode 100644 board/imgtec/xilfpga/Kconfig
 create mode 100644 board/imgtec/xilfpga/MAINTAINERS
 create mode 100644 board/imgtec/xilfpga/Makefile
 create mode 100644 board/imgtec/xilfpga/README
 create mode 100644 board/imgtec/xilfpga/xilfpga.c
 create mode 100644 configs/boston32r2_defconfig
 create mode 100644 configs/boston32r2el_defconfig
 create mode 100644 configs/boston64r2_defconfig
 create mode 100644 configs/boston64r2el_defconfig
 create mode 100644 configs/imgtec_xilfpga_defconfig
 create mode 100644 doc/README.boston
 create mode 100644 drivers/clk/clk_boston.c
 create mode 100644 drivers/pci/pcie_xilinx.c
 create mode 100644 include/configs/boston.h
 create mode 100644 include/configs/imgtec_xilfpga.h
 create mode 100644 include/dt-bindings/clock/boston-clock.h
 create mode 100644 include/dt-bindings/interrupt-controller/mips-gic.h

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#1 lore raw

PATCH 1/1 clk.h: Add <asm/errno.h>

Since we return -ENOSYS in some cases we must have <asm/errno.> available.

---
 include/clk.h | 1 +
 1 file changed, 1 insertion(+)
include/clk.h +1 -0
index 9b2452268d40..94c003714700 100644
@@ -10,6 +10,7 @@
 #define _CLK_H_
 
 #include <linux/types.h>
+#include <asm/errno.h>
 
 /**
  * A clock is a hardware signal that oscillates autonomously at a specific
Signature · 1 line
1.9.1
#2 lore raw

PATCH 1/1 clk.h: Add <asm/errno.h>

Quoted 4 lines · Tom Rini

Since we return -ENOSYS in some cases we must have <asm/errno.> available.

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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#3 lore raw
In reply to Daniel Schwierzeck
Quoted 14 lines · Daniel Schwierzeck

Hi Tom,

this pull-request introduces:
- new board: MIPSfpga
- new board: Boston with variants for MIPS32r2/MIPS64r2 and BE/LE
- updates to DM core code needed for Boston board
- support for L2 cache and MIPS coherency manager
- various fixes on cache initialization

The following changes since commit 9b1b6d42256a4c2e59c803afdbf90d39371e61ba:

Revert "Increase default of CONFIG_SYS_MALLOC_F_LEN for SPL_OF_CONTROL" (2016-09-19 15:20:09 -0400)

Quoted 8 lines

are available in the git repository at:

git://git.denx.de/u-boot-mips.git master

for you to fetch changes up to 31d36f748c52b22833aa946f6c406cc8fb2f1908:

MIPS: Hang if run on a secondary CPU (2016-09-21 17:04:53 +0200)

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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