arm64: dts: zx: Change gic node to fix boot failure
PATCH 1/2 arm64: dts: zx: Change gic node to fix boot failure
GICR for multiple CPU can be described with start address and stride, or with multiple address. Current multiple address and stride are both used. Fix it.
--- arch/arm64/boot/dts/zte/zx296718.dtsi | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-)
arch/arm64/boot/dts/zte/zx296718.dtsi +3 -8
@@ -239,16 +239,11 @@ compatible = "arm,gic-v3"; #interrupt-cells = <3>; #address-cells = <0>; - #redistributor-regions = <6>; - redistributor-stride = <0x0 0x40000>; + #redistributor-regions = <1>; + redistributor-stride = <0x20000>; interrupt-controller; reg = <0x02a00000 0x10000>, - <0x02b00000 0x20000>, - <0x02b20000 0x20000>, - <0x02b40000 0x20000>, - <0x02b60000 0x20000>, - <0x02b80000 0x20000>, - <0x02ba0000 0x20000>; + <0x02b00000 0xc0000>; interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; };
Signature · 1 line
1.9.1
PATCH 2/2 arm64: dts: zx: Add clock controller nodes
Add clock controller nodes, including one top controller two low speed controllers and one audio controller.
--- arch/arm64/boot/dts/zte/zx296718.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+)
arch/arm64/boot/dts/zte/zx296718.dtsi +24 -0
@@ -279,9 +279,33 @@ dma-requests = <32>; }; + lsp0crm: clock-controller at 01420000 { + compatible = "zte,zx296718-lsp0crm"; + reg = <0x01420000 0x1000>; + #clock-cells = <1>; + }; + + lsp1crm: clock-controller at 01430000 { + compatible = "zte,zx296718-lsp1crm"; + reg = <0x01430000 0x1000>; + #clock-cells = <1>; + }; + + topcrm: clock-controller at 01461000 { + compatible = "zte,zx296718-topcrm"; + reg = <0x01461000 0x1000>; + #clock-cells = <1>; + }; + sysctrl: sysctrl at 1463000 { compatible = "zte,zx296718-sysctrl", "syscon"; reg = <0x1463000 0x1000>; }; + + audiocrm: clock-controller at 01480000 { + compatible = "zte,zx296718-audiocrm"; + reg = <0x01480000 0x1000>; + #clock-cells = <1>; + }; }; };
Signature · 1 line
1.9.1
PATCH 2/2 arm64: dts: zx: Add clock controller nodes
Quoted 13 lines · Jun Nie
Add clock controller nodes, including one top controller two low speed controllers and one audio controller.
Signed-off-by Jun Nie <[email protected]>--- arch/arm64/boot/dts/zte/zx296718.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+)arch/arm64/boot/dts/zte/zx296718.dtsi +0
-0
arch/arm64/boot/dts/zte/zx296718.dtsi line 282
Quoted 4 lines
arch/arm64/boot/dts/zte/zx296718.dtsi +1
-0@@ -279,9 +279,33 @@ dma-requests = <32>; }; + lsp0crm: clock-controller at 01420000 {
Please drop the leading zeros from unit-address in node name.
Shawn
Quoted 37 lines
arch/arm64/boot/dts/zte/zx296718.dtsi +23
-0+ compatible = "zte,zx296718-lsp0crm"; + reg = <0x01420000 0x1000>; + #clock-cells = <1>; + }; + + lsp1crm: clock-controller at 01430000 { + compatible = "zte,zx296718-lsp1crm"; + reg = <0x01430000 0x1000>; + #clock-cells = <1>; + }; + + topcrm: clock-controller at 01461000 { + compatible = "zte,zx296718-topcrm"; + reg = <0x01461000 0x1000>; + #clock-cells = <1>; + }; + sysctrl: sysctrl at 1463000 { compatible = "zte,zx296718-sysctrl", "syscon"; reg = <0x1463000 0x1000>; }; + + audiocrm: clock-controller at 01480000 { + compatible = "zte,zx296718-audiocrm"; + reg = <0x01480000 0x1000>; + #clock-cells = <1>; + }; }; };Signature · 7 lines
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PATCH 1/2 arm64: dts: zx: Change gic node to fix boot failure
In reply to Jun NieQuoted 3 lines · Jun Nie
GICR for multiple CPU can be described with start address and stride, or with multiple address. Current multiple address and stride are both used. Fix it.
I think we need to tell the full story about this boot failure in commit log, i.e. it boots fine on v4.8-rc and fails on linux-next because of the mm/vmalloc.c changes.
Shawn
Quoted 38 lines
Signed-off-by Jun Nie <[email protected]>--- arch/arm64/boot/dts/zte/zx296718.dtsi | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-)arch/arm64/boot/dts/zte/zx296718.dtsi +3
-8@@ -239,16 +239,11 @@ compatible = "arm,gic-v3"; #interrupt-cells = <3>; #address-cells = <0>; - #redistributor-regions = <6>; - redistributor-stride = <0x0 0x40000>; + #redistributor-regions = <1>; + redistributor-stride = <0x20000>; interrupt-controller; reg = <0x02a00000 0x10000>, - <0x02b00000 0x20000>, - <0x02b20000 0x20000>, - <0x02b40000 0x20000>, - <0x02b60000 0x20000>, - <0x02b80000 0x20000>, - <0x02ba0000 0x20000>; + <0x02b00000 0xc0000>; interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; };Signature · 7 lines
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