irq fixes

GIT PULL Ingo Molnar 1 participant 1 message Oct 18, 2016

Subsystems (2)

irqchip drivers Arm generic interrupt controller drivers

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Ingo Molnar

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2016-10-18 10:18 UTC #0 lore raw

Linus,

Please pull the latest irq-urgent-for-linus git tree from:

git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq-urgent-for-linus

# HEAD: d102eb5c1ac5e6743b1c6d145c06a25d98ad1375 irqchip/gicv3: Handle loop timeout proper

Three irqchip driver fixes.

Thanks,

Ingo

------------------>
Dan Carpenter (1):
irqchip/gicv3: Handle loop timeout proper

Noam Camus (1):
irqchip/eznps: Acknowledge NPS_IPI before calling the handler

Rich Felker (1):
irqchip/jcore: Fix lost per-cpu interrupts

 drivers/irqchip/irq-eznps.c     |  4 ++--
 drivers/irqchip/irq-gic-v3.c    |  2 +-
 drivers/irqchip/irq-jcore-aic.c | 20 +++++++++++++++++++-
 3 files changed, 22 insertions(+), 4 deletions(-)

drivers/irqchip/irq-eznps.c +2 -2

index efbf0e4304b7..ebc2b0b15f67 100644
@@ -85,7 +85,7 @@ static void nps400_irq_eoi_global(struct irq_data *irqd)
 	nps_ack_gic();
 }
 
-static void nps400_irq_eoi(struct irq_data *irqd)
+static void nps400_irq_ack(struct irq_data *irqd)
 {
 	unsigned int __maybe_unused irq = irqd_to_hwirq(irqd);

@@ -103,7 +103,7 @@ static struct irq_chip nps400_irq_chip_percpu = {
 	.name		= "NPS400 IC",
 	.irq_mask	= nps400_irq_mask,
 	.irq_unmask	= nps400_irq_unmask,
-	.irq_eoi	= nps400_irq_eoi,
+	.irq_ack	= nps400_irq_ack,
 };
 
 static int nps400_irq_map(struct irq_domain *d, unsigned int virq,

drivers/irqchip/irq-gic-v3.c +1 -1

index 9b81bd8b929c..19d642eae096 100644
@@ -153,7 +153,7 @@ static void gic_enable_redist(bool enable)
 			return;	/* No PM support in this redistributor */
 	}
 
-	while (count--) {
+	while (--count) {
 		val = readl_relaxed(rbase + GICR_WAKER);
 		if (enable ^ (bool)(val & GICR_WAKER_ChildrenAsleep))
 			break;

drivers/irqchip/irq-jcore-aic.c +19 -1

index 84b01dec277d..033bccb41455 100644
@@ -25,12 +25,30 @@
 
 static struct irq_chip jcore_aic;
 
+/*
+ * The J-Core AIC1 and AIC2 are cpu-local interrupt controllers and do
+ * not distinguish or use distinct irq number ranges for per-cpu event
+ * interrupts (timer, IPI). Since information to determine whether a
+ * particular irq number should be treated as per-cpu is not available
+ * at mapping time, we use a wrapper handler function which chooses
+ * the right handler at runtime based on whether IRQF_PERCPU was used
+ * when requesting the irq.
+ */
+
+static void handle_jcore_irq(struct irq_desc *desc)
+{
+	if (irqd_is_per_cpu(irq_desc_get_irq_data(desc)))
+		handle_percpu_irq(desc);
+	else
+		handle_simple_irq(desc);
+}
+
 static int jcore_aic_irqdomain_map(struct irq_domain *d, unsigned int irq,
 				   irq_hw_number_t hwirq)
 {
 	struct irq_chip *aic = d->host_data;
 
-	irq_set_chip_and_handler(irq, aic, handle_simple_irq);
+	irq_set_chip_and_handler(irq, aic, handle_jcore_irq);
 
 	return 0;
 }