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4-byte SPI flash addressing

RFC PATCH Superseded Chris Packham 3 participants 5 messages Oct 17, 2016 – Oct 20, 2016 Memory technology devices (MTD)

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Chris Packham

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#0 lore raw

cover 4-byte SPI flash addressing

I'm working on a board that uses a MX25L25735E spi-nor flash chip from Macronix. This is a 32MB chip that uses 4-bytes for addressing. Annoyingly this chip identifies the same as a MX25L25635F the only difference appears to be the size reported (I don't actually have a MX25L25635F so that statement is an educated guess based on the datasheets).

What follows is a patch that gets the flash going on the board I'm working on. But I am wondering if instead of a config option I should follow more closely what Linux does and add and addr_width to struct spi_flash which gets set based on the size detected.

Chris Packham (1):
sf: support chips using 4-byte addressing

 drivers/mtd/spi/Kconfig       | 7 +++++++
 drivers/mtd/spi/sf_internal.h | 5 +++++
 drivers/mtd/spi/spi_flash.c   | 7 +++++++
 3 files changed, 19 insertions(+)
Signature · 1 line
2.10.0.479.g7c56b16
author
#1 lore raw

RFC PATCH 1/1 sf: support chips using 4-byte addressing

Signed-off-by Chris Packham <[email protected]>

---

 drivers/mtd/spi/Kconfig       | 7 +++++++
 drivers/mtd/spi/sf_internal.h | 5 +++++
 drivers/mtd/spi/spi_flash.c   | 7 +++++++
 3 files changed, 19 insertions(+)
drivers/mtd/spi/Kconfig +7 -0
index 1f23c8e34e6f..f5020f799d78 100644
@@ -42,6 +42,13 @@ config SPI_FLASH_BAR
 	  Bank/Extended address registers are used to access the flash
 	  which has size > 16MiB in 3-byte addressing.
 
+config SPI_FLASH_4B_ADDR
+	bool "SPI flash use 4-byte addressing"
+	depends on SPI_FLASH
+	help
+	  Enable 4-byte addressing for SPI flash. This allows use of SPI flash
+	  chips which use 4-byte addressing.
+
 if SPI_FLASH
 
 config SPI_FLASH_ATMEL
drivers/mtd/spi/sf_internal.h +5 -0
index cde4cfbf2e32..fef8d1ecc89e 100644
@@ -26,7 +26,12 @@ enum spi_nor_option_flags {
 };
 
 #define SPI_FLASH_3B_ADDR_LEN		3
+#define SPI_FLASH_4B_ADDR_LEN		4
+#ifdef CONFIG_SPI_FLASH_4B_ADDR
+#define SPI_FLASH_CMD_LEN		(1 + SPI_FLASH_4B_ADDR_LEN)
+#else
 #define SPI_FLASH_CMD_LEN		(1 + SPI_FLASH_3B_ADDR_LEN)
+#endif
 #define SPI_FLASH_16MB_BOUN		0x1000000
 
 /* CFI Manufacture ID's */
drivers/mtd/spi/spi_flash.c +7 -0
index 7f6e9ae23ea8..bed3ab4762cf 100644
@@ -25,9 +25,16 @@ DECLARE_GLOBAL_DATA_PTR;
 static void spi_flash_addr(u32 addr, u8 *cmd)
 {
 	/* cmd[0] is actual command */
+#ifdef CONFIG_SPI_FLASH_4B_ADDR
+	cmd[1] = addr >> 24;
+	cmd[2] = addr >> 16;
+	cmd[3] = addr >> 8;
+	cmd[4] = addr;
+#else
 	cmd[1] = addr >> 16;
 	cmd[2] = addr >> 8;
 	cmd[3] = addr >> 0;
+#endif
 }
 
 static int read_sr(struct spi_flash *flash, u8 *rs)
Signature · 1 line
2.10.0.479.g7c56b16
author
#2 lore raw

RFC PATCH v2 1/1 sf: support chips using 4-byte addressing

SPI chips with >16MB capacity use 4-byte addressing to allow accessing beyond 16MB. When the size of the SPI flash exceeds 16MB switch to using 4 byte addressing.

Signed-off-by Chris Packham <[email protected]>

---

Changes in v2:
- automatically detect when 4 byte addressing is needed. This is similar to how the linux kernel does the same detection

 drivers/mtd/spi/sf_internal.h |  4 ++--
 drivers/mtd/spi/spi_flash.c   | 32 ++++++++++++++++++++++----------
 include/spi_flash.h           |  2 ++
 3 files changed, 26 insertions(+), 12 deletions(-)
drivers/mtd/spi/sf_internal.h +2 -2
index cde4cfbf2e32..db4532849145 100644
@@ -25,8 +25,8 @@ enum spi_nor_option_flags {
 	SNOR_F_USE_FSR		= BIT(1),
 };
 
-#define SPI_FLASH_3B_ADDR_LEN		3
-#define SPI_FLASH_CMD_LEN		(1 + SPI_FLASH_3B_ADDR_LEN)
+#define SPI_FLASE_MAX_ADDR_WIDTH	4
+#define SPI_FLASH_CMD_LEN		(1 + SPI_FLASE_MAX_ADDR_WIDTH)
 #define SPI_FLASH_16MB_BOUN		0x1000000
 
 /* CFI Manufacture ID's */
drivers/mtd/spi/spi_flash.c +22 -10
index 7f6e9ae23ea8..a3efaa129231 100644
@@ -22,12 +22,19 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static void spi_flash_addr(u32 addr, u8 *cmd)
+static void spi_flash_addr(u32 addr, u8 *cmd, u8 addr_width)
 {
 	/* cmd[0] is actual command */
-	cmd[1] = addr >> 16;
-	cmd[2] = addr >> 8;
-	cmd[3] = addr >> 0;
+	if (addr_width == 4) {
+		cmd[1] = addr >> 24;
+		cmd[2] = addr >> 16;
+		cmd[3] = addr >> 8;
+		cmd[4] = addr;
+	} else {
+		cmd[1] = addr >> 16;
+		cmd[2] = addr >> 8;
+		cmd[3] = addr >> 0;
+	}
 }
 
 static int read_sr(struct spi_flash *flash, u8 *rs)

@@ -357,12 +364,13 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
 		if (ret < 0)
 			return ret;
 #endif
-		spi_flash_addr(erase_addr, cmd);
+		spi_flash_addr(erase_addr, cmd, flash->addr_width);
 
 		debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
 		      cmd[2], cmd[3], erase_addr);
 
-		ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
+		ret = spi_flash_write_common(flash, cmd, flash->addr_width + 1,
+					     NULL, 0);
 		if (ret < 0) {
 			debug("SF: erase failed\n");
 			break;

@@ -415,12 +423,12 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
 			chunk_len = min(chunk_len,
 					(size_t)spi->max_write_size);
 
-		spi_flash_addr(write_addr, cmd);
+		spi_flash_addr(write_addr, cmd, flash->addr_width);
 
 		debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
 		      buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
 
-		ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
+		ret = spi_flash_write_common(flash, cmd, flash->addr_width + 1,
 					buf + actual, chunk_len);
 		if (ret < 0) {
 			debug("SF: write failed\n");

@@ -492,7 +500,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 		return 0;
 	}
 
-	cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
+	cmdsz = flash->addr_width + 1 + flash->dummy_byte;
 	cmd = calloc(1, cmdsz);
 	if (!cmd) {
 		debug("SF: Failed to allocate cmd\n");

@@ -520,7 +528,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
 		else
 			read_len = remain_len;
 
-		spi_flash_addr(read_addr, cmd);
+		spi_flash_addr(read_addr, cmd, flash->addr_width);
 
 		ret = spi_flash_read_common(flash, cmd, cmdsz, data, read_len);
 		if (ret < 0) {

@@ -1154,6 +1162,10 @@ int spi_flash_scan(struct spi_flash *flash)
 	if (flash->dual_flash & SF_DUAL_STACKED_FLASH)
 		flash->size <<= 1;
 #endif
+	if (flash->size > SPI_FLASH_16MB_BOUN)
+		flash->addr_width = 4;
+	else
+		flash->addr_width = 3;
 
 #ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS
 	/* Compute erase sector and command */
include/spi_flash.h +2 -0
index be2fe3f84cb9..c65bf22aee8b 100644
@@ -39,6 +39,7 @@ struct spi_slave;
  * @flags:		Indication of spi flash flags
  * @size:		Total flash size
  * @page_size:		Write (page) size
+ * @addr_width:		number of address bytes
  * @sector_size:	Sector size
  * @erase_size:		Erase size
  * @bank_read_cmd:	Bank read cmd

@@ -72,6 +73,7 @@ struct spi_flash {
 
 	u32 size;
 	u32 page_size;
+	u8 addr_width;
 	u32 sector_size;
 	u32 erase_size;
 #ifdef CONFIG_SPI_FLASH_BAR
Signature · 1 line
2.10.0.479.g7c56b16
#3 lore raw

RFC PATCH v2 1/1 sf: support chips using 4-byte addressing

Hi Chris,

Quoted 9 lines

-----Original Message-----
From: U-Boot [mailto:u-boot-bounces at lists.denx.de] On Behalf Of Chris Packham
Sent: Wednesday, October 19, 2016 2:06 PM
To: u-boot at lists.denx.de
Cc: Jagan Teki <[email protected]>; Chris Packham <[email protected]>
Subject: [U-Boot] [RFC PATCH v2] sf: support chips using 4-byte addressing

Quoted 3 lines

SPI chips with >16MB capacity use 4-byte addressing to allow accessing beyond 16MB. When the size of the SPI flash exceeds 16MB switch to using 4 byte addressing.

Not all spi controllers support 4-byte addressing and hence its better not to decide just using spi flash device size but consider capability of driver also into account.

Thanks,
Siva

Quoted 151 lines
Signed-off-by Chris Packham <[email protected]>

---

Changes in v2:
- automatically detect when 4 byte addressing is needed. This is similar to how the linux kernel does the same detection

 drivers/mtd/spi/sf_internal.h |  4 ++--
 drivers/mtd/spi/spi_flash.c   | 32 ++++++++++++++++++++++----------
 include/spi_flash.h           |  2 ++
 3 files changed, 26 insertions(+), 12 deletions(-)
drivers/mtd/spi/sf_internal.h +2 -2
index cde4cfbf2e32..db4532849145 100644
@@ -25,8 +25,8 @@ enum spi_nor_option_flags {
 	SNOR_F_USE_FSR		= BIT(1),
 };
 
-#define SPI_FLASH_3B_ADDR_LEN		3
-#define SPI_FLASH_CMD_LEN		(1 + SPI_FLASH_3B_ADDR_LEN)
+#define SPI_FLASE_MAX_ADDR_WIDTH	4
+#define SPI_FLASH_CMD_LEN		(1 + SPI_FLASE_MAX_ADDR_WIDTH)
 #define SPI_FLASH_16MB_BOUN		0x1000000
 
 /* CFI Manufacture ID's */
drivers/mtd/spi/spi_flash.c index renamed from drivers/mtd/spi/spi_flash.c +0 -0

7f6e9ae23ea8..a3efaa129231 100644

drivers/mtd/spi/spi_flash.c +11 -4
@@ -22,12 +22,19 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static void spi_flash_addr(u32 addr, u8 *cmd)
+static void spi_flash_addr(u32 addr, u8 *cmd, u8 addr_width)
 {
 	/* cmd[0] is actual command */
-	cmd[1] = addr >> 16;
-	cmd[2] = addr >> 8;
-	cmd[3] = addr >> 0;
+	if (addr_width == 4) {
+		cmd[1] = addr >> 24;
+		cmd[2] = addr >> 16;
+		cmd[3] = addr >> 8;
+		cmd[4] = addr;
+	} else {
+		cmd[1] = addr >> 16;
+		cmd[2] = addr >> 8;
+		cmd[3] = addr >> 0;
+	}
 }
 
 static int read_sr(struct spi_flash *flash, u8 *rs) @@ -357,12 +364,13 @@

int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)

drivers/mtd/spi/spi_flash.c +1 -2
 		if (ret < 0)
 			return ret;
 #endif
-		spi_flash_addr(erase_addr, cmd);
+		spi_flash_addr(erase_addr, cmd, flash->addr_width);
 
 		debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
 		      cmd[2], cmd[3], erase_addr);
 
-		ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL,

0);

drivers/mtd/spi/spi_flash.c +7 -3
+		ret = spi_flash_write_common(flash, cmd, flash->addr_width
+ 1,
+					     NULL, 0);
 		if (ret < 0) {
 			debug("SF: erase failed\n");
 			break;

@@ -415,12 +423,12 @@ int spi_flash_cmd_write_ops(struct spi_flash
 *flash, u32 offset,
 			chunk_len = min(chunk_len,
 					(size_t)spi->max_write_size);
 
-		spi_flash_addr(write_addr, cmd);
+		spi_flash_addr(write_addr, cmd, flash->addr_width);
 
 		debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }
 chunk_len = %zu\n",
 		      buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
 
-		ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
+		ret = spi_flash_write_common(flash, cmd, flash->addr_width
+ 1,
 					buf + actual, chunk_len);
 		if (ret < 0) {
 			debug("SF: write failed\n");

@@ -492,7 +500,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash,
 u32 offset,
 		return 0;
 	}
 
-	cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
+	cmdsz = flash->addr_width + 1 + flash->dummy_byte;
 	cmd = calloc(1, cmdsz);
 	if (!cmd) {

debug("SF: Failed to allocate cmd\n"); @@ -520,7 +528,7 @@
int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,

drivers/mtd/spi/spi_flash.c +1 -1
 		else
 			read_len = remain_len;
 
-		spi_flash_addr(read_addr, cmd);
+		spi_flash_addr(read_addr, cmd, flash->addr_width);
 
 		ret = spi_flash_read_common(flash, cmd, cmdsz, data,

read_len);

drivers/mtd/spi/spi_flash.c +4 -0
 		if (ret < 0) {

@@ -1154,6 +1162,10 @@ int spi_flash_scan(struct spi_flash *flash)
 	if (flash->dual_flash & SF_DUAL_STACKED_FLASH)
 		flash->size <<= 1;
 #endif
+	if (flash->size > SPI_FLASH_16MB_BOUN)
+		flash->addr_width = 4;
+	else
+		flash->addr_width = 3;
 
 #ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS
 	/* Compute erase sector and command */ diff --git

a/include/spi_flash.h b/include/spi_flash.h index
be2fe3f84cb9..c65bf22aee8b 100644

include/spi_flash.h +2 -1
@@ -39,6 +39,7 @@ struct spi_slave;
  * @flags:		Indication of spi flash flags
  * @size:		Total flash size
  * @page_size:		Write (page) size
+ * @addr_width:		number of address bytes
  * @sector_size:	Sector size
  * @erase_size:		Erase size
  * @bank_read_cmd:	Bank read cmd

@@ -72,6 +73,7 @@ struct spi_flash {
 
 	u32 size;
 	u32 page_size;
+	u8 addr_width;
 	u32 sector_size;
 	u32 erase_size;
 #ifdef CONFIG_SPI_FLASH_BAR
--

2.10.0.479.g7c56b16

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maintainer
#4 lore raw

RFC PATCH v2 1/1 sf: support chips using 4-byte addressing

Quoted 11 lines · Siva Durga Prasad Paladugu

Hi Chris,

Quoted 9 lines

-----Original Message-----
From: U-Boot [mailto:u-boot-bounces at lists.denx.de] On Behalf Of Chris Packham
Sent: Wednesday, October 19, 2016 2:06 PM
To: u-boot at lists.denx.de
Cc: Jagan Teki <[email protected]>; Chris Packham <[email protected]>
Subject: [U-Boot] [RFC PATCH v2] sf: support chips using 4-byte addressing

Quoted 6 lines
Quoted 3 lines

SPI chips with >16MB capacity use 4-byte addressing to allow accessing beyond 16MB. When the size of the SPI flash exceeds 16MB switch to using 4 byte addressing.

Not all spi controllers support 4-byte addressing and hence its better not to decide just using spi flash device size but consider capability of driver also into account.

Also not all SPI devices >16MB support 4 byte addressing, some flash devices just using BAR register to support > 4byte addressing

Please look at the series posted by Cyrille Pitchen on linux-mtd to see how kernel is planning to support 4 byte addressing opcodes:
http://lists-archives.com/linux-kernel/28675410-mtd-spi-nor-parse-sfdp-tables-to-setup-q-spi-memories.html

Quoted 160 lines

Thanks,
Siva

Quoted 147 lines
Signed-off-by Chris Packham <[email protected]>

---

Changes in v2:
- automatically detect when 4 byte addressing is needed. This is similar to how the linux kernel does the same detection

 drivers/mtd/spi/sf_internal.h |  4 ++--
 drivers/mtd/spi/spi_flash.c   | 32 ++++++++++++++++++++++----------
 include/spi_flash.h           |  2 ++
 3 files changed, 26 insertions(+), 12 deletions(-)
drivers/mtd/spi/sf_internal.h +2 -2
index cde4cfbf2e32..db4532849145 100644
@@ -25,8 +25,8 @@ enum spi_nor_option_flags {
 	SNOR_F_USE_FSR		= BIT(1),
 };
 
-#define SPI_FLASH_3B_ADDR_LEN		3
-#define SPI_FLASH_CMD_LEN		(1 + SPI_FLASH_3B_ADDR_LEN)
+#define SPI_FLASE_MAX_ADDR_WIDTH	4
+#define SPI_FLASH_CMD_LEN		(1 + SPI_FLASE_MAX_ADDR_WIDTH)
 #define SPI_FLASH_16MB_BOUN		0x1000000
 
 /* CFI Manufacture ID's */
drivers/mtd/spi/spi_flash.c index renamed from drivers/mtd/spi/spi_flash.c +0 -0

7f6e9ae23ea8..a3efaa129231 100644

drivers/mtd/spi/spi_flash.c +11 -4
@@ -22,12 +22,19 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static void spi_flash_addr(u32 addr, u8 *cmd)
+static void spi_flash_addr(u32 addr, u8 *cmd, u8 addr_width)
 {
 	/* cmd[0] is actual command */
-	cmd[1] = addr >> 16;
-	cmd[2] = addr >> 8;
-	cmd[3] = addr >> 0;
+	if (addr_width == 4) {
+		cmd[1] = addr >> 24;
+		cmd[2] = addr >> 16;
+		cmd[3] = addr >> 8;
+		cmd[4] = addr;
+	} else {
+		cmd[1] = addr >> 16;
+		cmd[2] = addr >> 8;
+		cmd[3] = addr >> 0;
+	}
 }
 
 static int read_sr(struct spi_flash *flash, u8 *rs) @@ -357,12 +364,13 @@

int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)

drivers/mtd/spi/spi_flash.c +1 -2
 		if (ret < 0)
 			return ret;
 #endif
-		spi_flash_addr(erase_addr, cmd);
+		spi_flash_addr(erase_addr, cmd, flash->addr_width);
 
 		debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
 		      cmd[2], cmd[3], erase_addr);
 
-		ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL,

0);

drivers/mtd/spi/spi_flash.c +7 -3
+		ret = spi_flash_write_common(flash, cmd, flash->addr_width
+ 1,
+					     NULL, 0);
 		if (ret < 0) {
 			debug("SF: erase failed\n");
 			break;

@@ -415,12 +423,12 @@ int spi_flash_cmd_write_ops(struct spi_flash
 *flash, u32 offset,
 			chunk_len = min(chunk_len,
 					(size_t)spi->max_write_size);
 
-		spi_flash_addr(write_addr, cmd);
+		spi_flash_addr(write_addr, cmd, flash->addr_width);
 
 		debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x }
 chunk_len = %zu\n",
 		      buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
 
-		ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
+		ret = spi_flash_write_common(flash, cmd, flash->addr_width
+ 1,
 					buf + actual, chunk_len);
 		if (ret < 0) {
 			debug("SF: write failed\n");

@@ -492,7 +500,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash,
 u32 offset,
 		return 0;
 	}
 
-	cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
+	cmdsz = flash->addr_width + 1 + flash->dummy_byte;
 	cmd = calloc(1, cmdsz);
 	if (!cmd) {

debug("SF: Failed to allocate cmd\n"); @@ -520,7 +528,7 @@
int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,

drivers/mtd/spi/spi_flash.c +1 -1
 		else
 			read_len = remain_len;
 
-		spi_flash_addr(read_addr, cmd);
+		spi_flash_addr(read_addr, cmd, flash->addr_width);
 
 		ret = spi_flash_read_common(flash, cmd, cmdsz, data,

read_len);

drivers/mtd/spi/spi_flash.c +4 -0
 		if (ret < 0) {

@@ -1154,6 +1162,10 @@ int spi_flash_scan(struct spi_flash *flash)
 	if (flash->dual_flash & SF_DUAL_STACKED_FLASH)
 		flash->size <<= 1;
 #endif
+	if (flash->size > SPI_FLASH_16MB_BOUN)
+		flash->addr_width = 4;
+	else
+		flash->addr_width = 3;
 
 #ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS
 	/* Compute erase sector and command */ diff --git

a/include/spi_flash.h b/include/spi_flash.h index
be2fe3f84cb9..c65bf22aee8b 100644

include/spi_flash.h +2 -1
@@ -39,6 +39,7 @@ struct spi_slave;
  * @flags:		Indication of spi flash flags
  * @size:		Total flash size
  * @page_size:		Write (page) size
+ * @addr_width:		number of address bytes
  * @sector_size:	Sector size
  * @erase_size:		Erase size
  * @bank_read_cmd:	Bank read cmd

@@ -72,6 +73,7 @@ struct spi_flash {
 
 	u32 size;
 	u32 page_size;
+	u8 addr_width;
 	u32 sector_size;
 	u32 erase_size;
 #ifdef CONFIG_SPI_FLASH_BAR
--

2.10.0.479.g7c56b16

Quoted 4 lines

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Signature · 2 lines
Regards
Vignesh