ARM, arm64: renesas: Enable UHS-I SDR-104
v7 cover ARM, arm64: renesas: Enable UHS-I SDR-104
Hi,
this series enables SDHI UHS-I SDR-104 on:
* r8a7790/lager
* r8a7791/koelsch
* r8a7794/alt
* r8a7795/salvator-x
* r8a7796/salvator-x
It is based on renesas-next-20160908-v4.8-rc1.
For functional SDR-104 support the following dependencies are needed:
* [PATCH v7 0/6] UHS-I SDR-104 support for sh_mobile_sdhi
* [PATCH/RFT,v2,2/8] clk: renesas: r8a7796: Add SDIF clocks
* [PATCH] pinctrl: sh-pfc: r8a7796: Add voltage switch operations for SDHI
* [PATCH v2 0/3] pinctrl: sh-pfc: r8a779[14]: Implement voltage switching for SDHI
To aid review the following git branches are provided:
* This patchset:
https:://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git topic/sdr104-integration-v7
* This patch-set and above dependencies https:://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git topic/sdr104-v7
Furthermore DMA support for R-Car Gen3 is need to achive higher transfer rates on the r8a7795 and r8a7796. For convenience a branch containing a merge of topic/sdr104-v7 (see above) and "[PATCH/RFC v3 0/6] mmc: renesas_sdhi: add R-Car Gen-3 DMA support" (rebased) is provided as:
* https:://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git topic/sdr104-v7+sdhi-dma-v3
Simon Horman (10):
ARM: dts: lager: Enable UHS-I SDR-104
arm64: dts: r8a7795: salvator-x: Enable UHS-I SDR-104
ARM: dts: r8a7791: set maximum frequency for SDHI clocks
ARM: dts: koelsch: Enable UHS-I SDR-50 and SDR-104
ARM: dts: r8a7794: set maximum frequency for SDHI clocks
ARM: dts: alt: Enable UHS-I SDR-50 and SDR-104
arm64: dts: r8a7796: add SDHI nodes
arm64: dts: r8a7796: salvator-x: enable SDHI0 & 3
arm64: dts: r8a7796: salvator-x: enable UHS for SDHI 0 & 3
arm64: dts: r8a7796: salvator-x: Enable UHS-I SDR-104
Wolfram Sang (1):
arm64: dts: r8a7795: salvator-x: enable UHS for SDHI 0 & 3
arch/arm/boot/dts/r8a7790-lager.dts | 1 + arch/arm/boot/dts/r8a7791-koelsch.dts | 34 ++++++- arch/arm/boot/dts/r8a7791.dtsi | 3 + arch/arm/boot/dts/r8a7794-alt.dts | 23 ++++- arch/arm/boot/dts/r8a7794.dtsi | 3 + arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 24 ++++- arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 104 +++++++++++++++++++++ arch/arm64/boot/dts/renesas/r8a7796.dtsi | 42 +++++++++ 8 files changed, 227 insertions(+), 7 deletions(-)
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v7 1/11 ARM: dts: lager: Enable UHS-I SDR-104
Add the sd-uhs-sdr104 property to SDHI0.
--- arch/arm/boot/dts/r8a7790-lager.dts | 1 + 1 file changed, 1 insertion(+)
arch/arm/boot/dts/r8a7790-lager.dts +1 -0
@@ -559,6 +559,7 @@ vqmmc-supply = <&vccq_sdhi0>; cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; sd-uhs-sdr50; + sd-uhs-sdr104; status = "okay"; };
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v7 2/11 arm64: dts: r8a7795: salvator-x: enable UHS for SDHI 0 & 3
In reply to Simon HormanFrom: Wolfram Sang <[email protected]>
---
v6
* Updated patch prefix: s/salvator/&-x/
v5
* Added to series, previously posted by Wolfram independently
--- arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts +20 -2
@@ -237,11 +237,25 @@ sdhi0_pins: sd0 { groups = "sdhi0_data4", "sdhi0_ctrl"; function = "sdhi0"; + power-source = <3300>; + }; + + sdhi0_pins_uhs: sd0_uhs { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <1800>; }; sdhi3_pins: sd3 { groups = "sdhi3_data4", "sdhi3_ctrl"; function = "sdhi3"; + power-source = <3300>; + }; + + sdhi3_pins_uhs: sd3_uhs { + groups = "sdhi3_data4", "sdhi3_ctrl"; + function = "sdhi3"; + power-source = <1800>; }; sound_pins: sound {
@@ -371,25 +385,29 @@ &sdhi0 { pinctrl-0 = <&sdhi0_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdhi0_pins_uhs>; + pinctrl-names = "default", "state_uhs"; vmmc-supply = <&vcc_sdhi0>; vqmmc-supply = <&vccq_sdhi0>; cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; bus-width = <4>; + sd-uhs-sdr50; status = "okay"; }; &sdhi3 { pinctrl-0 = <&sdhi3_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdhi3_pins_uhs>; + pinctrl-names = "default", "state_uhs"; vmmc-supply = <&vcc_sdhi3>; vqmmc-supply = <&vccq_sdhi3>; cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; bus-width = <4>; + sd-uhs-sdr50; status = "okay"; };
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v7 2/11 arm64: dts: r8a7795: salvator-x: enable UHS for SDHI 0 & 3
Quoted 5 lines · Simon Horman
From: Wolfram Sang <[email protected]>
Reviewed-by Geert Uytterhoeven <[email protected]>Signed-off-by Wolfram Sang <[email protected]>Signed-off-by Simon Horman <[email protected]>
As SDR50 support is present in the driver in mainline (correct me if I am wrong!) I am queuing this up.
PATCH v7 2/11 arm64: dts: r8a7795: salvator-x: enable UHS for SDHI 0 & 3
Quoted 9 lines · Simon Horman
Quoted 5 lines · Simon Horman
From: Wolfram Sang <[email protected]>
Reviewed-by Geert Uytterhoeven <[email protected]>Signed-off-by Wolfram Sang <[email protected]>Signed-off-by Simon Horman <[email protected]>As SDR50 support is present in the driver in mainline (correct me if I am wrong!) I am queuing this up.
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PATCH v7 3/11 arm64: dts: r8a7795: salvator-x: Enable UHS-I SDR-104
In reply to Simon HormanAdd the sd-uhs-sdr104 property to SDHI0 and SDHI1.
---
v5
* New patch
--- arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 2 ++ 1 file changed, 2 insertions(+)
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts +2 -0
@@ -394,6 +394,7 @@ wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; bus-width = <4>; sd-uhs-sdr50; + sd-uhs-sdr104; status = "okay"; };
@@ -408,6 +409,7 @@ wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; bus-width = <4>; sd-uhs-sdr50; + sd-uhs-sdr104; status = "okay"; };
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v7 3/11 arm64: dts: r8a7795: salvator-x: Enable UHS-I SDR-104
Quoted 1 line · Simon Horman
Add the sd-uhs-sdr104 property to SDHI0 and SDHI1.
SDHI0 and SDHI3?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
PATCH v7 3/11 arm64: dts: r8a7795: salvator-x: Enable UHS-I SDR-104
Quoted 5 lines · Geert Uytterhoeven
Quoted 1 line · Simon Horman
Add the sd-uhs-sdr104 property to SDHI0 and SDHI1.
SDHI0 and SDHI3?
Thanks, I will fix that.
PATCH v7 4/11 ARM: dts: r8a7791: set maximum frequency for SDHI clocks
In reply to Simon HormanDefine the upper limit otherwise the driver cannot utilize max speeds.
--- arch/arm/boot/dts/r8a7791.dtsi | 3 +++ 1 file changed, 3 insertions(+)
arch/arm/boot/dts/r8a7791.dtsi +3 -0
@@ -584,6 +584,7 @@ dmas = <&dmac0 0xcd>, <&dmac0 0xce>, <&dmac1 0xcd>, <&dmac1 0xce>; dma-names = "tx", "rx", "tx", "rx"; + max-frequency = <195000000>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; };
@@ -596,6 +597,7 @@ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, <&dmac1 0xc1>, <&dmac1 0xc2>; dma-names = "tx", "rx", "tx", "rx"; + max-frequency = <97500000>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; };
@@ -608,6 +610,7 @@ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, <&dmac1 0xd3>, <&dmac1 0xd4>; dma-names = "tx", "rx", "tx", "rx"; + max-frequency = <97500000>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled"; };
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v7 4/11 ARM: dts: r8a7791: set maximum frequency for SDHI clocks
Quoted 3 lines · Simon Horman
Define the upper limit otherwise the driver cannot utilize max speeds.
Signed-off-by Simon Horman <[email protected]>
I have queued this up.
PATCH v7 5/11 ARM: dts: koelsch: Enable UHS-I SDR-50 and SDR-104
In reply to Simon HormanAdd the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,1,2}. And the sd-uhs-sdr104 property to SDHI0.
--- arch/arm/boot/dts/r8a7791-koelsch.dts | 34 +++++++++++++++++++++++++++++++--- 1 file changed, 31 insertions(+), 3 deletions(-)
arch/arm/boot/dts/r8a7791-koelsch.dts +31 -3
@@ -360,16 +360,37 @@ sdhi0_pins: sd0 { groups = "sdhi0_data4", "sdhi0_ctrl"; function = "sdhi0"; + power-source = <3300>; + }; + + sdhi0_pins_uhs: sd0_uhs { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <1800>; }; sdhi1_pins: sd1 { groups = "sdhi1_data4", "sdhi1_ctrl"; function = "sdhi1"; + power-source = <3300>; + }; + + sdhi1_pins_uhs: sd1_uhs { + groups = "sdhi1_data4", "sdhi1_ctrl"; + function = "sdhi1"; + power-source = <1800>; }; sdhi2_pins: sd2 { groups = "sdhi2_data4", "sdhi2_ctrl"; function = "sdhi2"; + power-source = <3300>; + }; + + sdhi2_pins_uhs: sd2_uhs { + groups = "sdhi2_data4", "sdhi2_ctrl"; + function = "sdhi2"; + power-source = <1800>; }; qspi_pins: qspi {
@@ -454,33 +475,40 @@ &sdhi0 { pinctrl-0 = <&sdhi0_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdhi0_pins_uhs>; + pinctrl-names = "default", "state_uhs"; vmmc-supply = <&vcc_sdhi0>; vqmmc-supply = <&vccq_sdhi0>; cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>; wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; + sd-uhs-sdr50; + sd-uhs-sdr104; status = "okay"; }; &sdhi1 { pinctrl-0 = <&sdhi1_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdhi1_pins_uhs>; + pinctrl-names = "default", "state_uhs"; vmmc-supply = <&vcc_sdhi1>; vqmmc-supply = <&vccq_sdhi1>; cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>; + sd-uhs-sdr50; status = "okay"; }; &sdhi2 { pinctrl-0 = <&sdhi2_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdhi2_pins_uhs>; + pinctrl-names = "default", "state_uhs"; vmmc-supply = <&vcc_sdhi2>; vqmmc-supply = <&vccq_sdhi2>; cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>; + sd-uhs-sdr50; status = "okay"; };
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v7 5/11 ARM: dts: koelsch: Enable UHS-I SDR-50 and SDR-104
Quoted 4 lines · Simon Horman
Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,1,2}. And the sd-uhs-sdr104 property to SDHI0.
Signed-off-by Simon Horman <[email protected]>
As SDR50 support is present in the driver in mainline (correct me if I am wrong!) I have queued this up after dropping the sdr104 portion and updating the changelog accordingly.
The result is as follows:
From: Simon Horman <[email protected]>
Date: Tue, 13 Sep 2016 12:57:02 +0200
Subject: [PATCH] ARM: dts: koelsch: arm64: dts: r8a7795: salvator-x: enable
UHS for SDHI 0, 1 & 3
Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,1,2}.
--- arch/arm/boot/dts/r8a7791-koelsch.dts | 33 ++++++++++++++++++++++++++++++--- 1 file changed, 30 insertions(+), 3 deletions(-)
arch/arm/boot/dts/r8a7791-koelsch.dts +30 -3
@@ -360,16 +360,37 @@ sdhi0_pins: sd0 { groups = "sdhi0_data4", "sdhi0_ctrl"; function = "sdhi0"; + power-source = <3300>; + }; + + sdhi0_pins_uhs: sd0_uhs { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <1800>; }; sdhi1_pins: sd1 { groups = "sdhi1_data4", "sdhi1_ctrl"; function = "sdhi1"; + power-source = <3300>; + }; + + sdhi1_pins_uhs: sd1_uhs { + groups = "sdhi1_data4", "sdhi1_ctrl"; + function = "sdhi1"; + power-source = <1800>; }; sdhi2_pins: sd2 { groups = "sdhi2_data4", "sdhi2_ctrl"; function = "sdhi2"; + power-source = <3300>; + }; + + sdhi2_pins_uhs: sd2_uhs { + groups = "sdhi2_data4", "sdhi2_ctrl"; + function = "sdhi2"; + power-source = <1800>; }; qspi_pins: qspi {
@@ -454,33 +475,39 @@ &sdhi0 { pinctrl-0 = <&sdhi0_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdhi0_pins_uhs>; + pinctrl-names = "default", "state_uhs"; vmmc-supply = <&vcc_sdhi0>; vqmmc-supply = <&vccq_sdhi0>; cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>; wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; + sd-uhs-sdr50; status = "okay"; }; &sdhi1 { pinctrl-0 = <&sdhi1_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdhi1_pins_uhs>; + pinctrl-names = "default", "state_uhs"; vmmc-supply = <&vcc_sdhi1>; vqmmc-supply = <&vccq_sdhi1>; cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>; + sd-uhs-sdr50; status = "okay"; }; &sdhi2 { pinctrl-0 = <&sdhi2_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdhi2_pins_uhs>; + pinctrl-names = "default", "state_uhs"; vmmc-supply = <&vcc_sdhi2>; vqmmc-supply = <&vccq_sdhi2>; cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>; + sd-uhs-sdr50; status = "okay"; };
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v7 5/11 ARM: dts: koelsch: Enable UHS-I SDR-50 and SDR-104
Quoted 9 lines · Simon Horman
Quoted 4 lines · Simon Horman
Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,1,2}. And the sd-uhs-sdr104 property to SDHI0.
Signed-off-by Simon Horman <[email protected]>As SDR50 support is present in the driver in mainline (correct me if I am wrong!) I have queued this up after dropping the sdr104 portion and updating the changelog accordingly.
Looks good!
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PATCH v7 6/11 ARM: dts: r8a7794: set maximum frequency for SDHI clocks
In reply to Simon HormanDefine the upper limit otherwise the driver cannot utilize max speeds.
--- arch/arm/boot/dts/r8a7794.dtsi | 3 +++ 1 file changed, 3 insertions(+)
arch/arm/boot/dts/r8a7794.dtsi +3 -0
@@ -731,6 +731,7 @@ dmas = <&dmac0 0xcd>, <&dmac0 0xce>, <&dmac1 0xcd>, <&dmac1 0xce>; dma-names = "tx", "rx", "tx", "rx"; + max-frequency = <195000000>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; status = "disabled"; };
@@ -743,6 +744,7 @@ dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, <&dmac1 0xc1>, <&dmac1 0xc2>; dma-names = "tx", "rx", "tx", "rx"; + max-frequency = <97500000>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; status = "disabled"; };
@@ -755,6 +757,7 @@ dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, <&dmac1 0xd3>, <&dmac1 0xd4>; dma-names = "tx", "rx", "tx", "rx"; + max-frequency = <97500000>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; status = "disabled"; };
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v7 6/11 ARM: dts: r8a7794: set maximum frequency for SDHI clocks
Quoted 3 lines · Simon Horman
Define the upper limit otherwise the driver cannot utilize max speeds.
Signed-off-by Simon Horman <[email protected]>
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PATCH v7 7/11 ARM: dts: alt: Enable UHS-I SDR-50 and SDR-104
In reply to Simon HormanAdd the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,1}. And the sd-uhs-sdr104 property to SDHI0.
--- arch/arm/boot/dts/r8a7794-alt.dts | 23 +++++++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-)
arch/arm/boot/dts/r8a7794-alt.dts +21 -2
@@ -207,11 +207,25 @@ sdhi0_pins: sd0 { groups = "sdhi0_data4", "sdhi0_ctrl"; function = "sdhi0"; + power-source = <3300>; + }; + + sdhi0_pins_uhs: sd0_uhs { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <1800>; }; sdhi1_pins: sd1 { groups = "sdhi1_data4", "sdhi1_ctrl"; function = "sdhi1"; + power-source = <3300>; + }; + + sdhi1_pins_uhs: sd1_uhs { + groups = "sdhi1_data4", "sdhi1_ctrl"; + function = "sdhi1"; + power-source = <1800>; }; };
@@ -255,23 +269,28 @@ &sdhi0 { pinctrl-0 = <&sdhi0_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdhi0_pins_uhs>; + pinctrl-names = "default", "state_uhs"; vmmc-supply = <&vcc_sdhi0>; vqmmc-supply = <&vccq_sdhi0>; cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>; wp-gpios = <&gpio6 7 GPIO_ACTIVE_LOW>; + sd-uhs-sdr50; + sd-uhs-sdr104; status = "okay"; }; &sdhi1 { pinctrl-0 = <&sdhi1_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdhi1_pins_uhs>; + pinctrl-names = "default", "state_uhs"; vmmc-supply = <&vcc_sdhi1>; vqmmc-supply = <&vccq_sdhi1>; cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; wp-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>; + sd-uhs-sdr50; status = "okay"; };
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v7 7/11 ARM: dts: alt: Enable UHS-I SDR-50 and SDR-104
Quoted 4 lines · Simon Horman
Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,1}. And the sd-uhs-sdr104 property to SDHI0.
Signed-off-by Simon Horman <[email protected]>
If you drop sdr104 here for now as well:
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PATCH v7 7/11 ARM: dts: alt: Enable UHS-I SDR-50 and SDR-104
Quoted 9 lines · Wolfram Sang
Quoted 4 lines · Simon Horman
Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,1}. And the sd-uhs-sdr104 property to SDHI0.
Signed-off-by Simon Horman <[email protected]>If you drop sdr104 here for now as well:
Reviewed-by Wolfram Sang <[email protected]>
Thanks, done.
The result is as follows:
From: Simon Horman <[email protected]>
Date: Tue, 13 Sep 2016 12:57:04 +0200
Subject: [PATCH] ARM: dts: alt: enable UHS for SDHI 0 & 1
Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,1}.
--- arch/arm/boot/dts/r8a7794-alt.dts | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-)
arch/arm/boot/dts/r8a7794-alt.dts +20 -2
@@ -207,11 +207,25 @@ sdhi0_pins: sd0 { groups = "sdhi0_data4", "sdhi0_ctrl"; function = "sdhi0"; + power-source = <3300>; + }; + + sdhi0_pins_uhs: sd0_uhs { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <1800>; }; sdhi1_pins: sd1 { groups = "sdhi1_data4", "sdhi1_ctrl"; function = "sdhi1"; + power-source = <3300>; + }; + + sdhi1_pins_uhs: sd1_uhs { + groups = "sdhi1_data4", "sdhi1_ctrl"; + function = "sdhi1"; + power-source = <1800>; }; };
@@ -255,23 +269,27 @@ &sdhi0 { pinctrl-0 = <&sdhi0_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdhi0_pins_uhs>; + pinctrl-names = "default", "state_uhs"; vmmc-supply = <&vcc_sdhi0>; vqmmc-supply = <&vccq_sdhi0>; cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>; wp-gpios = <&gpio6 7 GPIO_ACTIVE_LOW>; + sd-uhs-sdr50; status = "okay"; }; &sdhi1 { pinctrl-0 = <&sdhi1_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdhi1_pins_uhs>; + pinctrl-names = "default", "state_uhs"; vmmc-supply = <&vcc_sdhi1>; vqmmc-supply = <&vccq_sdhi1>; cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; wp-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>; + sd-uhs-sdr50; status = "okay"; };
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v7 8/11 arm64: dts: r8a7796: add SDHI nodes
In reply to Simon HormanAdd SDHI nodes to the DT of the r8a7796 SoC.
Based on the DT of the r8a7795 SoC.
--- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 42 ++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+)
arch/arm64/boot/dts/renesas/r8a7796.dtsi +42 -0
@@ -251,5 +251,47 @@ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; status = "disabled"; }; + + sdhi0: sd at ee100000 { + compatible = "renesas,sdhi-r8a7796"; + reg = <0 0xee100000 0 0x2000>; + interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 314>; + max-frequency = <200000000>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + status = "disabled"; + }; + + sdhi1: sd at ee120000 { + compatible = "renesas,sdhi-r8a7796"; + reg = <0 0xee120000 0 0x2000>; + interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 313>; + max-frequency = <200000000>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + status = "disabled"; + }; + + sdhi2: sd at ee140000 { + compatible = "renesas,sdhi-r8a7796"; + reg = <0 0xee140000 0 0x2000>; + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 312>; + max-frequency = <200000000>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + cap-mmc-highspeed; + status = "disabled"; + }; + + sdhi3: sd at ee160000 { + compatible = "renesas,sdhi-r8a7796"; + reg = <0 0xee160000 0 0x2000>; + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 311>; + max-frequency = <200000000>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + cap-mmc-highspeed; + status = "disabled"; + }; }; };
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v7 8/11 arm64: dts: r8a7796: add SDHI nodes
Quoted 6 lines · Simon Horman
Add SDHI nodes to the DT of the r8a7796 SoC.
Based on the DT of the r8a7795 SoC.
Signed-off-by Simon Horman <[email protected]>Reviewed-by Geert Uytterhoeven <[email protected]>
If you remove the two lines you removed from H3 already:
arch/arm64/boot/dts/renesas/r8a7796.dtsi line 282
Quoted 8 lines
arch/arm64/boot/dts/renesas/r8a7796.dtsi +8
-0+ sdhi2: sd at ee140000 { + compatible = "renesas,sdhi-r8a7796"; + reg = <0 0xee140000 0 0x2000>; + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 312>; + max-frequency = <200000000>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + cap-mmc-highspeed;
This one...
arch/arm64/boot/dts/renesas/r8a7796.dtsi line 293
Quoted 11 lines
arch/arm64/boot/dts/renesas/r8a7796.dtsi +11
-0+ status = "disabled"; + }; + + sdhi3: sd at ee160000 { + compatible = "renesas,sdhi-r8a7796"; + reg = <0 0xee160000 0 0x2000>; + interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 311>; + max-frequency = <200000000>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + cap-mmc-highspeed;
... and ditto.
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PATCH v7 8/11 arm64: dts: r8a7796: add SDHI nodes
Quoted 9 lines · Wolfram Sang
Quoted 6 lines · Simon Horman
Add SDHI nodes to the DT of the r8a7796 SoC.
Based on the DT of the r8a7795 SoC.
Signed-off-by Simon Horman <[email protected]>Reviewed-by Geert Uytterhoeven <[email protected]>If you remove the two lines you removed from H3 already:
Thanks, done.
Quoted 1 line
Reviewed-by Wolfram Sang <[email protected]>
PATCH v7 8/11 arm64: dts: r8a7796: add SDHI nodes
Quoted 4 lines · Simon Horman
Quoted 3 lines · Wolfram Sang
Quoted 2 lines · Simon Horman
Add SDHI nodes to the DT of the r8a7796 SoC.
Quoted 10 lines
Quoted 6 lines
Quoted 4 lines
Based on the DT of the r8a7795 SoC.
Signed-off-by Simon Horman <[email protected]>Reviewed-by Geert Uytterhoeven <[email protected]>If you remove the two lines you removed from H3 already:
Thanks, done.
Quoted 1 line
Reviewed-by Wolfram Sang <[email protected]>
I have queued this up for v4.10.
PATCH v7 9/11 arm64: dts: r8a7796: salvator-x: enable SDHI0 & 3
In reply to Simon HormanEnable the exposed SD card slots in the DT of the r8a7796/salvator-x.
Based on work for the r8a7795/salvator-x by Ai Kyuse.
--- arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 84 ++++++++++++++++++++++ 1 file changed, 84 insertions(+)
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts +84 -0
@@ -10,6 +10,7 @@ /dts-v1/; #include "r8a7796.dtsi" +#include <dt-bindings/gpio/gpio.h> / { model = "Renesas Salvator-X board based on r8a7796";
@@ -29,6 +30,55 @@ /* first 128MB is reserved for secure area. */ reg = <0x0 0x48000000 0x0 0x78000000>; }; + + vcc_sdhi0: regulator-vcc-sdhi0 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI0 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi0: regulator-vccq-sdhi0 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI0 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; + + vcc_sdhi3: regulator-vcc-sdhi3 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI3 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vccq_sdhi3: regulator-vccq-sdhi3 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI3 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; + }; &pfc {
@@ -43,12 +93,46 @@ groups = "scif_clk_a"; function = "scif_clk"; }; + + sdhi0_pins: sd0 { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + }; + + sdhi3_pins: sd3 { + groups = "sdhi3_data4", "sdhi3_ctrl"; + function = "sdhi3"; + }; }; &extal_clk { clock-frequency = <16666666>; }; +&sdhi0 { + pinctrl-0 = <&sdhi0_pins>; + pinctrl-names = "default"; + + vmmc-supply = <&vcc_sdhi0>; + vqmmc-supply = <&vccq_sdhi0>; + cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; + bus-width = <4>; + status = "okay"; +}; + +&sdhi3 { + pinctrl-0 = <&sdhi3_pins>; + pinctrl-names = "default"; + + vmmc-supply = <&vcc_sdhi3>; + vqmmc-supply = <&vccq_sdhi3>; + cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; + bus-width = <4>; + status = "okay"; +}; + &scif2 { pinctrl-0 = <&scif2_pins>; pinctrl-names = "default";
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v7 9/11 arm64: dts: r8a7796: salvator-x: enable SDHI0 & 3
Quoted 6 lines · Simon Horman
Enable the exposed SD card slots in the DT of the r8a7796/salvator-x.
Based on work for the r8a7795/salvator-x by Ai Kyuse.
Signed-off-by Simon Horman <[email protected]>Reviewed-by Geert Uytterhoeven <[email protected]>
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PATCH v7 9/11 arm64: dts: r8a7796: salvator-x: enable SDHI0 & 3
Quoted 9 lines · Wolfram Sang
Quoted 6 lines · Simon Horman
Enable the exposed SD card slots in the DT of the r8a7796/salvator-x.
Based on work for the r8a7795/salvator-x by Ai Kyuse.
Signed-off-by Simon Horman <[email protected]>Reviewed-by Geert Uytterhoeven <[email protected]>Reviewed-by Wolfram Sang <[email protected]>
Thanks, I have queued this up.
PATCH v7 10/11 arm64: dts: r8a7796: salvator-x: enable UHS for SDHI 0 & 3
In reply to Simon HormanBased on work for the r8a7796 by Wolfram Sang.
--- arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts +20 -2
@@ -97,11 +97,25 @@ sdhi0_pins: sd0 { groups = "sdhi0_data4", "sdhi0_ctrl"; function = "sdhi0"; + power-source = <3300>; + }; + + sdhi0_pins_uhs: sd0_uhs { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <1800>; }; sdhi3_pins: sd3 { groups = "sdhi3_data4", "sdhi3_ctrl"; function = "sdhi3"; + power-source = <3300>; + }; + + sdhi3_pins_uhs: sd3_uhs { + groups = "sdhi3_data4", "sdhi3_ctrl"; + function = "sdhi3"; + power-source = <1800>; }; };
@@ -111,25 +125,29 @@ &sdhi0 { pinctrl-0 = <&sdhi0_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdhi0_pins_uhs>; + pinctrl-names = "default", "state_uhs"; vmmc-supply = <&vcc_sdhi0>; vqmmc-supply = <&vccq_sdhi0>; cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; bus-width = <4>; + sd-uhs-sdr50; status = "okay"; }; &sdhi3 { pinctrl-0 = <&sdhi3_pins>; - pinctrl-names = "default"; + pinctrl-1 = <&sdhi3_pins_uhs>; + pinctrl-names = "default", "state_uhs"; vmmc-supply = <&vcc_sdhi3>; vqmmc-supply = <&vccq_sdhi3>; cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; bus-width = <4>; + sd-uhs-sdr50; status = "okay"; };
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v7 10/11 arm64: dts: r8a7796: salvator-x: enable UHS for SDHI 0 & 3
Quoted 4 lines · Simon Horman
Based on work for the r8a7796 by Wolfram Sang.
Cc Wolfram Sang <[email protected]>Signed-off-by Simon Horman <[email protected]>
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PATCH v7 10/11 arm64: dts: r8a7796: salvator-x: enable UHS for SDHI 0 & 3
Quoted 7 lines · Wolfram Sang
Quoted 4 lines · Simon Horman
Based on work for the r8a7796 by Wolfram Sang.
Cc Wolfram Sang <[email protected]>Signed-off-by Simon Horman <[email protected]>Reviewed-by Wolfram Sang <[email protected]>
Thanks, I have queued this up.
PATCH v7 11/11 arm64: dts: r8a7796: salvator-x: Enable UHS-I SDR-104
In reply to Simon HormanAdd the sd-uhs-sdr104 property to SDHI0 and SDHI1.
--- arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 2 ++ 1 file changed, 2 insertions(+)
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts +2 -0
@@ -134,6 +134,7 @@ wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; bus-width = <4>; sd-uhs-sdr50; + sd-uhs-sdr104; status = "okay"; };
@@ -148,6 +149,7 @@ wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; bus-width = <4>; sd-uhs-sdr50; + sd-uhs-sdr104; status = "okay"; };
Signature · 1 line
2.7.0.rc3.207.g0ac5344
PATCH v7 11/11 arm64: dts: r8a7796: salvator-x: Enable UHS-I SDR-104
Quoted 1 line · Simon Horman
Add the sd-uhs-sdr104 property to SDHI0 and SDHI1.
SDHI0 and SDHI3.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
PATCH v7 11/11 arm64: dts: r8a7796: salvator-x: Enable UHS-I SDR-104
Quoted 5 lines · Geert Uytterhoeven
Quoted 1 line · Simon Horman
Add the sd-uhs-sdr104 property to SDHI0 and SDHI1.
SDHI0 and SDHI3.
Thanks, I will fix that.