ARM: boot: mxs: Add On-Chip RAM
Subsystems (3)
cover ARM: boot: mxs: Add On-Chip RAM
The i.MX23 / i.MX28 have a small amount of On-Chip RAM which is also necessary for suspend to RAM and standby mode. But before we need to remove the fake reg properties of all internal bus nodes as discussed in this thread [1].
This patch series requires Fabio Estevam's recent series "ARM: dts: imx23:
Remove skeleton.dtsi inclusion" [2].
[1] - https://marc.info/?l=devicetree&m=146139948426520&w=2
[2] - http://www.spinics.net/lists/arm-kernel/msg528974.html
Stefan Wahren (4):
ARM: dts: imx23: Remove fake "reg" properties from bus nodes
ARM: dts: imx28: Remove fake "reg" properties from bus nodes
ARM: dts: imx23: add On-Chip RAM
ARM: dts: imx28: add On-Chip RAM
arch/arm/boot/dts/imx23-evk.dts | 8 ++++---- arch/arm/boot/dts/imx23-olinuxino.dts | 8 ++++---- arch/arm/boot/dts/imx23-sansa.dts | 8 ++++---- arch/arm/boot/dts/imx23-stmp378x_devb.dts | 6 +++--- arch/arm/boot/dts/imx23-xfi3.dts | 8 ++++---- arch/arm/boot/dts/imx23.dtsi | 15 +++++++++------ arch/arm/boot/dts/imx28-apf28.dts | 8 ++++---- arch/arm/boot/dts/imx28-apf28dev.dts | 8 ++++---- arch/arm/boot/dts/imx28-apx4devkit.dts | 8 ++++---- arch/arm/boot/dts/imx28-cfa10036.dts | 8 ++++---- arch/arm/boot/dts/imx28-cfa10037.dts | 8 ++++---- arch/arm/boot/dts/imx28-cfa10049.dts | 10 +++++----- arch/arm/boot/dts/imx28-cfa10055.dts | 6 +++--- arch/arm/boot/dts/imx28-cfa10056.dts | 4 ++-- arch/arm/boot/dts/imx28-cfa10057.dts | 10 +++++----- arch/arm/boot/dts/imx28-cfa10058.dts | 10 +++++----- arch/arm/boot/dts/imx28-duckbill.dts | 8 ++++---- arch/arm/boot/dts/imx28-evk.dts | 8 ++++---- arch/arm/boot/dts/imx28-m28.dtsi | 6 +++--- arch/arm/boot/dts/imx28-m28cu3.dts | 8 ++++---- arch/arm/boot/dts/imx28-m28evk.dts | 8 ++++---- arch/arm/boot/dts/imx28-sps1.dts | 8 ++++---- arch/arm/boot/dts/imx28.dtsi | 17 +++++++++-------- 23 files changed, 100 insertions(+), 96 deletions(-)
Signature · 1 line
1.7.9.5
PATCH 1/4 ARM: dts: imx23: Remove fake "reg" properties from bus nodes
There is no need to specify fake "reg" properties for the internal bus nodes based on the registers of its child devices. This also avoids overlapping issues on adding the sram node.
--- arch/arm/boot/dts/imx23-evk.dts | 8 ++++---- arch/arm/boot/dts/imx23-olinuxino.dts | 8 ++++---- arch/arm/boot/dts/imx23-sansa.dts | 8 ++++---- arch/arm/boot/dts/imx23-stmp378x_devb.dts | 6 +++--- arch/arm/boot/dts/imx23-xfi3.dts | 8 ++++---- arch/arm/boot/dts/imx23.dtsi | 10 ++++------ 6 files changed, 23 insertions(+), 25 deletions(-)
arch/arm/boot/dts/imx23-evk.dts +4 -4
@@ -21,8 +21,8 @@ reg = <0x40000000 0x08000000>; }; - apb at 80000000 { - apbh at 80000000 { + apb { + apbh { gpmi-nand at 8000c000 { pinctrl-names = "default"; pinctrl-0 = <&gpmi_pins_a &gpmi_pins_fixup>;
@@ -90,7 +90,7 @@ }; }; - apbx at 80040000 { + apbx { lradc at 80050000 { status = "okay"; fsl,lradc-touchscreen-wires = <4>;
@@ -120,7 +120,7 @@ }; }; - ahb at 80080000 { + ahb { usb0: usb at 80080000 { status = "okay"; };
arch/arm/boot/dts/imx23-olinuxino.dts +4 -4
@@ -24,8 +24,8 @@ reg = <0x40000000 0x04000000>; }; - apb at 80000000 { - apbh at 80000000 { + apb { + apbh { ssp0: ssp at 80010000 { compatible = "fsl,imx23-mmc"; pinctrl-names = "default";
@@ -70,7 +70,7 @@ }; }; - apbx at 80040000 { + apbx { lradc at 80050000 { status = "okay"; };
@@ -99,7 +99,7 @@ }; }; - ahb at 80080000 { + ahb { usb0: usb at 80080000 { dr_mode = "host"; vbus-supply = <®_usb0_vbus>;
arch/arm/boot/dts/imx23-sansa.dts +4 -4
@@ -53,8 +53,8 @@ reg = <0x40000000 0x04000000>; }; - apb at 80000000 { - apbh at 80000000 { + apb { + apbh { ssp0: ssp at 80010000 { compatible = "fsl,imx23-mmc"; pinctrl-names = "default";
@@ -99,7 +99,7 @@ }; }; - apbx at 80040000 { + apbx { pwm: pwm at 80064000 { pinctrl-names = "default"; pinctrl-0 = <&pwm2_pins_a>;
@@ -122,7 +122,7 @@ }; }; - ahb at 80080000 { + ahb { usb0: usb at 80080000 { dr_mode = "peripheral"; status = "okay";
arch/arm/boot/dts/imx23-stmp378x_devb.dts +3 -3
@@ -21,8 +21,8 @@ reg = <0x40000000 0x04000000>; }; - apb at 80000000 { - apbh at 80000000 { + apb { + apbh { ssp0: ssp at 80010000 { compatible = "fsl,imx23-mmc"; pinctrl-names = "default";
@@ -50,7 +50,7 @@ }; }; - apbx at 80040000 { + apbx { auart0: serial at 8006c000 { pinctrl-names = "default"; pinctrl-0 = <&auart0_pins_a>;
arch/arm/boot/dts/imx23-xfi3.dts +4 -4
@@ -53,8 +53,8 @@ reg = <0x40000000 0x04000000>; }; - apb at 80000000 { - apbh at 80000000 { + apb { + apbh { ssp0: ssp at 80010000 { compatible = "fsl,imx23-mmc"; pinctrl-names = "default";
@@ -101,7 +101,7 @@ }; }; - apbx at 80040000 { + apbx { i2c: i2c at 80058000 { pinctrl-names = "default"; pinctrl-0 = <&i2c_pins_a>;
@@ -136,7 +136,7 @@ }; }; - ahb at 80080000 { + ahb { usb0: usb at 80080000 { dr_mode = "peripheral"; status = "okay";
arch/arm/boot/dts/imx23.dtsi +4 -6
@@ -38,14 +38,13 @@ }; }; - apb at 80000000 { + apb { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - reg = <0x80000000 0x80000>; ranges; - apbh at 80000000 { + apbh { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>;
@@ -468,7 +467,7 @@ }; }; - apbx at 80040000 { + apbx { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>;
@@ -602,11 +601,10 @@ }; }; - ahb at 80080000 { + ahb { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - reg = <0x80080000 0x80000>; ranges; usb0: usb at 80080000 {
Signature · 1 line
1.7.9.5
PATCH 2/4 ARM: dts: imx28: Remove fake "reg" properties from bus nodes
In reply to Stefan WahrenThere is no need to specify fake "reg" properties for the internal bus nodes based on the registers of its child devices. This also avoids overlapping issues on adding the sram node.
--- arch/arm/boot/dts/imx28-apf28.dts | 8 ++++---- arch/arm/boot/dts/imx28-apf28dev.dts | 8 ++++---- arch/arm/boot/dts/imx28-apx4devkit.dts | 8 ++++---- arch/arm/boot/dts/imx28-cfa10036.dts | 8 ++++---- arch/arm/boot/dts/imx28-cfa10037.dts | 8 ++++---- arch/arm/boot/dts/imx28-cfa10049.dts | 10 +++++----- arch/arm/boot/dts/imx28-cfa10055.dts | 6 +++--- arch/arm/boot/dts/imx28-cfa10056.dts | 4 ++-- arch/arm/boot/dts/imx28-cfa10057.dts | 10 +++++----- arch/arm/boot/dts/imx28-cfa10058.dts | 10 +++++----- arch/arm/boot/dts/imx28-duckbill.dts | 8 ++++---- arch/arm/boot/dts/imx28-evk.dts | 8 ++++---- arch/arm/boot/dts/imx28-m28.dtsi | 6 +++--- arch/arm/boot/dts/imx28-m28cu3.dts | 8 ++++---- arch/arm/boot/dts/imx28-m28evk.dts | 8 ++++---- arch/arm/boot/dts/imx28-sps1.dts | 8 ++++---- arch/arm/boot/dts/imx28.dtsi | 12 ++++-------- 17 files changed, 67 insertions(+), 71 deletions(-)
arch/arm/boot/dts/imx28-apf28.dts +4 -4
@@ -21,8 +21,8 @@ reg = <0x40000000 0x08000000>; }; - apb at 80000000 { - apbh at 80000000 { + apb { + apbh { gpmi-nand at 8000c000 { pinctrl-names = "default"; pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>;
@@ -65,7 +65,7 @@ }; }; - apbx at 80040000 { + apbx { duart: serial at 80074000 { pinctrl-names = "default"; pinctrl-0 = <&duart_pins_a>;
@@ -74,7 +74,7 @@ }; }; - ahb at 80080000 { + ahb { mac0: ethernet at 800f0000 { phy-mode = "rmii"; pinctrl-names = "default";
arch/arm/boot/dts/imx28-apf28dev.dts +4 -4
@@ -16,8 +16,8 @@ model = "Armadeus Systems APF28Dev docking/development board"; compatible = "armadeus,imx28-apf28dev", "armadeus,imx28-apf28", "fsl,imx28"; - apb at 80000000 { - apbh at 80000000 { + apb { + apbh { ssp0: ssp at 80010000 { compatible = "fsl,imx28-mmc"; pinctrl-names = "default";
@@ -119,7 +119,7 @@ }; }; - apbx at 80040000 { + apbx { lradc at 80050000 { fsl,lradc-touchscreen-wires = <4>; status = "okay";
@@ -154,7 +154,7 @@ }; }; - ahb at 80080000 { + ahb { usb0: usb at 80080000 { pinctrl-names = "default"; pinctrl-0 = <&usb0_otg_apf28dev
arch/arm/boot/dts/imx28-apx4devkit.dts +4 -4
@@ -10,8 +10,8 @@ reg = <0x40000000 0x04000000>; }; - apb at 80000000 { - apbh at 80000000 { + apb { + apbh { gpmi-nand at 8000c000 { pinctrl-names = "default"; pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>;
@@ -124,7 +124,7 @@ }; }; - apbx at 80040000 { + apbx { saif0: saif at 80042000 { pinctrl-names = "default"; pinctrl-0 = <&saif0_pins_a>;
@@ -183,7 +183,7 @@ }; }; - ahb at 80080000 { + ahb { mac0: ethernet at 800f0000 { phy-mode = "rmii"; pinctrl-names = "default";
arch/arm/boot/dts/imx28-cfa10036.dts +4 -4
@@ -21,8 +21,8 @@ reg = <0x40000000 0x08000000>; }; - apb at 80000000 { - apbh at 80000000 { + apb { + apbh { pinctrl at 80018000 { ssd1306_cfa10036: ssd1306-10036 at 0 { reg = <0>;
@@ -78,7 +78,7 @@ }; }; - apbx at 80040000 { + apbx { duart: serial at 80074000 { pinctrl-names = "default"; pinctrl-0 = <&duart_pins_b>;
@@ -112,7 +112,7 @@ }; }; - ahb at 80080000 { + ahb { usb0: usb at 80080000 { pinctrl-names = "default"; pinctrl-0 = <&usb0_otg_cfa10036>;
arch/arm/boot/dts/imx28-cfa10037.dts +4 -4
@@ -19,8 +19,8 @@ model = "Crystalfontz CFA-10037 Board"; compatible = "crystalfontz,cfa10037", "crystalfontz,cfa10036", "fsl,imx28"; - apb at 80000000 { - apbh at 80000000 { + apb { + apbh { pinctrl at 80018000 { usb_pins_cfa10037: usb-10037 at 0 { reg = <0>;
@@ -44,14 +44,14 @@ }; }; - apbx at 80040000 { + apbx { usbphy1: usbphy at 8007e000 { status = "okay"; }; }; }; - ahb at 80080000 { + ahb { usb1: usb at 80090000 { vbus-supply = <®_usb1_vbus>; pinctrl-0 = <&usb1_pins_a>;
arch/arm/boot/dts/imx28-cfa10049.dts +5 -5
@@ -19,8 +19,8 @@ model = "Crystalfontz CFA-10049 Board"; compatible = "crystalfontz,cfa10049", "crystalfontz,cfa10036", "fsl,imx28"; - apb at 80000000 { - apbh at 80000000 { + apb { + apbh { pinctrl at 80018000 { usb_pins_cfa10049: usb-10049 at 0 { reg = <0>;
@@ -206,7 +206,7 @@ }; }; - apbx at 80040000 { + apbx { pwm: pwm at 80064000 { pinctrl-names = "default"; pinctrl-0 = <&pwm3_pins_b>;
@@ -295,7 +295,7 @@ }; }; - ahb at 80080000 { + ahb { usb1: usb at 80090000 { vbus-supply = <®_usb1_vbus>; pinctrl-0 = <&usb1_pins_a>;
@@ -321,7 +321,7 @@ }; }; - ahb at 80080000 { + ahb { mac0: ethernet at 800f0000 { phy-mode = "rmii"; pinctrl-names = "default";
arch/arm/boot/dts/imx28-cfa10055.dts +3 -3
@@ -20,8 +20,8 @@ model = "Crystalfontz CFA-10055 Board"; compatible = "crystalfontz,cfa10055", "crystalfontz,cfa10037", "crystalfontz,cfa10036", "fsl,imx28"; - apb at 80000000 { - apbh at 80000000 { + apb { + apbh { pinctrl at 80018000 { spi2_pins_cfa10055: spi2-cfa10055 at 0 { reg = <0>;
@@ -121,7 +121,7 @@ }; }; - apbx at 80040000 { + apbx { lradc at 80050000 { fsl,lradc-touchscreen-wires = <4>; status = "okay";
arch/arm/boot/dts/imx28-cfa10056.dts +2 -2
@@ -19,8 +19,8 @@ model = "Crystalfontz CFA-10056 Board"; compatible = "crystalfontz,cfa10056", "crystalfontz,cfa10037", "crystalfontz,cfa10036", "fsl,imx28"; - apb at 80000000 { - apbh at 80000000 { + apb { + apbh { pinctrl at 80018000 { spi2_pins_cfa10056: spi2-cfa10056 at 0 { reg = <0>;
arch/arm/boot/dts/imx28-cfa10057.dts +5 -5
@@ -20,8 +20,8 @@ model = "Crystalfontz CFA-10057 Board"; compatible = "crystalfontz,cfa10057", "crystalfontz,cfa10036", "fsl,imx28"; - apb at 80000000 { - apbh at 80000000 { + apb { + apbh { pinctrl at 80018000 { usb_pins_cfa10057: usb-10057 at 0 { reg = <0>;
@@ -107,7 +107,7 @@ }; }; - apbx at 80040000 { + apbx { lradc at 80050000 { fsl,lradc-touchscreen-wires = <4>; status = "okay";
@@ -131,7 +131,7 @@ }; }; - ahb at 80080000 { + ahb { usb1: usb at 80090000 { vbus-supply = <®_usb1_vbus>; pinctrl-0 = <&usb1_pins_a>;
@@ -157,7 +157,7 @@ }; }; - ahb at 80080000 { + ahb { mac0: ethernet at 800f0000 { phy-mode = "rmii"; pinctrl-names = "default";
arch/arm/boot/dts/imx28-cfa10058.dts +5 -5
@@ -20,8 +20,8 @@ model = "Crystalfontz CFA-10058 Board"; compatible = "crystalfontz,cfa10058", "crystalfontz,cfa10036", "fsl,imx28"; - apb at 80000000 { - apbh at 80000000 { + apb { + apbh { pinctrl at 80018000 { usb_pins_cfa10058: usb-10058 at 0 { reg = <0>;
@@ -80,7 +80,7 @@ }; }; - apbx at 80040000 { + apbx { lradc at 80050000 { fsl,lradc-touchscreen-wires = <4>; status = "okay";
@@ -98,7 +98,7 @@ }; }; - ahb at 80080000 { + ahb { usb1: usb at 80090000 { vbus-supply = <®_usb1_vbus>; pinctrl-0 = <&usb1_pins_a>;
@@ -124,7 +124,7 @@ }; }; - ahb at 80080000 { + ahb { mac0: ethernet at 800f0000 { phy-mode = "rmii"; pinctrl-names = "default";
arch/arm/boot/dts/imx28-duckbill.dts +4 -4
@@ -21,8 +21,8 @@ reg = <0x40000000 0x08000000>; }; - apb at 80000000 { - apbh at 80000000 { + apb { + apbh { ssp0: ssp at 80010000 { compatible = "fsl,imx28-mmc"; pinctrl-names = "default";
@@ -60,7 +60,7 @@ }; }; - apbx at 80040000 { + apbx { duart: serial at 80074000 { pinctrl-names = "default"; pinctrl-0 = <&duart_pins_a>;
@@ -73,7 +73,7 @@ }; }; - ahb at 80080000 { + ahb { usb0: usb at 80080000 { status = "okay"; };
arch/arm/boot/dts/imx28-evk.dts +4 -4
@@ -21,8 +21,8 @@ reg = <0x40000000 0x08000000>; }; - apb at 80000000 { - apbh at 80000000 { + apb { + apbh { gpmi-nand at 8000c000 { pinctrl-names = "default"; pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg
@@ -168,7 +168,7 @@ }; }; - apbx at 80040000 { + apbx { saif0: saif@80042000 { pinctrl-names = "default"; pinctrl-0 = <&saif0_pins_a>;
@@ -245,7 +245,7 @@ }; }; - ahb at 80080000 { + ahb { usb0: usb at 80080000 { pinctrl-names = "default"; pinctrl-0 = <&usb0_id_pins_a>;
arch/arm/boot/dts/imx28-m28.dtsi +3 -3
@@ -20,8 +20,8 @@ reg = <0x40000000 0x08000000>; }; - apb at 80000000 { - apbh at 80000000 { + apb { + apbh { gpmi-nand at 8000c000 { #address-cells = <1>; #size-cells = <1>;
@@ -31,7 +31,7 @@ }; }; - apbx at 80040000 { + apbx { i2c0: i2c at 80058000 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins_a>;
arch/arm/boot/dts/imx28-m28cu3.dts +4 -4
@@ -21,8 +21,8 @@ reg = <0x40000000 0x08000000>; }; - apb at 80000000 { - apbh at 80000000 { + apb { + apbh { gpmi-nand at 8000c000 { #address-cells = <1>; #size-cells = <1>;
@@ -145,7 +145,7 @@ }; }; - apbx at 80040000 { + apbx { duart: serial at 80074000 { pinctrl-names = "default"; pinctrl-0 = <&duart_pins_b>;
@@ -176,7 +176,7 @@ }; }; - ahb at 80080000 { + ahb { usb1: usb at 80090000 { vbus-supply = <®_usb1_vbus>; pinctrl-names = "default";
arch/arm/boot/dts/imx28-m28evk.dts +4 -4
@@ -16,8 +16,8 @@ model = "DENX M28EVK"; compatible = "denx,m28evk", "fsl,imx28"; - apb at 80000000 { - apbh at 80000000 { + apb { + apbh { ssp0: ssp at 80010000 { compatible = "fsl,imx28-mmc"; pinctrl-names = "default";
@@ -122,7 +122,7 @@ }; }; - apbx at 80040000 { + apbx { saif0: saif at 80042000 { pinctrl-names = "default"; pinctrl-0 = <&saif0_pins_a>;
@@ -197,7 +197,7 @@ }; }; - ahb at 80080000 { + ahb { usb0: usb at 80080000 { vbus-supply = <®_usb0_vbus>; pinctrl-names = "default";
arch/arm/boot/dts/imx28-sps1.dts +4 -4
@@ -21,8 +21,8 @@ reg = <0x40000000 0x08000000>; }; - apb at 80000000 { - apbh at 80000000 { + apb { + apbh { pinctrl at 80018000 { pinctrl-names = "default"; pinctrl-0 = <&hog_pins_a>;
@@ -67,7 +67,7 @@ }; }; - apbx at 80040000 { + apbx { i2c0: i2c at 80058000 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins_a>;
@@ -103,7 +103,7 @@ }; }; - ahb at 80080000 { + ahb { usb0: usb at 80080000 { vbus-supply = <®_usb0_vbus>; pinctrl-names = "default";
arch/arm/boot/dts/imx28.dtsi +4 -8
@@ -49,18 +49,16 @@ }; }; - apb at 80000000 { + apb { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - reg = <0x80000000 0x80000>; ranges; - apbh at 80000000 { + apbh { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - reg = <0x80000000 0x3c900>; ranges; icoll: interrupt-controller at 80000000 {
@@ -1056,11 +1054,10 @@ }; }; - apbx at 80040000 { + apbx { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - reg = <0x80040000 0x40000>; ranges; clks: clkctrl at 80040000 {
@@ -1234,11 +1231,10 @@ }; }; - ahb at 80080000 { + ahb { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - reg = <0x80080000 0x80000>; ranges; usb0: usb at 80080000 {
Signature · 1 line
1.7.9.5
PATCH 3/4 ARM: dts: imx23: add On-Chip RAM
In reply to Stefan WahrenThis patch adds the node for the 32 KB On-Chip RAM of the i.MX23.
--- arch/arm/boot/dts/imx23.dtsi | 5 +++++ 1 file changed, 5 insertions(+)
arch/arm/boot/dts/imx23.dtsi +5 -0
@@ -607,6 +607,11 @@ #size-cells = <1>; ranges; + ocram: sram at 00000000 { + compatible = "mmio-sram"; + reg = <0x00000000 0x8000>; + }; + usb0: usb at 80080000 { compatible = "fsl,imx23-usb", "fsl,imx27-usb"; reg = <0x80080000 0x40000>;
Signature · 1 line
1.7.9.5
PATCH 4/4 ARM: dts: imx28: add On-Chip RAM
In reply to Stefan WahrenThis patch adds the node for the 128 KB On-Chip RAM of the i.MX28.
--- arch/arm/boot/dts/imx28.dtsi | 5 +++++ 1 file changed, 5 insertions(+)
arch/arm/boot/dts/imx28.dtsi +5 -0
@@ -1237,6 +1237,11 @@ #size-cells = <1>; ranges; + ocram: sram at 00000000 { + compatible = "mmio-sram"; + reg = <0x00000000 0x20000>; + }; + usb0: usb at 80080000 { compatible = "fsl,imx28-usb", "fsl,imx27-usb"; reg = <0x80080000 0x10000>;
Signature · 1 line
1.7.9.5
cover ARM: boot: mxs: Add On-Chip RAM
In reply to Stefan WahrenAm 13.09.2016 um 19:51 schrieb Stefan Wahren:
Quoted 32 lines
The i.MX23 / i.MX28 have a small amount of On-Chip RAM which is also necessary for suspend to RAM and standby mode. But before we need to remove the fake reg properties of all internal bus nodes as discussed in this thread [1].
This patch series requires Fabio Estevam's recent series "ARM: dts: imx23:
Removeskeleton.dtsiinclusion" [2].[1] - https://marc.info/?l=devicetree&m=146139948426520&w=2
[2] - http://www.spinics.net/lists/arm-kernel/msg528974.htmlStefan Wahren (4):
ARM: dts: imx23: Remove fake "reg" properties from bus nodes
ARM: dts: imx28: Remove fake "reg" properties from bus nodes
ARM: dts: imx23: add On-Chip RAM
ARM: dts: imx28: add On-Chip RAMarch/arm/boot/dts/imx23-evk.dts | 8 ++++---- arch/arm/boot/dts/imx23-olinuxino.dts | 8 ++++---- arch/arm/boot/dts/imx23-sansa.dts | 8 ++++---- arch/arm/boot/dts/imx23-stmp378x_devb.dts | 6 +++--- arch/arm/boot/dts/imx23-xfi3.dts | 8 ++++---- arch/arm/boot/dts/imx23.dtsi | 15 +++++++++------ arch/arm/boot/dts/imx28-apf28.dts | 8 ++++---- arch/arm/boot/dts/imx28-apf28dev.dts | 8 ++++---- arch/arm/boot/dts/imx28-apx4devkit.dts | 8 ++++---- arch/arm/boot/dts/imx28-cfa10036.dts | 8 ++++---- arch/arm/boot/dts/imx28-cfa10037.dts | 8 ++++---- arch/arm/boot/dts/imx28-cfa10049.dts | 10 +++++----- arch/arm/boot/dts/imx28-cfa10055.dts | 6 +++--- arch/arm/boot/dts/imx28-cfa10056.dts | 4 ++-- arch/arm/boot/dts/imx28-cfa10057.dts | 10 +++++----- arch/arm/boot/dts/imx28-cfa10058.dts | 10 +++++-----
Quoted 9 lines
arch/arm/boot/dts/imx28-duckbill.dts | 8 ++++---- arch/arm/boot/dts/imx28-evk.dts | 8 ++++---- arch/arm/boot/dts/imx28-m28.dtsi | 6 +++--- arch/arm/boot/dts/imx28-m28cu3.dts | 8 ++++---- arch/arm/boot/dts/imx28-m28evk.dts | 8 ++++---- arch/arm/boot/dts/imx28-sps1.dts | 8 ++++---- arch/arm/boot/dts/imx28.dtsi | 17 +++++++++-------- 23 files changed, 100 insertions(+), 96 deletions(-)
Any comments about this series or should i resend it without Fabio's patch series applied?
cover ARM: boot: mxs: Add On-Chip RAM
In reply to Stefan WahrenQuoted 8 lines · Stefan Wahren
The i.MX23 / i.MX28 have a small amount of On-Chip RAM which is also necessary for suspend to RAM and standby mode. But before we need to remove the fake reg properties of all internal bus nodes as discussed in this thread [1].
This patch series requires Fabio Estevam's recent series "ARM: dts: imx23:
Removeskeleton.dtsiinclusion" [2].
The page cannot be reached. I would like to understand the background for this change.
Shawn
Quoted 41 lines
[2] - http://www.spinics.net/lists/arm-kernel/msg528974.html
Stefan Wahren (4):
ARM: dts: imx23: Remove fake "reg" properties from bus nodes
ARM: dts: imx28: Remove fake "reg" properties from bus nodes
ARM: dts: imx23: add On-Chip RAM
ARM: dts: imx28: add On-Chip RAMarch/arm/boot/dts/imx23-evk.dts | 8 ++++---- arch/arm/boot/dts/imx23-olinuxino.dts | 8 ++++---- arch/arm/boot/dts/imx23-sansa.dts | 8 ++++---- arch/arm/boot/dts/imx23-stmp378x_devb.dts | 6 +++--- arch/arm/boot/dts/imx23-xfi3.dts | 8 ++++---- arch/arm/boot/dts/imx23.dtsi | 15 +++++++++------ arch/arm/boot/dts/imx28-apf28.dts | 8 ++++---- arch/arm/boot/dts/imx28-apf28dev.dts | 8 ++++---- arch/arm/boot/dts/imx28-apx4devkit.dts | 8 ++++---- arch/arm/boot/dts/imx28-cfa10036.dts | 8 ++++---- arch/arm/boot/dts/imx28-cfa10037.dts | 8 ++++---- arch/arm/boot/dts/imx28-cfa10049.dts | 10 +++++----- arch/arm/boot/dts/imx28-cfa10055.dts | 6 +++--- arch/arm/boot/dts/imx28-cfa10056.dts | 4 ++-- arch/arm/boot/dts/imx28-cfa10057.dts | 10 +++++----- arch/arm/boot/dts/imx28-cfa10058.dts | 10 +++++----- arch/arm/boot/dts/imx28-duckbill.dts | 8 ++++---- arch/arm/boot/dts/imx28-evk.dts | 8 ++++---- arch/arm/boot/dts/imx28-m28.dtsi | 6 +++--- arch/arm/boot/dts/imx28-m28cu3.dts | 8 ++++---- arch/arm/boot/dts/imx28-m28evk.dts | 8 ++++---- arch/arm/boot/dts/imx28-sps1.dts | 8 ++++---- arch/arm/boot/dts/imx28.dtsi | 17 +++++++++-------- 23 files changed, 100 insertions(+), 96 deletions(-)Signature · 7 lines
1.7.9.5 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel at lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
cover ARM: boot: mxs: Add On-Chip RAM
Am 21.10.2016 um 15:53 schrieb Shawn Guo:
Quoted 11 lines · Stefan Wahren
Quoted 8 lines
The i.MX23 / i.MX28 have a small amount of On-Chip RAM which is also necessary for suspend to RAM and standby mode. But before we need to remove the fake reg properties of all internal bus nodes as discussed in this thread [1].
This patch series requires Fabio Estevam's recent series "ARM: dts: imx23:
Removeskeleton.dtsiinclusion" [2].The page cannot be reached. I would like to understand the background for this change.
Strange, because i don't have any problems while clicking on the URL.
It's an older discussion on the devicetree / kernel newbie mailing list with subject "strange dtc errors after adding sram node". Arnd suggested in the discussion to remove the reg property from the ahb node.
Please try this one: http://www.spinics.net/lists/newbies/msg57652.html
Stefan
cover ARM: boot: mxs: Add On-Chip RAM
Quoted 13 lines · Stefan Wahren
Am 21.10.2016 um 15:53 schrieb Shawn Guo:
Quoted 11 lines · Stefan Wahren
Quoted 8 lines
The i.MX23 / i.MX28 have a small amount of On-Chip RAM which is also necessary for suspend to RAM and standby mode. But before we need to remove the fake reg properties of all internal bus nodes as discussed in this thread [1].
This patch series requires Fabio Estevam's recent series "ARM: dts: imx23:
Removeskeleton.dtsiinclusion" [2].The page cannot be reached. I would like to understand the background for this change.
Quoted 7 lines
Strange, because i don't have any problems while clicking on the URL.
It's an older discussion on the devicetree / kernel newbie mailing list with subject "strange dtc errors after adding sram node". Arnd suggested in the discussion to remove the reg property from the ahb node.
Please try this one: http://www.spinics.net/lists/newbies/msg57652.html
If you go through 'Table 4-1. Address Map for i.MX28' of MCIMX28RM, you should be able to find there are 3 AHB buses: ahb at 0, ahb at 80080000 and ahb at c0000000. The ocram goes to ahb at 0. The following change should be the right one for ocram addition.
arch/arm/boot/dts/imx28.dtsi +13 -0
@@ -47,6 +47,19 @@ }; }; + ahb at 0 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x0 0x80000000>; + ranges; + + ocram: sram at 0 { + compatible = "mmio-sram"; + reg = <0x0 0x20000>; + }; + }; + apb at 80000000 { compatible = "simple-bus"; #address-cells = <1>;
cover ARM: boot: mxs: Add On-Chip RAM
Am 21.10.2016 um 17:03 schrieb Shawn Guo:
Quoted 19 lines · Stefan Wahren
Quoted 18 lines
Am 21.10.2016 um 15:53 schrieb Shawn Guo:
Quoted 11 lines · Stefan Wahren
Quoted 8 lines
The i.MX23 / i.MX28 have a small amount of On-Chip RAM which is also necessary for suspend to RAM and standby mode. But before we need to remove the fake reg properties of all internal bus nodes as discussed in this thread [1].
This patch series requires Fabio Estevam's recent series "ARM: dts: imx23:
Removeskeleton.dtsiinclusion" [2].The page cannot be reached. I would like to understand the background for this change.
Strange, because i don't have any problems while clicking on the URL.
It's an older discussion on the devicetree / kernel newbie mailing list with subject "strange dtc errors after adding sram node". Arnd suggested in the discussion to remove the reg property from the ahb node.
Quoted 5 lines
Quoted 1 line
Please try this one: http://www.spinics.net/lists/newbies/msg57652.html
If you go through 'Table 4-1. Address Map for i.MX28' of MCIMX28RM, you should be able to find there are 3 AHB buses: ahb at 0, ahb at 80080000 and ahb at
c0000000. The ocram goes to ahb at 0. The following change should be the right one for ocram addition.
Correct me if i'm wrong, but there is only one AHB bus and only the connected peripheral devices like ocram or USB controller have a memory mapped start address not the bus itself.
Quoted 26 lines
arch/arm/boot/dts/imx28.dtsi +13
-0@@ -47,6 +47,19 @@ }; }; + ahb at 0 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x0 0x80000000>; + ranges; + + ocram: sram at 0 { + compatible = "mmio-sram"; + reg = <0x0 0x20000>; + }; + }; + apb at 80000000 { compatible = "simple-bus"; #address-cells = <1>;
cover ARM: boot: mxs: Add On-Chip RAM
Am 21.10.2016 um 17:24 schrieb Stefan Wahren:
Quoted 20 lines
Am 21.10.2016 um 17:03 schrieb Shawn Guo:
Quoted 19 lines · Stefan Wahren
Quoted 18 lines
Am 21.10.2016 um 15:53 schrieb Shawn Guo:
Quoted 11 lines · Stefan Wahren
Quoted 8 lines
The i.MX23 / i.MX28 have a small amount of On-Chip RAM which is also necessary for suspend to RAM and standby mode. But before we need to remove the fake reg properties of all internal bus nodes as discussed in this thread [1].
This patch series requires Fabio Estevam's recent series "ARM: dts: imx23:
Removeskeleton.dtsiinclusion" [2].The page cannot be reached. I would like to understand the background for this change.
Strange, because i don't have any problems while clicking on the URL.
It's an older discussion on the devicetree / kernel newbie mailing list with subject "strange dtc errors after adding sram node". Arnd suggested in the discussion to remove the reg property from the ahb node.
Quoted 8 lines
Quoted 5 lines
Quoted 1 line
Please try this one: http://www.spinics.net/lists/newbies/msg57652.html
If you go through 'Table 4-1. Address Map for i.MX28' of MCIMX28RM, you should be able to find there are 3 AHB buses: ahb at 0, ahb at 80080000 and ahb at
c0000000. The ocram goes to ahb at 0. The following change should be the right one for ocram addition.Correct me if i'm wrong, but there is only one AHB bus and only the connected peripheral devices like ocram or USB controller have a memory mapped start address not the bus itself.
Please forget about that. According to the reference manual there are 3 AHB bus layers.
Quoted 27 lines
Quoted 26 lines
arch/arm/boot/dts/imx28.dtsi +13
-0@@ -47,6 +47,19 @@ }; }; + ahb at 0 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x0 0x80000000>; + ranges; + + ocram: sram at 0 { + compatible = "mmio-sram"; + reg = <0x0 0x20000>; + }; + }; + apb at 80000000 { compatible = "simple-bus"; #address-cells = <1>;
Signature · 16 lines
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