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ARM: avoid cache flushing in flush_dcache_page()

PATCH New Rabin Vincent 3 participants 4 messages Nov 7, 2016 Arm (32-bit)

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#0 lore raw

PATCH 1/1 ARM: avoid cache flushing in flush_dcache_page()

From: Rabin Vincent <[email protected]>

When the data cache is PIPT or VIPT non-aliasing, and cache operations are broadcast by the hardware, we can always postpone the flush in flush_dcache_page(). A similar change was done for ARM64 in commit b5b6c9e9149d ("arm64: Avoid cache flushing in flush_dcache_page()").

---
 arch/arm/mm/flush.c | 6 ++++++
 1 file changed, 6 insertions(+)
arch/arm/mm/flush.c +6 -0
index 3cced84..f1e6190 100644
@@ -327,6 +327,12 @@ void flush_dcache_page(struct page *page)
 	if (page == ZERO_PAGE(0))
 		return;
 
+	if (!cache_ops_need_broadcast() && cache_is_vipt_nonaliasing()) {
+		if (test_bit(PG_dcache_clean, &page->flags))
+			clear_bit(PG_dcache_clean, &page->flags);
+		return;
+	}
+
 	mapping = page_mapping(page);
 
 	if (!cache_ops_need_broadcast() &&
Signature · 1 line
2.1.4
#1 lore raw

PATCH 1/1 ARM: avoid cache flushing in flush_dcache_page()

Quoted 7 lines · Rabin Vincent
arch/arm/mm/flush.c +0 -0
index 3cced84..f1e6190 100644
@@ -327,6 +327,12 @@ void flush_dcache_page(struct page *page)
 	if (page == ZERO_PAGE(0))
 		return;

arch/arm/mm/flush.c void flush_dcache_page(struct page *page) · line 338

Quoted 10 lines
arch/arm/mm/flush.c +6 -0
 
+	if (!cache_ops_need_broadcast() && cache_is_vipt_nonaliasing()) {
+		if (test_bit(PG_dcache_clean, &page->flags))
+			clear_bit(PG_dcache_clean, &page->flags);
+		return;
+	}
+
 	mapping = page_mapping(page);
 
 	if (!cache_ops_need_broadcast() &&

I'm ok with the logic in this patch but is there a way to combine the two 'if' blocks together, just to keep the function shorter?

Signature · 1 line
Catalin
#2 lore raw

PATCH 1/1 ARM: avoid cache flushing in flush_dcache_page()

Quoted 17 lines · Catalin Marinas
Quoted 16 lines · Rabin Vincent
arch/arm/mm/flush.c +6 -0
index 3cced84..f1e6190 100644
@@ -327,6 +327,12 @@ void flush_dcache_page(struct page *page)
 	if (page == ZERO_PAGE(0))
 		return;
 
+	if (!cache_ops_need_broadcast() && cache_is_vipt_nonaliasing()) {
+		if (test_bit(PG_dcache_clean, &page->flags))
+			clear_bit(PG_dcache_clean, &page->flags);
+		return;
+	}
+
 	mapping = page_mapping(page);
 
Quoted 4 lines

arch/arm/mm/flush.c void flush_dcache_page(struct page *page) · line 338

Quoted 1 line
arch/arm/mm/flush.c +0 -0
 	if (!cache_ops_need_broadcast() &&

I'm ok with the logic in this patch but is there a way to combine the two 'if' blocks together, just to keep the function shorter?

Probably not without reducing code readability, or moving page_mapping() before this new if() block (which may introduce extra code into the path.)

As this path gets used for filesystem read/write, it would be a good idea to keep it as efficient as possible.

Signature · 3 lines
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
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#3 lore raw

PATCH 1/1 ARM: avoid cache flushing in flush_dcache_page()

Quoted 18 lines · Russell King - ARM Linux
Quoted 17 lines · Catalin Marinas
Quoted 16 lines · Rabin Vincent
arch/arm/mm/flush.c +6 -0
index 3cced84..f1e6190 100644
@@ -327,6 +327,12 @@ void flush_dcache_page(struct page *page)
 	if (page == ZERO_PAGE(0))
 		return;
 
+	if (!cache_ops_need_broadcast() && cache_is_vipt_nonaliasing()) {
+		if (test_bit(PG_dcache_clean, &page->flags))
+			clear_bit(PG_dcache_clean, &page->flags);
+		return;
+	}
+
 	mapping = page_mapping(page);
 
Quoted 8 lines
Quoted 4 lines

arch/arm/mm/flush.c void flush_dcache_page(struct page *page) · line 338

Quoted 1 line
arch/arm/mm/flush.c +0 -0
 	if (!cache_ops_need_broadcast() &&

I'm ok with the logic in this patch but is there a way to combine the two 'if' blocks together, just to keep the function shorter?

Probably not without reducing code readability, or moving page_mapping() before this new if() block (which may introduce extra code into the path.)

You are right, we would need 'mapping' in the subsequent checks, so I don't think the code would be more readable if we are to keep it efficient. In this case: