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ARM: dts: socfpga: Enable QSPI on the Cyclone5 sockit

PATCH New Dinh Nguyen 2 participants 2 messages Nov 8, 2016 – Nov 9, 2016 Device tree bindings

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Dinh Nguyen

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#0 lore raw

PATCH v3 1/1 ARM: dts: socfpga: Enable QSPI on the Cyclone5 sockit

From: Dinh Nguyen <[email protected]>

Enable the QSPI node and add the flash chip.

Signed-off-by Dinh Nguyen <[email protected]>

---
v3: Use n25q00 for the compatible entry for the flash part and
tested on SoCKit
v2: Remove partition entries for the SoCKIT

---
 arch/arm/boot/dts/socfpga_cyclone5_sockit.dts | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)
arch/arm/boot/dts/socfpga_cyclone5_sockit.dts +21 -0
index 02e22f5..d59f6f2 100644
@@ -175,6 +175,27 @@
 	status = "okay";
 };
 
+&qspi {
+	status = "okay";
+
+	flash: flash at 0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "n25q00";
+		reg = <0>;
+		spi-max-frequency = <100000000>;
+
+		m25p,fast-read;
+		cdns,page-size = <256>;
+		cdns,block-size = <16>;
+		cdns,read-delay = <4>;
+		cdns,tshsl-ns = <50>;
+		cdns,tsd2d-ns = <50>;
+		cdns,tchsh-ns = <4>;
+		cdns,tslch-ns = <4>;
+	};
+};
+
 &usb1 {
 	status = "okay";
 };
Signature · 1 line
2.8.3
#1 lore raw

PATCH v3 1/1 ARM: dts: socfpga: Enable QSPI on the Cyclone5 sockit

Quoted 35 lines · Dinh Nguyen

From: Dinh Nguyen <[email protected]>

Enable the QSPI node and add the flash chip.

Signed-off-by Dinh Nguyen <[email protected]>

---
v3: Use n25q00 for the compatible entry for the flash part and
tested on SoCKit
v2: Remove partition entries for the SoCKIT

---
 arch/arm/boot/dts/socfpga_cyclone5_sockit.dts | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)
arch/arm/boot/dts/socfpga_cyclone5_sockit.dts +14 -0
index 02e22f5..d59f6f2 100644
@@ -175,6 +175,27 @@
 	status = "okay";
 };
 
+&qspi {
+	status = "okay";
+
+	flash: flash at 0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "n25q00";
+		reg = <0>;
+		spi-max-frequency = <100000000>;
+
+		m25p,fast-read;
+		cdns,page-size = <256>;
+		cdns,block-size = <16>;
+		cdns,read-delay = <4>;

arch/arm/boot/dts/socfpga_cyclone5_sockit.dts line 201

Quoted 10 lines
arch/arm/boot/dts/socfpga_cyclone5_sockit.dts +7 -0
+		cdns,tshsl-ns = <50>;
+		cdns,tsd2d-ns = <50>;
+		cdns,tchsh-ns = <4>;
+		cdns,tslch-ns = <4>;
+	};
+};
+
 &usb1 {
 	status = "okay";
 };

Looks good to me.

Thanks,
Steffen

Signature · 4 lines
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