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MIPS: remove M5100 core

PATCH New Vicente Olivert Riera 4 participants 9 messages Nov 8, 2016 – Nov 13, 2016

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Vicente Olivert Riera

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#0 lore raw

PATCH 1/3 MIPS: remove M5100 core

This is a microcontroller class (MCU) core which is not suitable for running Linux.

Signed-off-by Vicente Olivert Riera <[email protected]>
---
 arch/Config.in.mips                    | 5 -----
 package/gcc/Config.in.host             | 5 ++---
 toolchain/toolchain-external/Config.in | 2 +-
 3 files changed, 3 insertions(+), 9 deletions(-)
arch/Config.in.mips +0 -5
index 3662fed..289e35d 100644
@@ -47,10 +47,6 @@ config BR2_mips_interaptiv
 	bool "interAptiv"
 	depends on !BR2_ARCH_IS_64
 	select BR2_MIPS_CPU_MIPS32R2
-config BR2_mips_m5100
-	bool "M5100"
-	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R5
 config BR2_mips_m5101
 	bool "M5101"
 	depends on !BR2_ARCH_IS_64

@@ -133,7 +129,6 @@ config BR2_GCC_TARGET_ARCH
 	default "mips32r5"	if BR2_mips_32r5
 	default "mips32r6"	if BR2_mips_32r6
 	default "interaptiv"	if BR2_mips_interaptiv
-	default "m5100"		if BR2_mips_m5100
 	default "m5101"		if BR2_mips_m5101
 	default "m6201"		if BR2_mips_m6201
 	default "p5600"		if BR2_mips_p5600
package/gcc/Config.in.host +2 -3
index 446df4d..f46656c 100644
@@ -64,9 +64,8 @@ choice
 		# musl ppc64 unsupported
 		depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_powerpc64 || BR2_powerpc64el))
 		# Unsupported MIPS cores
-		depends on !BR2_mips_interaptiv && !BR2_mips_m5100 && \
-			!BR2_mips_m5101 && !BR2_mips_m6201 && !BR2_mips_i6400 && \
-			!BR2_mips_p6600
+		depends on !BR2_mips_interaptiv && !BR2_mips_m5101 && \
+			!BR2_mips_m6201 && !BR2_mips_i6400 && !BR2_mips_p6600
 		# musl mips64 unsupported
 		depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_mips64 || BR2_mips64el))
 		select BR2_TOOLCHAIN_GCC_AT_LEAST_5
toolchain/toolchain-external/Config.in +1 -1
index 5324599..22f760b 100644
@@ -530,7 +530,7 @@ config BR2_TOOLCHAIN_EXTERNAL_MUSL_CROSS
 		BR2_x86_64
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	# Unsupported MIPS cores
-	depends on !BR2_mips_interaptiv && !BR2_mips_m5100 && !BR2_mips_m5101
+	depends on !BR2_mips_interaptiv && !BR2_mips_m5101
 	# Unsupported for MIPS R6
 	depends on !BR2_MIPS_CPU_MIPS32R6 && !BR2_MIPS_CPU_MIPS64R6
 	select BR2_TOOLCHAIN_EXTERNAL_MUSL
Signature · 1 line
2.10.1
author
#1 lore raw

PATCH 2/3 MIPS: rename M5101 core to M5150

m5101 is the -march option for GCC, but the real core name is M5150.

Signed-off-by Vicente Olivert Riera <[email protected]>
---
 arch/Config.in.mips                    | 6 +++---
 package/gcc/Config.in.host             | 2 +-
 toolchain/toolchain-external/Config.in | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)
arch/Config.in.mips +3 -3
index 289e35d..f407d9a 100644
@@ -47,8 +47,8 @@ config BR2_mips_interaptiv
 	bool "interAptiv"
 	depends on !BR2_ARCH_IS_64
 	select BR2_MIPS_CPU_MIPS32R2
-config BR2_mips_m5101
-	bool "M5101"
+config BR2_mips_m5150
+	bool "M5150"
 	depends on !BR2_ARCH_IS_64
 	select BR2_MIPS_CPU_MIPS32R5
 config BR2_mips_m6201

@@ -129,7 +129,7 @@ config BR2_GCC_TARGET_ARCH
 	default "mips32r5"	if BR2_mips_32r5
 	default "mips32r6"	if BR2_mips_32r6
 	default "interaptiv"	if BR2_mips_interaptiv
-	default "m5101"		if BR2_mips_m5101
+	default "m5101"		if BR2_mips_m5150
 	default "m6201"		if BR2_mips_m6201
 	default "p5600"		if BR2_mips_p5600
 	default "mips64"	if BR2_mips_64
package/gcc/Config.in.host +1 -1
index f46656c..eb1479a 100644
@@ -64,7 +64,7 @@ choice
 		# musl ppc64 unsupported
 		depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_powerpc64 || BR2_powerpc64el))
 		# Unsupported MIPS cores
-		depends on !BR2_mips_interaptiv && !BR2_mips_m5101 && \
+		depends on !BR2_mips_interaptiv && !BR2_mips_m5150 && \
 			!BR2_mips_m6201 && !BR2_mips_i6400 && !BR2_mips_p6600
 		# musl mips64 unsupported
 		depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_mips64 || BR2_mips64el))
toolchain/toolchain-external/Config.in +1 -1
index 22f760b..476b37b 100644
@@ -530,7 +530,7 @@ config BR2_TOOLCHAIN_EXTERNAL_MUSL_CROSS
 		BR2_x86_64
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	# Unsupported MIPS cores
-	depends on !BR2_mips_interaptiv && !BR2_mips_m5101
+	depends on !BR2_mips_interaptiv && !BR2_mips_m5150
 	# Unsupported for MIPS R6
 	depends on !BR2_MIPS_CPU_MIPS32R6 && !BR2_MIPS_CPU_MIPS64R6
 	select BR2_TOOLCHAIN_EXTERNAL_MUSL
Signature · 1 line
2.10.1
#2 lore raw

PATCH 2/3 MIPS: rename M5101 core to M5150

Quoted 3 lines · Vicente Olivert Riera

m5101 is the -march option for GCC, but the real core name is M5150.

Signed-off-by Vicente Olivert Riera <[email protected]>
Reviewed-by Arnout Vandecappelle (Essensium/Mind) <[email protected]>

Regards,
Arnout

Quoted 57 lines
---
 arch/Config.in.mips                    | 6 +++---
 package/gcc/Config.in.host             | 2 +-
 toolchain/toolchain-external/Config.in | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)
arch/Config.in.mips +3 -3
index 289e35d..f407d9a 100644
@@ -47,8 +47,8 @@ config BR2_mips_interaptiv
 	bool "interAptiv"
 	depends on !BR2_ARCH_IS_64
 	select BR2_MIPS_CPU_MIPS32R2
-config BR2_mips_m5101
-	bool "M5101"
+config BR2_mips_m5150
+	bool "M5150"
 	depends on !BR2_ARCH_IS_64
 	select BR2_MIPS_CPU_MIPS32R5
 config BR2_mips_m6201

@@ -129,7 +129,7 @@ config BR2_GCC_TARGET_ARCH
 	default "mips32r5"	if BR2_mips_32r5
 	default "mips32r6"	if BR2_mips_32r6
 	default "interaptiv"	if BR2_mips_interaptiv
-	default "m5101"		if BR2_mips_m5101
+	default "m5101"		if BR2_mips_m5150
 	default "m6201"		if BR2_mips_m6201
 	default "p5600"		if BR2_mips_p5600
 	default "mips64"	if BR2_mips_64
package/gcc/Config.in.host +1 -1
index f46656c..eb1479a 100644
@@ -64,7 +64,7 @@ choice
 		# musl ppc64 unsupported
 		depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_powerpc64 || BR2_powerpc64el))
 		# Unsupported MIPS cores
-		depends on !BR2_mips_interaptiv && !BR2_mips_m5101 && \
+		depends on !BR2_mips_interaptiv && !BR2_mips_m5150 && \
 			!BR2_mips_m6201 && !BR2_mips_i6400 && !BR2_mips_p6600
 		# musl mips64 unsupported
 		depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_mips64 || BR2_mips64el))
toolchain/toolchain-external/Config.in +1 -1
index 22f760b..476b37b 100644
@@ -530,7 +530,7 @@ config BR2_TOOLCHAIN_EXTERNAL_MUSL_CROSS
 		BR2_x86_64
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	# Unsupported MIPS cores
-	depends on !BR2_mips_interaptiv && !BR2_mips_m5101
+	depends on !BR2_mips_interaptiv && !BR2_mips_m5150
 	# Unsupported for MIPS R6
 	depends on !BR2_MIPS_CPU_MIPS32R6 && !BR2_MIPS_CPU_MIPS64R6
 	select BR2_TOOLCHAIN_EXTERNAL_MUSL
Signature · 6 lines
Arnout Vandecappelle                          arnout at mind be
Senior Embedded Software Architect            +32-16-286500
Essensium/Mind                                http://www.mind.be
G.Geenslaan 9, 3001 Leuven, Belgium           BE 872 984 063 RPR Leuven
LinkedIn profile: http://www.linkedin.com/in/arnoutvandecappelle
GPG fingerprint:  7493 020B C7E3 8618 8DEC 222C 82EB F404 F9AC 0DDF
#3 lore raw

PATCH 2/3 MIPS: rename M5101 core to M5150

In reply to Vicente Olivert Riera

Vicente, All,

On 2016-11-08 10:32 +0000, Vicente Olivert Riera spake thusly:

Quoted 1 line

m5101 is the -march option for GCC, but the real core name is M5150.

There should have been a legacy entry for this renamed option. ditto the 6201, in next patch.

I'll send a patch for that in a m moment.

Regards,
Yann E. MORIN.

Quoted 64 lines
Signed-off-by Vicente Olivert Riera <[email protected]>
---
 arch/Config.in.mips                    | 6 +++---
 package/gcc/Config.in.host             | 2 +-
 toolchain/toolchain-external/Config.in | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)
arch/Config.in.mips +3 -3
index 289e35d..f407d9a 100644
@@ -47,8 +47,8 @@ config BR2_mips_interaptiv
 	bool "interAptiv"
 	depends on !BR2_ARCH_IS_64
 	select BR2_MIPS_CPU_MIPS32R2
-config BR2_mips_m5101
-	bool "M5101"
+config BR2_mips_m5150
+	bool "M5150"
 	depends on !BR2_ARCH_IS_64
 	select BR2_MIPS_CPU_MIPS32R5
 config BR2_mips_m6201

@@ -129,7 +129,7 @@ config BR2_GCC_TARGET_ARCH
 	default "mips32r5"	if BR2_mips_32r5
 	default "mips32r6"	if BR2_mips_32r6
 	default "interaptiv"	if BR2_mips_interaptiv
-	default "m5101"		if BR2_mips_m5101
+	default "m5101"		if BR2_mips_m5150
 	default "m6201"		if BR2_mips_m6201
 	default "p5600"		if BR2_mips_p5600
 	default "mips64"	if BR2_mips_64
package/gcc/Config.in.host +1 -1
index f46656c..eb1479a 100644
@@ -64,7 +64,7 @@ choice
 		# musl ppc64 unsupported
 		depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_powerpc64 || BR2_powerpc64el))
 		# Unsupported MIPS cores
-		depends on !BR2_mips_interaptiv && !BR2_mips_m5101 && \
+		depends on !BR2_mips_interaptiv && !BR2_mips_m5150 && \
 			!BR2_mips_m6201 && !BR2_mips_i6400 && !BR2_mips_p6600
 		# musl mips64 unsupported
 		depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_mips64 || BR2_mips64el))
toolchain/toolchain-external/Config.in +1 -1
index 22f760b..476b37b 100644
@@ -530,7 +530,7 @@ config BR2_TOOLCHAIN_EXTERNAL_MUSL_CROSS
 		BR2_x86_64
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	# Unsupported MIPS cores
-	depends on !BR2_mips_interaptiv && !BR2_mips_m5101
+	depends on !BR2_mips_interaptiv && !BR2_mips_m5150
 	# Unsupported for MIPS R6
 	depends on !BR2_MIPS_CPU_MIPS32R6 && !BR2_MIPS_CPU_MIPS64R6
 	select BR2_TOOLCHAIN_EXTERNAL_MUSL
Signature · 6 lines
2.10.1

_______________________________________________
buildroot mailing list
buildroot at busybox.net
http://lists.busybox.net/mailman/listinfo/buildroot
Signature · 6 lines
.-----------------.--------------------.------------------.--------------------.
|  Yann E. MORIN  | Real-Time Embedded | /"\ ASCII RIBBON | Erics' conspiracy: |
| +33 662 376 056 | Software  Designer | \ / CAMPAIGN     |  ___               |
| +33 223 225 172 `------------.-------:  X  AGAINST      |  \e/  There is no  |
| http://ymorin.is-a-geek.org/ | _/*\_ | / \ HTML MAIL    |   v   conspiracy.  |
'------------------------------^-------^------------------^--------------------'
author
#4 lore raw

PATCH 3/3 MIPS: rename M6201 core to M6250

In reply to Vicente Olivert Riera

m6201 is the -march option for GCC, but the real core name is M6250.

Signed-off-by Vicente Olivert Riera <[email protected]>
---
 arch/Config.in.mips        | 6 +++---
 package/gcc/Config.in.host | 4 ++--
 2 files changed, 5 insertions(+), 5 deletions(-)
arch/Config.in.mips +3 -3
index f407d9a..c14a133 100644
@@ -51,8 +51,8 @@ config BR2_mips_m5150
 	bool "M5150"
 	depends on !BR2_ARCH_IS_64
 	select BR2_MIPS_CPU_MIPS32R5
-config BR2_mips_m6201
-	bool "M6201"
+config BR2_mips_m6250
+	bool "M6250"
 	depends on !BR2_ARCH_IS_64
 	select BR2_MIPS_CPU_MIPS32R6
 config BR2_mips_p5600

@@ -130,7 +130,7 @@ config BR2_GCC_TARGET_ARCH
 	default "mips32r6"	if BR2_mips_32r6
 	default "interaptiv"	if BR2_mips_interaptiv
 	default "m5101"		if BR2_mips_m5150
-	default "m6201"		if BR2_mips_m6201
+	default "m6201"		if BR2_mips_m6250
 	default "p5600"		if BR2_mips_p5600
 	default "mips64"	if BR2_mips_64
 	default "mips64r2"	if BR2_mips_64r2
package/gcc/Config.in.host +2 -2
index eb1479a..0a63e6a 100644
@@ -65,7 +65,7 @@ choice
 		depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_powerpc64 || BR2_powerpc64el))
 		# Unsupported MIPS cores
 		depends on !BR2_mips_interaptiv && !BR2_mips_m5150 && \
-			!BR2_mips_m6201 && !BR2_mips_i6400 && !BR2_mips_p6600
+			!BR2_mips_m6250 && !BR2_mips_i6400 && !BR2_mips_p6600
 		# musl mips64 unsupported
 		depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_mips64 || BR2_mips64el))
 		select BR2_TOOLCHAIN_GCC_AT_LEAST_5

@@ -76,7 +76,7 @@ choice
 		depends on !BR2_arc
 		depends on !BR2_microblaze
 		# Unsupported MIPS cores
-		depends on !BR2_mips_m6201 && !BR2_mips_p6600
+		depends on !BR2_mips_m6250 && !BR2_mips_p6600
 		select BR2_TOOLCHAIN_GCC_AT_LEAST_6
 
 endchoice
Signature · 1 line
2.10.1
#5 lore raw

PATCH 3/3 MIPS: rename M6201 core to M6250

Quoted 4 lines · Vicente Olivert Riera

m6201 is the -march option for GCC, but the real core name is M6250.

Signed-off-by Vicente Olivert Riera <[email protected]>
Reviewed-by Arnout Vandecappelle (Essensium/Mind) <[email protected]>

Regards,
Arnout

Quoted 52 lines
---
 arch/Config.in.mips        | 6 +++---
 package/gcc/Config.in.host | 4 ++--
 2 files changed, 5 insertions(+), 5 deletions(-)
arch/Config.in.mips +3 -3
index f407d9a..c14a133 100644
@@ -51,8 +51,8 @@ config BR2_mips_m5150
 	bool "M5150"
 	depends on !BR2_ARCH_IS_64
 	select BR2_MIPS_CPU_MIPS32R5
-config BR2_mips_m6201
-	bool "M6201"
+config BR2_mips_m6250
+	bool "M6250"
 	depends on !BR2_ARCH_IS_64
 	select BR2_MIPS_CPU_MIPS32R6
 config BR2_mips_p5600

@@ -130,7 +130,7 @@ config BR2_GCC_TARGET_ARCH
 	default "mips32r6"	if BR2_mips_32r6
 	default "interaptiv"	if BR2_mips_interaptiv
 	default "m5101"		if BR2_mips_m5150
-	default "m6201"		if BR2_mips_m6201
+	default "m6201"		if BR2_mips_m6250
 	default "p5600"		if BR2_mips_p5600
 	default "mips64"	if BR2_mips_64
 	default "mips64r2"	if BR2_mips_64r2
package/gcc/Config.in.host +2 -2
index eb1479a..0a63e6a 100644
@@ -65,7 +65,7 @@ choice
 		depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_powerpc64 || BR2_powerpc64el))
 		# Unsupported MIPS cores
 		depends on !BR2_mips_interaptiv && !BR2_mips_m5150 && \
-			!BR2_mips_m6201 && !BR2_mips_i6400 && !BR2_mips_p6600
+			!BR2_mips_m6250 && !BR2_mips_i6400 && !BR2_mips_p6600
 		# musl mips64 unsupported
 		depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_mips64 || BR2_mips64el))
 		select BR2_TOOLCHAIN_GCC_AT_LEAST_5

@@ -76,7 +76,7 @@ choice
 		depends on !BR2_arc
 		depends on !BR2_microblaze
 		# Unsupported MIPS cores
-		depends on !BR2_mips_m6201 && !BR2_mips_p6600
+		depends on !BR2_mips_m6250 && !BR2_mips_p6600
 		select BR2_TOOLCHAIN_GCC_AT_LEAST_6
 
 endchoice
Signature · 6 lines
Arnout Vandecappelle                          arnout at mind be
Senior Embedded Software Architect            +32-16-286500
Essensium/Mind                                http://www.mind.be
G.Geenslaan 9, 3001 Leuven, Belgium           BE 872 984 063 RPR Leuven
LinkedIn profile: http://www.linkedin.com/in/arnoutvandecappelle
GPG fingerprint:  7493 020B C7E3 8618 8DEC 222C 82EB F404 F9AC 0DDF
#6 lore raw

PATCH 1/3 MIPS: remove M5100 core

In reply to Vicente Olivert Riera
Quoted 2 lines · Vicente Olivert Riera

This is a microcontroller class (MCU) core which is not suitable for running Linux.

I don't really understand this. What makes it a microcontroller class core that
is not suitable for running Linux? Do you mean to say that no SoCs exist with sufficient memory to be able to run Linux? Or is it just that it's noMMU? The latter shouldn't be a problem.

Quoted 13 lines
Signed-off-by Vicente Olivert Riera <[email protected]>
---
 arch/Config.in.mips                    | 5 -----
 package/gcc/Config.in.host             | 5 ++---
 toolchain/toolchain-external/Config.in | 2 +-
 3 files changed, 3 insertions(+), 9 deletions(-)
arch/Config.in.mips +0 -0
index 3662fed..289e35d 100644

arch/Config.in.mips config BR2_mips_interaptiv · line 53

Quoted 7 lines
arch/Config.in.mips +0 -4
@@ -47,10 +47,6 @@ config BR2_mips_interaptiv
 	bool "interAptiv"
 	depends on !BR2_ARCH_IS_64
 	select BR2_MIPS_CPU_MIPS32R2
-config BR2_mips_m5100
-	bool "M5100"
-	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R5

Missing legacy handling.

Regards,
Arnout

Quoted 41 lines
arch/Config.in.mips +0 -1
 config BR2_mips_m5101
 	bool "M5101"
 	depends on !BR2_ARCH_IS_64

@@ -133,7 +129,6 @@ config BR2_GCC_TARGET_ARCH
 	default "mips32r5"	if BR2_mips_32r5
 	default "mips32r6"	if BR2_mips_32r6
 	default "interaptiv"	if BR2_mips_interaptiv
-	default "m5100"		if BR2_mips_m5100
 	default "m5101"		if BR2_mips_m5101
 	default "m6201"		if BR2_mips_m6201
 	default "p5600"		if BR2_mips_p5600
package/gcc/Config.in.host +2 -3
index 446df4d..f46656c 100644
@@ -64,9 +64,8 @@ choice
 		# musl ppc64 unsupported
 		depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_powerpc64 || BR2_powerpc64el))
 		# Unsupported MIPS cores
-		depends on !BR2_mips_interaptiv && !BR2_mips_m5100 && \
-			!BR2_mips_m5101 && !BR2_mips_m6201 && !BR2_mips_i6400 && \
-			!BR2_mips_p6600
+		depends on !BR2_mips_interaptiv && !BR2_mips_m5101 && \
+			!BR2_mips_m6201 && !BR2_mips_i6400 && !BR2_mips_p6600
 		# musl mips64 unsupported
 		depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_mips64 || BR2_mips64el))
 		select BR2_TOOLCHAIN_GCC_AT_LEAST_5
toolchain/toolchain-external/Config.in +1 -1
index 5324599..22f760b 100644
@@ -530,7 +530,7 @@ config BR2_TOOLCHAIN_EXTERNAL_MUSL_CROSS
 		BR2_x86_64
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	# Unsupported MIPS cores
-	depends on !BR2_mips_interaptiv && !BR2_mips_m5100 && !BR2_mips_m5101
+	depends on !BR2_mips_interaptiv && !BR2_mips_m5101
 	# Unsupported for MIPS R6
 	depends on !BR2_MIPS_CPU_MIPS32R6 && !BR2_MIPS_CPU_MIPS64R6
 	select BR2_TOOLCHAIN_EXTERNAL_MUSL
Signature · 6 lines
Arnout Vandecappelle                          arnout at mind be
Senior Embedded Software Architect            +32-16-286500
Essensium/Mind                                http://www.mind.be
G.Geenslaan 9, 3001 Leuven, Belgium           BE 872 984 063 RPR Leuven
LinkedIn profile: http://www.linkedin.com/in/arnoutvandecappelle
GPG fingerprint:  7493 020B C7E3 8618 8DEC 222C 82EB F404 F9AC 0DDF
#7 lore raw

PATCH 1/3 MIPS: remove M5100 core

*Note that this patch is for master, not for next...*

Quoted 10 lines · Arnout Vandecappelle
Quoted 2 lines · Vicente Olivert Riera

This is a microcontroller class (MCU) core which is not suitable for running Linux.

I don't really understand this. What makes it a microcontroller class core that
is not suitable for running Linux? Do you mean to say that no SoCs exist with sufficient memory to be able to run Linux? Or is it just that it's noMMU? The latter shouldn't be a problem.

OK, the answer is simple: the kernel doesn't support this core.

Quoted 9 lines
Quoted 9 lines
Signed-off-by Vicente Olivert Riera <[email protected]>
---
 arch/Config.in.mips                    | 5 -----
 package/gcc/Config.in.host             | 5 ++---
 toolchain/toolchain-external/Config.in | 2 +-
 3 files changed, 3 insertions(+), 9 deletions(-)
Quoted 14 lines

arch/Config.in.mips config BR2_mips_interaptiv · line 53

Quoted 12 lines
arch/Config.in.mips +0 -4
index 3662fed..289e35d 100644
@@ -47,10 +47,6 @@ config BR2_mips_interaptiv
 	bool "interAptiv"
 	depends on !BR2_ARCH_IS_64
 	select BR2_MIPS_CPU_MIPS32R2
-config BR2_mips_m5100
-	bool "M5100"
-	depends on !BR2_ARCH_IS_64
-	select BR2_MIPS_CPU_MIPS32R5

Missing legacy handling.

Forget it, this core was introduced in this cycle so no legacy handling is needed.

Reviewed-by Arnout Vandecappelle (Essensium/Mind) <[email protected]>

Regards,
Arnout

Quoted 46 lines

Regards,
Arnout

Quoted 41 lines
arch/Config.in.mips +0 -1
 config BR2_mips_m5101
 	bool "M5101"
 	depends on !BR2_ARCH_IS_64

@@ -133,7 +129,6 @@ config BR2_GCC_TARGET_ARCH
 	default "mips32r5"	if BR2_mips_32r5
 	default "mips32r6"	if BR2_mips_32r6
 	default "interaptiv"	if BR2_mips_interaptiv
-	default "m5100"		if BR2_mips_m5100
 	default "m5101"		if BR2_mips_m5101
 	default "m6201"		if BR2_mips_m6201
 	default "p5600"		if BR2_mips_p5600
package/gcc/Config.in.host +2 -3
index 446df4d..f46656c 100644
@@ -64,9 +64,8 @@ choice
 		# musl ppc64 unsupported
 		depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_powerpc64 || BR2_powerpc64el))
 		# Unsupported MIPS cores
-		depends on !BR2_mips_interaptiv && !BR2_mips_m5100 && \
-			!BR2_mips_m5101 && !BR2_mips_m6201 && !BR2_mips_i6400 && \
-			!BR2_mips_p6600
+		depends on !BR2_mips_interaptiv && !BR2_mips_m5101 && \
+			!BR2_mips_m6201 && !BR2_mips_i6400 && !BR2_mips_p6600
 		# musl mips64 unsupported
 		depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_mips64 || BR2_mips64el))
 		select BR2_TOOLCHAIN_GCC_AT_LEAST_5
toolchain/toolchain-external/Config.in +1 -1
index 5324599..22f760b 100644
@@ -530,7 +530,7 @@ config BR2_TOOLCHAIN_EXTERNAL_MUSL_CROSS
 		BR2_x86_64
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	# Unsupported MIPS cores
-	depends on !BR2_mips_interaptiv && !BR2_mips_m5100 && !BR2_mips_m5101
+	depends on !BR2_mips_interaptiv && !BR2_mips_m5101
 	# Unsupported for MIPS R6
 	depends on !BR2_MIPS_CPU_MIPS32R6 && !BR2_MIPS_CPU_MIPS64R6
 	select BR2_TOOLCHAIN_EXTERNAL_MUSL
Signature · 6 lines
Arnout Vandecappelle                          arnout at mind be
Senior Embedded Software Architect            +32-16-286500
Essensium/Mind                                http://www.mind.be
G.Geenslaan 9, 3001 Leuven, Belgium           BE 872 984 063 RPR Leuven
LinkedIn profile: http://www.linkedin.com/in/arnoutvandecappelle
GPG fingerprint:  7493 020B C7E3 8618 8DEC 222C 82EB F404 F9AC 0DDF
#8 lore raw

PATCH 1/3 MIPS: remove M5100 core

In reply to Vicente Olivert Riera

Hello,

Quoted 9 lines · Vicente Olivert Riera

This is a microcontroller class (MCU) core which is not suitable for running Linux.

Signed-off-by Vicente Olivert Riera <[email protected]>
---
 arch/Config.in.mips                    | 5 -----
 package/gcc/Config.in.host             | 5 ++---
 toolchain/toolchain-external/Config.in | 2 +-
 3 files changed, 3 insertions(+), 9 deletions(-)

All patches applied to master. Thanks Arnout for the review!

I have to say it's unfortunate that the gcc option doesn't match the actual name of the core :-/

Thomas

Signature · 3 lines
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com