Add NXP LS2088A platform support

This patchset adds support for the QorIQ LS2088A SoC LS2088A SoC is similar to LS2080A SoC with a few differences like it has A72 cores.

Supported targets are QDS and RDB boards. The updates include binding updates, and addition of the ls2088a device dtsi and dts files.

Abhimanyu Saini (6):
dt-bindings: arm: Update bindings for LS2088A targets
dt-bindings: pci: Update bindings for LS2088A
dt-bindings: mtd: fsl-quadspi: Update qspi bindings for LS2088A
dt-bindings: spi: Update dspi bindings for LS2088A
dt-bindings: gpio: Update gpio bindings for LS2088A
arm64: Add DTS support for FSL's LS2088A SoC

 Documentation/devicetree/bindings/arm/fsl.txt      |   7 +
 .../devicetree/bindings/gpio/gpio-mpc8xxx.txt      |   2 +-
 .../devicetree/bindings/mtd/fsl-quadspi.txt        |   4 +-
 .../devicetree/bindings/pci/layerscape-pci.txt     |   5 +-
 .../devicetree/bindings/spi/spi-fsl-dspi.txt       |   3 +-
 arch/arm64/boot/dts/freescale/Makefile             |   2 +
 arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts  | 211 +++++++
 arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts  | 166 +++++
 arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi     | 703 +++++++++++++++++++++
 9 files changed, 1096 insertions(+), 7 deletions(-)
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi

1.9.1

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to [email protected]
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Add compatible strings for LS2088A RDB and QDS board.

---
 Documentation/devicetree/bindings/arm/fsl.txt | 7 +++++++
 1 file changed, 7 insertions(+)

index d6ee9c6..cad97d2 100644
@@ -179,3 +179,10 @@ LS2080A ARMv8 based RDB Board
 Required root node properties:
     - compatible = "fsl,ls2080a-rdb", "fsl,ls2080a";
 
+LS2088A ARMv8 based QDS Board
+Required root node properties:
+    - compatible = "fsl,ls2088a-qds", "fsl,ls2088a"
+
+LS2088A ARMv8 based RDB Board
+Required root node properties:
+    - compatible = "fsl,ls2088a-rdb", "fsl,ls2088a"

1.9.1

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to [email protected]
More majordomo info at  http://vger.kernel.org/majordomo-info.html

---
 Documentation/devicetree/bindings/pci/layerscape-pci.txt | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

index 41e9f55..ff32669 100644
@@ -12,9 +12,8 @@ which can allow determining the underlying DesignWare PCIe controller version
 information.
 
 Required properties:
-- compatible: should contain the platform identifier such as:
-        "fsl,ls1021a-pcie", "snps,dw-pcie"
-        "fsl,ls2080a-pcie", "fsl,ls2085a-pcie", "snps,dw-pcie"
+- compatible: should be: "fsl,<chip>-pcie", "snps,dw-pcie".
+	<chip> can be: ls1021a, ls2080a, ls2088a
 - reg: base addresses and lengths of the PCIe controller
 - interrupts: A list of interrupt outputs of the controller. Must contain an
   entry for each entry in the interrupt-names property.

1.9.1

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to [email protected]
More majordomo info at  http://vger.kernel.org/majordomo-info.html

---
 Documentation/devicetree/bindings/mtd/fsl-quadspi.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

index c34aa6f..2f95a8f 100644
@@ -5,8 +5,8 @@ Required properties:
 		 "fsl,imx7d-qspi", "fsl,imx6ul-qspi",
 		 "fsl,ls1021a-qspi"
 		 or
-		 "fsl,ls2080a-qspi" followed by "fsl,ls1021a-qspi",
-		 "fsl,ls1043a-qspi" followed by "fsl,ls1021a-qspi"
+		 "fsl,<chip>-qspi", "fsl,ls1021a-qspi"
+		 <chip> can be: ls2080a, ls2088a, ls1043a
   - reg : the first contains the register location and length,
           the second contains the memory mapping address and length
   - reg-names: Should contain the reg names "QuadSPI" and "QuadSPI-memory"

1.9.1

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to [email protected]
More majordomo info at  http://vger.kernel.org/majordomo-info.html

---
 Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

index ff5893d..0870660 100644
@@ -4,7 +4,8 @@ Required properties:
 - compatible : "fsl,vf610-dspi", "fsl,ls1021a-v1.0-dspi",
 		"fsl,ls2085a-dspi"
 		or
-		"fsl,ls2080a-dspi" followed by "fsl,ls2085a-dspi"
+		"fsl,<chip>-dspi" followed by "fsl,ls2085a-dspi",
+		<chip> can be: ls2080a, ls2088a
 - reg : Offset and length of the register set for the device
 - interrupts : Should contain SPI controller interrupt
 - clocks: from common clock binding: handle to dspi clock.

1.9.1

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to [email protected]
More majordomo info at  http://vger.kernel.org/majordomo-info.html

---
 Documentation/devicetree/bindings/gpio/gpio-mpc8xxx.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

index 4b6cc63..9b1be49 100644
@@ -4,7 +4,7 @@ Required properties:
 - compatible : Should be "fsl,<soc>-gpio"
   The following <soc>s are known to be supported:
 	mpc5121, mpc5125, mpc8349, mpc8572, mpc8610, pq3, qoriq,
-	ls1021a, ls1043a, ls2080a.
+	ls1021a, ls1043a, ls2080a, ls2088a.
 - reg : Address and length of the register set for the device
 - interrupts : Should be the port interrupt shared by all 32 pins.
 - #gpio-cells : Should be two.  The first cell is the pin number and

1.9.1

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to [email protected]
More majordomo info at  http://vger.kernel.org/majordomo-info.html

This patch adds the device tree support for FSL LS2088A SoC based on ARMv8 architecture.

Following levels of DTSI/DTS files have been created for the LS2088A SoC family:

- fsl-ls2088a.dtsi:
DTS-Include file for FSL LS2088A SoC.

- fsl-ls2088a-qds.dts:
DTS file for FSL LS2088A QDS board.

- fsl-ls2088a-rdb.dts:
DTS file for FSL LS2088A RDB board.

---
 arch/arm64/boot/dts/freescale/Makefile            |   2 +
 arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts | 211 +++++++
 arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts | 166 +++++
 arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi    | 703 ++++++++++++++++++++++
 4 files changed, 1082 insertions(+)
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi

index 6602718..fa3d66e 100644
@@ -5,6 +5,8 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb
  
 always		:= $(dtb-y)
 subdir-y	:= $(dts-dirs)

1.9.1

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to [email protected]
More majordomo info at  http://vger.kernel.org/majordomo-info.html

I compared the following files.

fsl-ls2088a.dtsi vs. fsl-ls2080a.dtsi
fsl-ls2088a-qds.dtsi vs. fsl-ls2080a-qds.dtsi
fsl-ls2088a-rdb.dtsi vs. fsl-ls2080a-rdb.dtsi

They are basically identical except a couple of small changes. Can we do something to have these SoCs share the dts files at some level to avoid maintaining duplicated files?

Shawn

Hi Shawn,

Yes, we could reorganize DTSI and DTS file.
I can create fsl-ls2080a-ls2088a.dtsi and move all the common nodes to this file,

Then fsl-ls2080a.dtsi and fsl-ls2088a.dtsi which will include the common file and add ls2080a and ls2088a specific nodes respectively.

Same hierarchy can be created for fsl-ls2080a-qds.dts, fsl-ls2080a-rdb, fsl-ls2088a-qds.dts and fsl-ls2088a-rdb, wherein the common nodes will lie in fsl-ls2080a-ls2088a-qds.dts and fsl-ls2080a-ls2088a-rdb.dts

What do you think?

Abhimanyu