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Docs: dt: Be explicit and consistent in reference to IOMMU specifiers

PATCH Applied Stuart Yoder 3 participants 5 messages Dec 16, 2016 – Dec 19, 2016

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PATCH 1/1 Docs: dt: Be explicit and consistent in reference to IOMMU specifiers

The generic IOMMU binding says that the meaning of an 'IOMMU specifier' is defined by the binding of a specific SMMU. The ARM SMMU binding never explicitly uses the term 'specifier' at all. Update implicit references to use the explicit term.

In the iommu-map binding change references to iommu-specifier to "IOMMU specifier" so we are 100% consistent everywhere with terminology and capitalization.

---
 Documentation/devicetree/bindings/iommu/arm,smmu.txt | 10 +++++-----
 Documentation/devicetree/bindings/pci/pci-iommu.txt  |  6 +++---
 2 files changed, 8 insertions(+), 8 deletions(-)
Documentation/devicetree/bindings/iommu/arm,smmu.txt +5 -5
index e862d148..6cdf32d 100644
@@ -36,15 +36,15 @@ conditions.
                   combined interrupt, it must be listed multiple times.
 
 - #iommu-cells  : See Documentation/devicetree/bindings/iommu/iommu.txt
-                  for details. With a value of 1, each "iommus" entry
+                  for details. With a value of 1, each IOMMU specifier
                   represents a distinct stream ID emitted by that device
                   into the relevant SMMU.
 
                   SMMUs with stream matching support and complex masters
-                  may use a value of 2, where the second cell represents
-                  an SMR mask to combine with the ID in the first cell.
-                  Care must be taken to ensure the set of matched IDs
-                  does not result in conflicts.
+                  may use a value of 2, where the second cell of the
+                  IOMMU specifier represents an SMR mask to combine with
+                  the ID in the first cell.  Care must be taken to ensure
+                  the set of matched IDs does not result in conflicts.
 
 ** System MMU optional properties:
 
Documentation/devicetree/bindings/pci/pci-iommu.txt +3 -3
index 56c8296..0def586 100644
@@ -32,17 +32,17 @@ PCI root complex
 Optional properties
 -------------------
 
-- iommu-map: Maps a Requester ID to an IOMMU and associated iommu-specifier
+- iommu-map: Maps a Requester ID to an IOMMU and associated IOMMU specifier
   data.
 
   The property is an arbitrary number of tuples of
   (rid-base,iommu,iommu-base,length).
 
   Any RID r in the interval [rid-base, rid-base + length) is associated with
-  the listed IOMMU, with the iommu-specifier (r - rid-base + iommu-base).
+  the listed IOMMU, with the IOMMU specifier (r - rid-base + iommu-base).
 
 - iommu-map-mask: A mask to be applied to each Requester ID prior to being
-  mapped to an iommu-specifier per the iommu-map property.
+  mapped to an IOMMU specifier per the iommu-map property.
 
 
 Example (1)
Signature · 1 line
1.9.0
#1 lore raw

Hi Stuart,

Quoted 8 lines · Stuart Yoder

The generic IOMMU binding says that the meaning of an 'IOMMU specifier' is defined by the binding of a specific SMMU. The ARM SMMU binding never explicitly uses the term 'specifier' at all. Update implicit references to use the explicit term.

In the iommu-map binding change references to iommu-specifier to "IOMMU specifier" so we are 100% consistent everywhere with terminology and capitalization.

Elsewhere, we always use lower case "xxx-specifier" or "xxx specifier", e.g. Documentation/devicetree/bindings/gpio/gpio.txt defines "gpio-specifier", ePAPR defines "interrupt specifier".

Given we're morstly consistent on "iommu-specifier" today, could we please jsut update the ARM SMMU binding to match that? If we're going to fix the dash mismatch, that's a more general, cross-binding thing.

Thanks,
Mark.

Quoted 59 lines
---
 Documentation/devicetree/bindings/iommu/arm,smmu.txt | 10 +++++-----
 Documentation/devicetree/bindings/pci/pci-iommu.txt  |  6 +++---
 2 files changed, 8 insertions(+), 8 deletions(-)
Documentation/devicetree/bindings/iommu/arm,smmu.txt +5 -5
index e862d148..6cdf32d 100644
@@ -36,15 +36,15 @@ conditions.
                   combined interrupt, it must be listed multiple times.
 
 - #iommu-cells  : See Documentation/devicetree/bindings/iommu/iommu.txt
-                  for details. With a value of 1, each "iommus" entry
+                  for details. With a value of 1, each IOMMU specifier
                   represents a distinct stream ID emitted by that device
                   into the relevant SMMU.
 
                   SMMUs with stream matching support and complex masters
-                  may use a value of 2, where the second cell represents
-                  an SMR mask to combine with the ID in the first cell.
-                  Care must be taken to ensure the set of matched IDs
-                  does not result in conflicts.
+                  may use a value of 2, where the second cell of the
+                  IOMMU specifier represents an SMR mask to combine with
+                  the ID in the first cell.  Care must be taken to ensure
+                  the set of matched IDs does not result in conflicts.
 
 ** System MMU optional properties:
 
Documentation/devicetree/bindings/pci/pci-iommu.txt +3 -3
index 56c8296..0def586 100644
@@ -32,17 +32,17 @@ PCI root complex
 Optional properties
 -------------------
 
-- iommu-map: Maps a Requester ID to an IOMMU and associated iommu-specifier
+- iommu-map: Maps a Requester ID to an IOMMU and associated IOMMU specifier
   data.
 
   The property is an arbitrary number of tuples of
   (rid-base,iommu,iommu-base,length).
 
   Any RID r in the interval [rid-base, rid-base + length) is associated with
-  the listed IOMMU, with the iommu-specifier (r - rid-base + iommu-base).
+  the listed IOMMU, with the IOMMU specifier (r - rid-base + iommu-base).
 
 - iommu-map-mask: A mask to be applied to each Requester ID prior to being
-  mapped to an iommu-specifier per the iommu-map property.
+  mapped to an IOMMU specifier per the iommu-map property.
 
 
 Example (1)
Signature · 1 line
1.9.0
#2 lore raw
Quoted 22 lines

-----Original Message-----
From: Mark Rutland [mailto:[email protected]]
Sent: Friday, December 16, 2016 5:33 AM
To: Stuart Yoder <[email protected]>
Cc: [email protected]; [email protected]; [email protected]; [email protected]; iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org; [email protected]
Subject: Re: [PATCH] Docs: dt: Be explicit and consistent in reference to IOMMU specifiers

Hi Stuart,

Quoted 8 lines · Stuart Yoder

The generic IOMMU binding says that the meaning of an 'IOMMU specifier' is defined by the binding of a specific SMMU. The ARM SMMU binding never explicitly uses the term 'specifier' at all. Update implicit references to use the explicit term.

In the iommu-map binding change references to iommu-specifier to "IOMMU specifier" so we are 100% consistent everywhere with terminology and capitalization.

Quoted 7 lines

Elsewhere, we always use lower case "xxx-specifier" or "xxx specifier", e.g. Documentation/devicetree/bindings/gpio/gpio.txt defines "gpio-specifier", ePAPR defines "interrupt specifier".

Given we're morstly consistent on "iommu-specifier" today,could we please jsut update the ARM SMMU binding to match that? If we're going to fix the dash mismatch, that's a more general, cross-binding thing.

The notable place where we don't use "iommu-specifier" in in the generic IOMMU binding itself where we use "IOMMU specifier". You're suggesting using "iommu-specifier" everywhere including the generic binding? Sounds fine to me. It's a nit but would like to see it consistent everywhere.

Thanks,
Stuart

Acked-by
#3 lore raw
Quoted 14 lines · Stuart Yoder
Quoted 14 lines

-----Original Message-----
From: Mark Rutland [mailto:[email protected]]

Quoted 3 lines · Stuart Yoder

In the iommu-map binding change references to iommu-specifier to "IOMMU specifier" so we are 100% consistent everywhere with terminology and capitalization.

Elsewhere, we always use lower case "xxx-specifier" or "xxx specifier", e.g. Documentation/devicetree/bindings/gpio/gpio.txt defines "gpio-specifier", ePAPR defines "interrupt specifier".

Quoted 6 lines
Quoted 3 lines

Given we're morstly consistent on "iommu-specifier" today,could we please jsut update the ARM SMMU binding to match that? If we're going to fix the dash mismatch, that's a more general, cross-binding thing.

The notable place where we don't use "iommu-specifier" in in the generic IOMMU binding itself where we use "IOMMU specifier".

True; I failed to notice that. You are right in that the pci-iommu binding is the odd one out. Sorry for the misinformation above. :/

Quoted 3 lines

You're suggesting using "iommu-specifier" everywhere including the generic binding? Sounds fine to me. It's a nit but would like to see it consistent everywhere.

I certainly agree that we should be consistent.

So FWIW, for this patch (as-is):

Thanks,
Mark.

maintainer Applied
#4 lore raw
In reply to Stuart Yoder
Quoted 9 lines · Stuart Yoder

The generic IOMMU binding says that the meaning of an 'IOMMU specifier' is defined by the binding of a specific SMMU. The ARM SMMU binding never explicitly uses the term 'specifier' at all. Update implicit references to use the explicit term.

In the iommu-map binding change references to iommu-specifier to "IOMMU specifier" so we are 100% consistent everywhere with terminology and capitalization.

Quoted 5 lines
---
 Documentation/devicetree/bindings/iommu/arm,smmu.txt | 10 +++++-----
 Documentation/devicetree/bindings/pci/pci-iommu.txt  |  6 +++---
 2 files changed, 8 insertions(+), 8 deletions(-)

Applied, thanks.

Rob

Quoted 54 lines
Documentation/devicetree/bindings/iommu/arm,smmu.txt +5 -5
index e862d148..6cdf32d 100644
@@ -36,15 +36,15 @@ conditions.
                   combined interrupt, it must be listed multiple times.
 
 - #iommu-cells  : See Documentation/devicetree/bindings/iommu/iommu.txt
-                  for details. With a value of 1, each "iommus" entry
+                  for details. With a value of 1, each IOMMU specifier
                   represents a distinct stream ID emitted by that device
                   into the relevant SMMU.
 
                   SMMUs with stream matching support and complex masters
-                  may use a value of 2, where the second cell represents
-                  an SMR mask to combine with the ID in the first cell.
-                  Care must be taken to ensure the set of matched IDs
-                  does not result in conflicts.
+                  may use a value of 2, where the second cell of the
+                  IOMMU specifier represents an SMR mask to combine with
+                  the ID in the first cell.  Care must be taken to ensure
+                  the set of matched IDs does not result in conflicts.
 
 ** System MMU optional properties:
 
Documentation/devicetree/bindings/pci/pci-iommu.txt +3 -3
index 56c8296..0def586 100644
@@ -32,17 +32,17 @@ PCI root complex
 Optional properties
 -------------------
 
-- iommu-map: Maps a Requester ID to an IOMMU and associated iommu-specifier
+- iommu-map: Maps a Requester ID to an IOMMU and associated IOMMU specifier
   data.
 
   The property is an arbitrary number of tuples of
   (rid-base,iommu,iommu-base,length).
 
   Any RID r in the interval [rid-base, rid-base + length) is associated with
-  the listed IOMMU, with the iommu-specifier (r - rid-base + iommu-base).
+  the listed IOMMU, with the IOMMU specifier (r - rid-base + iommu-base).
 
 - iommu-map-mask: A mask to be applied to each Requester ID prior to being
-  mapped to an iommu-specifier per the iommu-map property.
+  mapped to an IOMMU specifier per the iommu-map property.
 
 
 Example (1)
Signature · 1 line
1.9.0