Introducing Exynos ChipId driver

Exynos SoCs have Chipid, for identification of product IDs and SoC revisions. This patch intends to provide initialization code for all these functionalities, at the same time it provides some sysfs entries for accessing these information to user-space.

This driver uses existing binding for exynos-chipid.

CC Grant Likely <[email protected]>

CC Rob Herring <[email protected]>

CC Linus Walleij <[email protected]>

Signed-off-by Pankaj Dubey <[email protected]>

[m.szyprowski: for suggestion and code snippet of product_id_to_soc_id]

Signed-off-by Marek Szyprowski <[email protected]>

---
 drivers/soc/samsung/Kconfig         |   5 ++
 drivers/soc/samsung/Makefile        |   1 +
 drivers/soc/samsung/exynos-chipid.c | 116 ++++++++++++++++++++++++++++++++++++
 3 files changed, 122 insertions(+)
 create mode 100644 drivers/soc/samsung/exynos-chipid.c

drivers/soc/samsung/Kconfig +0 -0

index 2455339..f9ab858 100644

drivers/soc/samsung/exynos-chipid.c new file +53 -0

new file mode 100644
index 0000000..cf0128b
@@ -0,0 +1,116 @@
+/*
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ *	      http://www.samsung.com/
+ *
+ * EXYNOS - CHIP ID support
+ * Author: Pankaj Dubey <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/sys_soc.h>
+
+#define EXYNOS_SUBREV_MASK	(0xF << 4)
+#define EXYNOS_MAINREV_MASK	(0xF << 0)
+#define EXYNOS_REV_MASK		(EXYNOS_SUBREV_MASK | EXYNOS_MAINREV_MASK)
+
+static const struct exynos_soc_id {
+	const char *name;
+	unsigned int id;
+	unsigned int mask;
+} soc_ids[] = {
+	{ "EXYNOS3250", 0xE3472000, 0xFFFFF000 },
+	{ "EXYNOS4210", 0x43200000, 0xFFFE0000 },
+	{ "EXYNOS4212", 0x43220000, 0xFFFE0000 },
+	{ "EXYNOS4412", 0xE4412000, 0xFFFE0000 },
+	{ "EXYNOS5250", 0x43520000, 0xFFFFF000 },
+	{ "EXYNOS5260", 0xE5260000, 0xFFFFF000 },
+	{ "EXYNOS5410", 0xE5410000, 0xFFFFF000 },
+	{ "EXYNOS5420", 0xE5420000, 0xFFFFF000 },
+	{ "EXYNOS5440", 0xE5440000, 0xFFFFF000 },
+	{ "EXYNOS5800", 0xE5422000, 0xFFFFF000 },
+	{ "EXYNOS7420", 0xE7420000, 0xFFFFF000 },
+	{ "EXYNOS5433", 0xE5433000, 0xFFFFF000 },
+};
+
+static const char * __init product_id_to_soc_id(unsigned int product_id)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(soc_ids); i++)
+		if ((product_id & soc_ids[i].mask) == soc_ids[i].id)
+			return soc_ids[i].name;
+	return "UNKNOWN";
+}
+

drivers/soc/samsung/exynos-chipid.c new file +14 -0

+	revision = product_id & EXYNOS_REV_MASK;
+	iounmap(exynos_chipid_base);
+
+	soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+	if (!soc_dev_attr)
+		return -ENODEV;
+
+	soc_dev_attr->family = "Samsung Exynos";
+
+	root = of_find_node_by_path("/");
+	of_property_read_string(root, "model", &soc_dev_attr->machine);
+	of_node_put(root);
+
+	soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%x", revision);

drivers/soc/samsung/exynos-chipid.c new file +7 -0

+		kfree(soc_dev_attr);
+		return PTR_ERR(soc_dev);
+	}
+
+	return 0;
+}
+early_initcall(exynos_chipid_early_init);

Signature · 1 line

2.7.4

Quoted 28 lines · Pankaj Dubey

Exynos SoCs have Chipid, for identification of product IDs and SoC revisions. This patch intends to provide initialization code for all these functionalities, at the same time it provides some sysfs entries for accessing these information to user-space.

This driver uses existing binding for exynos-chipid.

CC Grant Likely <[email protected]>

CC Rob Herring <[email protected]>

CC Linus Walleij <[email protected]>

Signed-off-by Pankaj Dubey <[email protected]>

[m.szyprowski: for suggestion and code snippet of product_id_to_soc_id]

Signed-off-by Marek Szyprowski <[email protected]>

---
 drivers/soc/samsung/Kconfig         |   5 ++
 drivers/soc/samsung/Makefile        |   1 +
 drivers/soc/samsung/exynos-chipid.c | 116 ++++++++++++++++++++++++++++++++++++
 3 files changed, 122 insertions(+)
 create mode 100644 drivers/soc/samsung/exynos-chipid.c

drivers/soc/samsung/Kconfig +0 -0

index 2455339..f9ab858 100644
@@ -14,4 +14,9 @@ config EXYNOS_PM_DOMAINS
      bool "Exynos PM domains" if COMPILE_TEST
      depends on PM_GENERIC_DOMAINS || COMPILE_TEST
 

drivers/soc/samsung/Kconfig config EXYNOS_PM_DOMAINS · line 19

Quoted 3 lines

drivers/soc/samsung/Kconfig +3 -0

+config EXYNOS_CHIPID
+     bool "Exynos Chipid controller driver" if COMPILE_TEST
+     depends on (ARM && ARCH_EXYNOS) || ((ARM || ARM64) && COMPILE_TEST)

1. Why this can be compile tested only on ARM architectures?

2. Don't you need also SOC_BUS?

drivers/soc/samsung/Makefile line 4

Quoted 13 lines

drivers/soc/samsung/Kconfig +2 -0

+     select SOC_BUS
+
 endif

drivers/soc/samsung/Makefile +1 -0

index 3619f2e..2a8a85e 100644
@@ -1,3 +1,4 @@
 obj-$(CONFIG_EXYNOS_PMU)     += exynos-pmu.o exynos3250-pmu.o exynos4-pmu.o \
                                      exynos5250-pmu.o exynos5420-pmu.o
 obj-$(CONFIG_EXYNOS_PM_DOMAINS) += pm_domains.o
+obj-$(CONFIG_EXYNOS_CHIPID)  += exynos-chipid.o

Please put it before EXYNOS_PMU, keeping this sorted alphabetical helps avoiding conflicts of continuous edits.

Quoted 63 lines

drivers/soc/samsung/exynos-chipid.c new file +57 -0

new file mode 100644
index 0000000..cf0128b
@@ -0,0 +1,116 @@
+/*
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ *         http://www.samsung.com/
+ *
+ * EXYNOS - CHIP ID support
+ * Author: Pankaj Dubey <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/sys_soc.h>
+
+#define EXYNOS_SUBREV_MASK   (0xF << 4)
+#define EXYNOS_MAINREV_MASK  (0xF << 0)
+#define EXYNOS_REV_MASK              (EXYNOS_SUBREV_MASK | EXYNOS_MAINREV_MASK)
+
+static const struct exynos_soc_id {
+     const char *name;
+     unsigned int id;
+     unsigned int mask;
+} soc_ids[] = {
+     { "EXYNOS3250", 0xE3472000, 0xFFFFF000 },
+     { "EXYNOS4210", 0x43200000, 0xFFFE0000 },
+     { "EXYNOS4212", 0x43220000, 0xFFFE0000 },
+     { "EXYNOS4412", 0xE4412000, 0xFFFE0000 },
+     { "EXYNOS5250", 0x43520000, 0xFFFFF000 },
+     { "EXYNOS5260", 0xE5260000, 0xFFFFF000 },
+     { "EXYNOS5410", 0xE5410000, 0xFFFFF000 },
+     { "EXYNOS5420", 0xE5420000, 0xFFFFF000 },
+     { "EXYNOS5440", 0xE5440000, 0xFFFFF000 },
+     { "EXYNOS5800", 0xE5422000, 0xFFFFF000 },
+     { "EXYNOS7420", 0xE7420000, 0xFFFFF000 },
+     { "EXYNOS5433", 0xE5433000, 0xFFFFF000 },
+};
+
+static const char * __init product_id_to_soc_id(unsigned int product_id)
+{
+     int i;
+
+     for (i = 0; i < ARRAY_SIZE(soc_ids); i++)
+             if ((product_id & soc_ids[i].mask) == soc_ids[i].id)
+                     return soc_ids[i].name;
+     return "UNKNOWN";
+}
+
+static const struct of_device_id of_exynos_chipid_ids[] = {
+     {
+             .compatible     = "samsung,exynos4210-chipid",
+     },

drivers/soc/samsung/exynos-chipid.c line 63

Quoted 6 lines

drivers/soc/samsung/exynos-chipid.c new file +6 -0

+     {},
+};
+
+/**
+ *  exynos_chipid_early_init: Early chipid initialization
+ */

This comment is meaningless, it duplicates the name of function.

Quoted 11 lines

drivers/soc/samsung/exynos-chipid.c new file +10 -0

+int __init exynos_chipid_early_init(void)
+{
+     struct soc_device_attribute *soc_dev_attr;
+     struct soc_device *soc_dev;
+     struct device_node *root;
+     struct device_node *np;
+     void __iomem *exynos_chipid_base;
+     const struct of_device_id *match;
+     u32 product_id;
+     u32 revision;

drivers/soc/samsung/exynos-chipid.c line 76

Quoted 3 lines

drivers/soc/samsung/exynos-chipid.c new file +3 -0

+
+     np = of_find_matching_node_and_match(NULL,
+                     of_exynos_chipid_ids, &match);

You don't use the match here, so how about either of_find_matching_node() or of_find_compatible_node()? The latter looks better (less calls inside) and actually you want just check one compatible field?

drivers/soc/samsung/exynos-chipid.c line 85

Quoted 9 lines

drivers/soc/samsung/exynos-chipid.c new file +9 -0

+     if (!np)
+             return -ENODEV;
+
+     exynos_chipid_base = of_iomap(np, 0);
+
+     if (!exynos_chipid_base)
+             return PTR_ERR(exynos_chipid_base);
+
+     product_id  = readl_relaxed(exynos_chipid_base);

Duplicated space before '='.

Quoted 19 lines

drivers/soc/samsung/exynos-chipid.c new file +18 -0

+     revision = product_id & EXYNOS_REV_MASK;
+     iounmap(exynos_chipid_base);
+
+     soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+     if (!soc_dev_attr)
+             return -ENODEV;
+
+     soc_dev_attr->family = "Samsung Exynos";
+
+     root = of_find_node_by_path("/");
+     of_property_read_string(root, "model", &soc_dev_attr->machine);
+     of_node_put(root);
+
+     soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%x", revision);
+     soc_dev_attr->soc_id = product_id_to_soc_id(product_id);
+
+
+     pr_info("Exynos: CPU[%s] CPU_REV[0x%x] Detected\n",

drivers/soc/samsung/exynos-chipid.c line 109

Quoted 6 lines

drivers/soc/samsung/exynos-chipid.c new file +6 -0

+                     product_id_to_soc_id(product_id), revision);
+
+     soc_dev = soc_device_register(soc_dev_attr);
+     if (IS_ERR(soc_dev)) {
+             kfree(soc_dev_attr->revision);
+             kfree_const(soc_dev_attr->soc_id);

It wasn't allocated with *_const, so no need to free it.

Best regards,
Krzysztof

Hi Krzysztof,

Quoted 29 lines · Krzysztof Kozlowski

Quoted 28 lines · Pankaj Dubey

Exynos SoCs have Chipid, for identification of product IDs and SoC revisions. This patch intends to provide initialization code for all these functionalities, at the same time it provides some sysfs entries for accessing these information to user-space.

This driver uses existing binding for exynos-chipid.

CC Grant Likely <[email protected]>

CC Rob Herring <[email protected]>

CC Linus Walleij <[email protected]>

Signed-off-by Pankaj Dubey <[email protected]>

[m.szyprowski: for suggestion and code snippet of product_id_to_soc_id]

Signed-off-by Marek Szyprowski <[email protected]>

---
 drivers/soc/samsung/Kconfig         |   5 ++
 drivers/soc/samsung/Makefile        |   1 +
 drivers/soc/samsung/exynos-chipid.c | 116 ++++++++++++++++++++++++++++++++++++
 3 files changed, 122 insertions(+)
 create mode 100644 drivers/soc/samsung/exynos-chipid.c

drivers/soc/samsung/Kconfig +0 -0

index 2455339..f9ab858 100644
@@ -14,4 +14,9 @@ config EXYNOS_PM_DOMAINS
      bool "Exynos PM domains" if COMPILE_TEST
      depends on PM_GENERIC_DOMAINS || COMPILE_TEST
 

Quoted 5 lines

drivers/soc/samsung/Kconfig config EXYNOS_PM_DOMAINS · line 19

Quoted 3 lines

drivers/soc/samsung/Kconfig +3 -0

+config EXYNOS_CHIPID
+     bool "Exynos Chipid controller driver" if COMPILE_TEST
+     depends on (ARM && ARCH_EXYNOS) || ((ARM || ARM64) && COMPILE_TEST)

1. Why this can be compile tested only on ARM architectures?

Well I just used dependency same as EXYNOS_PMU, but I can see it will be enabled for compile test on ARM64 isn't it?

Quoted 2 lines

2. Don't you need also SOC_BUS?

CHIPID needs SoC_BUS and for the same reason it is selecting SOC_BUS in the next line.
If we mark it as a dependency (under depends on), even then we need to select this either
under same EXYNOS_CHIPID config or ARCH_EXYNOS config.

Exynos SoCs have Chipid, for identification of product IDs and SoC revisions. This patch intends to provide initialization code for all these functionalities, at the same time it provides some sysfs entries for accessing these information to user-space.

This driver uses existing binding for exynos-chipid.

CC Grant Likely <[email protected]>

CC Rob Herring <[email protected]>

CC Linus Walleij <[email protected]>

Signed-off-by Pankaj Dubey <[email protected]>

[m.szyprowski: for suggestion and code snippet of product_id_to_soc_id]

Signed-off-by Marek Szyprowski <[email protected]>

---
 drivers/soc/samsung/Kconfig         |   5 ++
 drivers/soc/samsung/Makefile        |   1 +
 drivers/soc/samsung/exynos-chipid.c | 116 ++++++++++++++++++++++++++++++++++++
 3 files changed, 122 insertions(+)
 create mode 100644 drivers/soc/samsung/exynos-chipid.c

drivers/soc/samsung/Kconfig +5 -0

index 2455339..f9ab858 100644
@@ -14,4 +14,9 @@ config EXYNOS_PM_DOMAINS
 	bool "Exynos PM domains" if COMPILE_TEST
 	depends on PM_GENERIC_DOMAINS || COMPILE_TEST
 
+config EXYNOS_CHIPID
+	bool "Exynos Chipid controller driver" if COMPILE_TEST
+	depends on (ARM && ARCH_EXYNOS) || ((ARM || ARM64) && COMPILE_TEST)
+	select SOC_BUS
+
 endif

drivers/soc/samsung/Makefile +1 -0

index 3619f2e..2a8a85e 100644
@@ -1,3 +1,4 @@
 obj-$(CONFIG_EXYNOS_PMU)	+= exynos-pmu.o exynos3250-pmu.o exynos4-pmu.o \
 					exynos5250-pmu.o exynos5420-pmu.o
 obj-$(CONFIG_EXYNOS_PM_DOMAINS) += pm_domains.o
+obj-$(CONFIG_EXYNOS_CHIPID)	+= exynos-chipid.o

drivers/soc/samsung/exynos-chipid.c new file +116 -0

new file mode 100644
index 0000000..cf0128b
@@ -0,0 +1,116 @@
+/*
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ *	      http://www.samsung.com/
+ *
+ * EXYNOS - CHIP ID support
+ * Author: Pankaj Dubey <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/sys_soc.h>
+
+#define EXYNOS_SUBREV_MASK	(0xF << 4)
+#define EXYNOS_MAINREV_MASK	(0xF << 0)
+#define EXYNOS_REV_MASK		(EXYNOS_SUBREV_MASK | EXYNOS_MAINREV_MASK)
+
+static const struct exynos_soc_id {
+	const char *name;
+	unsigned int id;
+	unsigned int mask;
+} soc_ids[] = {
+	{ "EXYNOS3250", 0xE3472000, 0xFFFFF000 },
+	{ "EXYNOS4210", 0x43200000, 0xFFFE0000 },
+	{ "EXYNOS4212", 0x43220000, 0xFFFE0000 },
+	{ "EXYNOS4412", 0xE4412000, 0xFFFE0000 },
+	{ "EXYNOS5250", 0x43520000, 0xFFFFF000 },
+	{ "EXYNOS5260", 0xE5260000, 0xFFFFF000 },
+	{ "EXYNOS5410", 0xE5410000, 0xFFFFF000 },
+	{ "EXYNOS5420", 0xE5420000, 0xFFFFF000 },
+	{ "EXYNOS5440", 0xE5440000, 0xFFFFF000 },
+	{ "EXYNOS5800", 0xE5422000, 0xFFFFF000 },
+	{ "EXYNOS7420", 0xE7420000, 0xFFFFF000 },
+	{ "EXYNOS5433", 0xE5433000, 0xFFFFF000 },
+};
+
+static const char * __init product_id_to_soc_id(unsigned int product_id)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(soc_ids); i++)
+		if ((product_id & soc_ids[i].mask) == soc_ids[i].id)
+			return soc_ids[i].name;
+	return "UNKNOWN";
+}
+
+static const struct of_device_id of_exynos_chipid_ids[] = {
+	{
+		.compatible	= "samsung,exynos4210-chipid",
+	},
+	{},
+};
+
+/**
+ *  exynos_chipid_early_init: Early chipid initialization
+ */
+int __init exynos_chipid_early_init(void)
+{
+	struct soc_device_attribute *soc_dev_attr;
+	struct soc_device *soc_dev;
+	struct device_node *root;
+	struct device_node *np;
+	void __iomem *exynos_chipid_base;
+	const struct of_device_id *match;
+	u32 product_id;
+	u32 revision;
+
+	np = of_find_matching_node_and_match(NULL,
+			of_exynos_chipid_ids, &match);
+	if (!np)
+		return -ENODEV;
+
+	exynos_chipid_base = of_iomap(np, 0);
+
+	if (!exynos_chipid_base)
+		return PTR_ERR(exynos_chipid_base);
+
+	product_id  = readl_relaxed(exynos_chipid_base);
+	revision = product_id & EXYNOS_REV_MASK;
+	iounmap(exynos_chipid_base);
+
+	soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+	if (!soc_dev_attr)
+		return -ENODEV;
+
+	soc_dev_attr->family = "Samsung Exynos";
+
+	root = of_find_node_by_path("/");
+	of_property_read_string(root, "model", &soc_dev_attr->machine);
+	of_node_put(root);
+
+	soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%x", revision);
+	soc_dev_attr->soc_id = product_id_to_soc_id(product_id);
+
+
+	pr_info("Exynos: CPU[%s] CPU_REV[0x%x] Detected\n",
+			product_id_to_soc_id(product_id), revision);
+
+	soc_dev = soc_device_register(soc_dev_attr);
+	if (IS_ERR(soc_dev)) {
+		kfree(soc_dev_attr->revision);
+		kfree_const(soc_dev_attr->soc_id);
+		kfree(soc_dev_attr);
+		return PTR_ERR(soc_dev);
+	}
+
+	return 0;
+}
+early_initcall(exynos_chipid_early_init);

Hi Pankaj,

tested your patches 1/8 and 2/8 + Javiers diff for verbose output:
https://www.spinics.net/lists/linux-samsung-soc/msg56576.html

on Odroid U3:

[    0.080178] Exynos: CPU[UNKNOWN] CPU_REV[0x20] PKG_ID[0x602d058] AUX_INFO[0x0] 
on Odroid X:
[    0.080169] Exynos: CPU[UNKNOWN] CPU_REV[0x11] PKG_ID[0x1b0f6008] AUX_INFO[0x0] 

XU4: [ 0.080039] Exynos: CPU[EXYNOS5800] CPU_REV[0x1] PKG_ID[0x1c04832a] AUX_INFO[0x43]
XU3: [ 0.080034] Exynos: CPU[EXYNOS5800] CPU_REV[0x1] PKG_ID[0x1604832a] AUX_INFO[0x43]
XU3-lite:[ 0.080033] Exynos: CPU[EXYNOS5800] CPU_REV[0x1] PKG_ID[0x5a12832a] AUX_INFO[0x13000054]

Regards,
--
Markus Reichl

Hi Markus,

Quoted 9 lines · Markus Reichl

Hi Pankaj,

tested your patches 1/8 and 2/8 + Javiers diff for verbose output:
https://www.spinics.net/lists/linux-samsung-soc/msg56576.html

on Odroid U3:

[    0.080178] Exynos: CPU[UNKNOWN] CPU_REV[0x20] PKG_ID[0x602d058] AUX_INFO[0x0]
on Odroid X:
[    0.080169] Exynos: CPU[UNKNOWN] CPU_REV[0x11] PKG_ID[0x1b0f6008] AUX_INFO[0x0]

Quoted 9 lines · pankaj.dubey

Hi Markus,

Quoted 5 lines · Markus Reichl

Hi Pankaj,

tested your patches 1/8 and 2/8 + Javiers diff for verbose output:
https://www.spinics.net/lists/linux-samsung-soc/msg56576.html

Quoted 4 lines

Quoted 4 lines

on Odroid U3:

[    0.080178] Exynos: CPU[UNKNOWN] CPU_REV[0x20] PKG_ID[0x602d058] AUX_INFO[0x0]
on Odroid X:
[    0.080169] Exynos: CPU[UNKNOWN] CPU_REV[0x11] PKG_ID[0x1b0f6008] AUX_INFO[0x0]

Hmm.... this needs fixes.

Best regards,
Krzysztof

Exynos SoCs have Chipid, for identification of product IDs and SoC revisions. This patch intends to provide initialization code for all these functionalities, at the same time it provides some sysfs entries for accessing these information to user-space.

This driver uses existing binding for exynos-chipid.

CC Grant Likely <[email protected]>

CC Rob Herring <[email protected]>

CC Linus Walleij <[email protected]>

Signed-off-by Pankaj Dubey <[email protected]>

[m.szyprowski: for suggestion and code snippet of product_id_to_soc_id]

Signed-off-by Marek Szyprowski <[email protected]>

---
 drivers/soc/samsung/Kconfig         |   5 ++
 drivers/soc/samsung/Makefile        |   1 +
 drivers/soc/samsung/exynos-chipid.c | 116 ++++++++++++++++++++++++++++++++++++
 3 files changed, 122 insertions(+)
 create mode 100644 drivers/soc/samsung/exynos-chipid.c

drivers/soc/samsung/Kconfig +5 -0

index 2455339..f9ab858 100644
@@ -14,4 +14,9 @@ config EXYNOS_PM_DOMAINS
 	bool "Exynos PM domains" if COMPILE_TEST
 	depends on PM_GENERIC_DOMAINS || COMPILE_TEST
 
+config EXYNOS_CHIPID
+	bool "Exynos Chipid controller driver" if COMPILE_TEST
+	depends on (ARM && ARCH_EXYNOS) || ((ARM || ARM64) && COMPILE_TEST)
+	select SOC_BUS
+
 endif

drivers/soc/samsung/Makefile +1 -0

index 3619f2e..2a8a85e 100644
@@ -1,3 +1,4 @@
 obj-$(CONFIG_EXYNOS_PMU)	+= exynos-pmu.o exynos3250-pmu.o exynos4-pmu.o \
 					exynos5250-pmu.o exynos5420-pmu.o
 obj-$(CONFIG_EXYNOS_PM_DOMAINS) += pm_domains.o
+obj-$(CONFIG_EXYNOS_CHIPID)	+= exynos-chipid.o

drivers/soc/samsung/exynos-chipid.c new file +31 -0

new file mode 100644
index 0000000..cf0128b
@@ -0,0 +1,116 @@
+/*
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ *	      http://www.samsung.com/
+ *
+ * EXYNOS - CHIP ID support
+ * Author: Pankaj Dubey <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/sys_soc.h>
+
+#define EXYNOS_SUBREV_MASK	(0xF << 4)
+#define EXYNOS_MAINREV_MASK	(0xF << 0)
+#define EXYNOS_REV_MASK		(EXYNOS_SUBREV_MASK | EXYNOS_MAINREV_MASK)
+
+static const struct exynos_soc_id {
+	const char *name;
+	unsigned int id;
+	unsigned int mask;
+} soc_ids[] = {
+	{ "EXYNOS3250", 0xE3472000, 0xFFFFF000 },
+	{ "EXYNOS4210", 0x43200000, 0xFFFE0000 },

drivers/soc/samsung/exynos-chipid.c new file +53 -0

+};
+
+static const char * __init product_id_to_soc_id(unsigned int product_id)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(soc_ids); i++)
+		if ((product_id & soc_ids[i].mask) == soc_ids[i].id)
+			return soc_ids[i].name;
+	return "UNKNOWN";
+}
+
+static const struct of_device_id of_exynos_chipid_ids[] = {
+	{
+		.compatible	= "samsung,exynos4210-chipid",
+	},
+	{},
+};
+
+/**
+ *  exynos_chipid_early_init: Early chipid initialization
+ */
+int __init exynos_chipid_early_init(void)
+{
+	struct soc_device_attribute *soc_dev_attr;
+	struct soc_device *soc_dev;
+	struct device_node *root;
+	struct device_node *np;
+	void __iomem *exynos_chipid_base;
+	const struct of_device_id *match;
+	u32 product_id;
+	u32 revision;
+
+	np = of_find_matching_node_and_match(NULL,
+			of_exynos_chipid_ids, &match);
+	if (!np)
+		return -ENODEV;
+
+	exynos_chipid_base = of_iomap(np, 0);
+
+	if (!exynos_chipid_base)
+		return PTR_ERR(exynos_chipid_base);
+
+	product_id  = readl_relaxed(exynos_chipid_base);
+	revision = product_id & EXYNOS_REV_MASK;
+	iounmap(exynos_chipid_base);
+
+	soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+	if (!soc_dev_attr)
+		return -ENODEV;
+
+	soc_dev_attr->family = "Samsung Exynos";
+

drivers/soc/samsung/exynos-chipid.c new file +12 -0

+
+	soc_dev = soc_device_register(soc_dev_attr);
+	if (IS_ERR(soc_dev)) {
+		kfree(soc_dev_attr->revision);
+		kfree_const(soc_dev_attr->soc_id);
+		kfree(soc_dev_attr);
+		return PTR_ERR(soc_dev);
+	}
+
+	return 0;
+}
+early_initcall(exynos_chipid_early_init);

Exynos SoCs have Chipid, for identification of product IDs and SoC revisions. This patch intends to provide initialization code for all these functionalities, at the same time it provides some sysfs entries for accessing these information to user-space.

This driver uses existing binding for exynos-chipid.

CC Grant Likely <[email protected]>

CC Rob Herring <[email protected]>

CC Linus Walleij <[email protected]>

Signed-off-by Pankaj Dubey <[email protected]>

[m.szyprowski: for suggestion and code snippet of product_id_to_soc_id]

Signed-off-by Marek Szyprowski <[email protected]>

---
 drivers/soc/samsung/Kconfig         |   5 ++
 drivers/soc/samsung/Makefile        |   1 +
 drivers/soc/samsung/exynos-chipid.c | 116 ++++++++++++++++++++++++++++++++++++
 3 files changed, 122 insertions(+)
 create mode 100644 drivers/soc/samsung/exynos-chipid.c

drivers/soc/samsung/exynos-chipid.c new file +0 -0

new file mode 100644
index 0000000..cf0128b

drivers/soc/samsung/exynos-chipid.c new file +10 -0

+/**
+ *  exynos_chipid_early_init: Early chipid initialization
+ */
+int __init exynos_chipid_early_init(void)
+{
+	struct soc_device_attribute *soc_dev_attr;
+	struct soc_device *soc_dev;
+	struct device_node *root;
+	struct device_node *np;
+	void __iomem *exynos_chipid_base;

Hi,

Quoted 19 lines · Pankaj Dubey

Exynos SoCs have Chipid, for identification of product IDs and SoC revisions. This patch intends to provide initialization code for all these functionalities, at the same time it provides some sysfs entries for accessing these information to user-space.

This driver uses existing binding for exynos-chipid.

CC Grant Likely <[email protected]>

CC Rob Herring <[email protected]>

CC Linus Walleij <[email protected]>

Signed-off-by Pankaj Dubey <[email protected]>

[m.szyprowski: for suggestion and code snippet of product_id_to_soc_id]

Signed-off-by Marek Szyprowski <[email protected]>

---
 drivers/soc/samsung/Kconfig         |   5 ++
 drivers/soc/samsung/Makefile        |   1 +
 drivers/soc/samsung/exynos-chipid.c | 116 ++++++++++++++++++++++++++++++++++++
 3 files changed, 122 insertions(+)
 create mode 100644 drivers/soc/samsung/exynos-chipid.c

[...]

Quoted 5 lines

drivers/soc/samsung/exynos-chipid.c new file +0 -0

new file mode 100644
index 0000000..cf0128b

[...]

Quoted 14 lines

drivers/soc/samsung/exynos-chipid.c new file +14 -0

+/**
+ *  exynos_chipid_early_init: Early chipid initialization
+ */
+int __init exynos_chipid_early_init(void)
+{
+     struct soc_device_attribute *soc_dev_attr;
+     struct soc_device *soc_dev;
+     struct device_node *root;
+     struct device_node *np;
+     void __iomem *exynos_chipid_base;
+     const struct of_device_id *match;
+     u32 product_id;
+     u32 revision;
+

drivers/soc/samsung/exynos-chipid.c line 80

Quoted 6 lines

drivers/soc/samsung/exynos-chipid.c new file +6 -0

+     np = of_find_matching_node_and_match(NULL,
+                     of_exynos_chipid_ids, &match);
+     if (!np)
+             return -ENODEV;
+
+     exynos_chipid_base = of_iomap(np, 0);

of_node_put(np) is missing here.

drivers/soc/samsung/exynos-chipid.c line 83

Quoted 2 lines

drivers/soc/samsung/exynos-chipid.c new file +2 -0

+     if (!exynos_chipid_base)
+             return PTR_ERR(exynos_chipid_base);

PTR_ERR use here is incorrect - of_iomap() returns valid pointer or NULL. Please just return -NODEV on of_iomap() failure.

Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics

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As now we have chipid driver to initialize SoC related information lets include it in build by default.

Signed-off-by Pankaj Dubey <[email protected]>

---
 arch/arm/mach-exynos/Kconfig | 1 +
 1 file changed, 1 insertion(+)

arch/arm/mach-exynos/Kconfig +1 -0

index 0bb63b8..29065c5 100644
@@ -16,6 +16,7 @@ menuconfig ARCH_EXYNOS
 	select ARM_AMBA
 	select ARM_GIC
 	select COMMON_CLK_SAMSUNG
+	select EXYNOS_CHIPID
 	select EXYNOS_THERMAL
 	select EXYNOS_PMU
 	select EXYNOS_SROM

Signature · 1 line

2.7.4

Quoted 2 lines · Pankaj Dubey

As now we have chipid driver to initialize SoC related information lets include it in build by default.

s/lets/let's/

Reviewed-by Krzysztof Kozlowski <[email protected]>

Best regards,
Krzysztof

Quoted 19 lines

Signed-off-by Pankaj Dubey <[email protected]>

---
 arch/arm/mach-exynos/Kconfig | 1 +
 1 file changed, 1 insertion(+)

arch/arm/mach-exynos/Kconfig +1 -1

index 0bb63b8..29065c5 100644
@@ -16,6 +16,7 @@ menuconfig ARCH_EXYNOS
      select ARM_AMBA
      select ARM_GIC
      select COMMON_CLK_SAMSUNG
+     select EXYNOS_CHIPID
      select EXYNOS_THERMAL
      select EXYNOS_PMU
      select EXYNOS_SROM
--

Quoted 2 lines

2.7.4

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This patch enables exynos_chipid driver for ARCH_EXYNOS based SoC.

Signed-off-by Pankaj Dubey <[email protected]>

---
 arch/arm64/Kconfig.platforms | 1 +
 1 file changed, 1 insertion(+)

arch/arm64/Kconfig.platforms +0 -0

index 72f4eac..e6aa5c2 100644

arch/arm64/Kconfig.platforms +0 -0

 	select COMMON_CLK_SAMSUNG
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG
 	select HAVE_S3C_RTC if RTC_CLASS

Signature · 1 line

2.7.4

To remove dependency on soc_is_exynosMMMM macros and remove multiple checks for such macros lets refactor code in firmware.c file. SoC specific firmware_ops are separated and registered during exynos_firmware_init based on matching machine compatible.

Signed-off-by Pankaj Dubey <[email protected]>

---
 arch/arm/mach-exynos/firmware.c | 100 ++++++++++++++++++++++++++++++----------
 1 file changed, 75 insertions(+), 25 deletions(-)

arch/arm/mach-exynos/firmware.c +21 -13

index fd6da54..525fbd9 100644
@@ -35,6 +35,25 @@ static void exynos_save_cp15(void)
 	     : : "cc");
 }
 
+static int exynos3250_do_idle(unsigned long mode)
+{
+	switch (mode) {
+	case FW_DO_IDLE_AFTR:
+		writel_relaxed(virt_to_phys(exynos_cpu_resume_ns),
+			       sysram_ns_base_addr + 0x24);
+		writel_relaxed(EXYNOS_AFTR_MAGIC, sysram_ns_base_addr + 0x20);
+		flush_cache_all();
+		exynos_smc(SMC_CMD_SAVE, OP_TYPE_CORE,
+				SMC_POWERSTATE_IDLE, 0);
+		exynos_smc(SMC_CMD_SHUTDOWN, OP_TYPE_CLUSTER,
+				SMC_POWERSTATE_IDLE, 0);
+		break;
+	case FW_DO_IDLE_SLEEP:
+		exynos_smc(SMC_CMD_SLEEP, 0, 0, 0);
+	}
+	return 0;
+}
+
 static int exynos_do_idle(unsigned long mode)
 {
 	switch (mode) {

@@ -44,14 +63,7 @@ static int exynos_do_idle(unsigned long mode)
 		writel_relaxed(virt_to_phys(exynos_cpu_resume_ns),
 			       sysram_ns_base_addr + 0x24);
 		writel_relaxed(EXYNOS_AFTR_MAGIC, sysram_ns_base_addr + 0x20);
-		if (soc_is_exynos3250()) {
-			flush_cache_all();
-			exynos_smc(SMC_CMD_SAVE, OP_TYPE_CORE,
-				   SMC_POWERSTATE_IDLE, 0);
-			exynos_smc(SMC_CMD_SHUTDOWN, OP_TYPE_CLUSTER,
-				   SMC_POWERSTATE_IDLE, 0);
-		} else
-			exynos_smc(SMC_CMD_CPU0AFTR, 0, 0, 0);
+		exynos_smc(SMC_CMD_CPU0AFTR, 0, 0, 0);
 		break;
 	case FW_DO_IDLE_SLEEP:
 		exynos_smc(SMC_CMD_SLEEP, 0, 0, 0);

@@ -59,28 +71,25 @@ static int exynos_do_idle(unsigned long mode)
 	return 0;
 }
 
-static int exynos_cpu_boot(int cpu)
+static int exynos4412_cpu_boot(int cpu)
 {
 	/*
-	 * Exynos3250 doesn't need to send smc command for secondary CPU boot
-	 * because Exynos3250 removes WFE in secure mode.
-	 */
-	if (soc_is_exynos3250())

arch/arm/mach-exynos/firmware.c +25 -6

 	return 0;
 }
 
-static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
+static int exynos4412_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
 {
 	void __iomem *boot_reg;
 

@@ -94,14 +103,24 @@ static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
 	 * additional offset for every CPU, with Exynos4412 being the only
 	 * exception.
 	 */
-	if (soc_is_exynos4412())
-		boot_reg += 4 * cpu;
+	boot_reg += 4 * cpu;
+	writel_relaxed(boot_addr, boot_reg);
+	return 0;
+}
+
+static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
+{
+	void __iomem *boot_reg;
 
+	if (!sysram_ns_base_addr)
+		return -ENODEV;
+
+	boot_reg = sysram_ns_base_addr + 0x1c;
 	writel_relaxed(boot_addr, boot_reg);
 	return 0;
 }
 
-static int exynos_get_cpu_boot_addr(int cpu, unsigned long *boot_addr)
+static int exynos4412_get_cpu_boot_addr(int cpu, unsigned long *boot_addr)
 {
 	void __iomem *boot_reg;
 

@@ -109,10 +128,19 @@ static int exynos_get_cpu_boot_addr(int cpu, unsigned long *boot_addr)
 		return -ENODEV;
 
 	boot_reg = sysram_ns_base_addr + 0x1c;
+	boot_reg += 4 * cpu;
+	*boot_addr = readl_relaxed(boot_reg);
+	return 0;
+}
+
+static int exynos_get_cpu_boot_addr(int cpu, unsigned long *boot_addr)
+{
+	void __iomem *boot_reg;
 
-	if (soc_is_exynos4412())
-		boot_reg += 4 * cpu;
+	if (!sysram_ns_base_addr)
+		return -ENODEV;
 
+	boot_reg = sysram_ns_base_addr + 0x1c;
 	*boot_addr = readl_relaxed(boot_reg);
 	return 0;
 }

arch/arm/mach-exynos/firmware.c +13 -0

+	.suspend		= IS_ENABLED(CONFIG_PM_SLEEP) ? exynos_suspend : NULL,
+	.resume			= IS_ENABLED(CONFIG_EXYNOS_CPU_SUSPEND) ? exynos_resume : NULL,
+};
+
+static const struct firmware_ops exynos4412_firmware_ops = {
+	.do_idle		= IS_ENABLED(CONFIG_EXYNOS_CPU_SUSPEND) ? exynos_do_idle : NULL,
+	.set_cpu_boot_addr	= exynos4412_set_cpu_boot_addr,
+	.get_cpu_boot_addr	= exynos4412_get_cpu_boot_addr,
+	.cpu_boot		= exynos4412_cpu_boot,
+	.suspend		= IS_ENABLED(CONFIG_PM_SLEEP) ? exynos_suspend : NULL,
+	.resume			= IS_ENABLED(CONFIG_EXYNOS_CPU_SUSPEND) ? exynos_resume : NULL,
+};
+
 static const struct firmware_ops exynos_firmware_ops = {
 	.do_idle		= IS_ENABLED(CONFIG_EXYNOS_CPU_SUSPEND) ? exynos_do_idle : NULL,
 	.set_cpu_boot_addr	= exynos_set_cpu_boot_addr,

arch/arm/mach-exynos/firmware.c +0 -0

 	/*
 	 * Exynos 4 SoCs (based on Cortex A9 and equipped with L2C-310),

Signature · 1 line

2.7.4

Quoted 73 lines · Pankaj Dubey

To remove dependency on soc_is_exynosMMMM macros and remove multiple checks for such macros lets refactor code in firmware.c file. SoC specific firmware_ops are separated and registered during exynos_firmware_init based on matching machine compatible.

Signed-off-by Pankaj Dubey <[email protected]>

---
 arch/arm/mach-exynos/firmware.c | 100 ++++++++++++++++++++++++++++++----------
 1 file changed, 75 insertions(+), 25 deletions(-)

arch/arm/mach-exynos/firmware.c +21 -16

index fd6da54..525fbd9 100644
@@ -35,6 +35,25 @@ static void exynos_save_cp15(void)
           : : "cc");
 }
 
+static int exynos3250_do_idle(unsigned long mode)
+{
+     switch (mode) {
+     case FW_DO_IDLE_AFTR:
+             writel_relaxed(virt_to_phys(exynos_cpu_resume_ns),
+                            sysram_ns_base_addr + 0x24);
+             writel_relaxed(EXYNOS_AFTR_MAGIC, sysram_ns_base_addr + 0x20);
+             flush_cache_all();
+             exynos_smc(SMC_CMD_SAVE, OP_TYPE_CORE,
+                             SMC_POWERSTATE_IDLE, 0);
+             exynos_smc(SMC_CMD_SHUTDOWN, OP_TYPE_CLUSTER,
+                             SMC_POWERSTATE_IDLE, 0);
+             break;
+     case FW_DO_IDLE_SLEEP:
+             exynos_smc(SMC_CMD_SLEEP, 0, 0, 0);
+     }
+     return 0;
+}
+
 static int exynos_do_idle(unsigned long mode)
 {
      switch (mode) {

@@ -44,14 +63,7 @@ static int exynos_do_idle(unsigned long mode)
              writel_relaxed(virt_to_phys(exynos_cpu_resume_ns),
                             sysram_ns_base_addr + 0x24);
              writel_relaxed(EXYNOS_AFTR_MAGIC, sysram_ns_base_addr + 0x20);
-             if (soc_is_exynos3250()) {
-                     flush_cache_all();
-                     exynos_smc(SMC_CMD_SAVE, OP_TYPE_CORE,
-                                SMC_POWERSTATE_IDLE, 0);
-                     exynos_smc(SMC_CMD_SHUTDOWN, OP_TYPE_CLUSTER,
-                                SMC_POWERSTATE_IDLE, 0);
-             } else
-                     exynos_smc(SMC_CMD_CPU0AFTR, 0, 0, 0);
+             exynos_smc(SMC_CMD_CPU0AFTR, 0, 0, 0);
              break;
      case FW_DO_IDLE_SLEEP:
              exynos_smc(SMC_CMD_SLEEP, 0, 0, 0);

@@ -59,28 +71,25 @@ static int exynos_do_idle(unsigned long mode)
      return 0;
 }
 
-static int exynos_cpu_boot(int cpu)
+static int exynos4412_cpu_boot(int cpu)
 {
      /*
-      * Exynos3250 doesn't need to send smc command for secondary CPU boot
-      * because Exynos3250 removes WFE in secure mode.
-      */
-     if (soc_is_exynos3250())
-             return 0;
-
-     /*
       * The second parameter of SMC_CMD_CPU1BOOT command means CPU id.
       * But, Exynos4212 has only one secondary CPU so second parameter

arch/arm/mach-exynos/firmware.c static int exynos_do_idle(unsigned long mode) · line 81

Quoted 5 lines

arch/arm/mach-exynos/firmware.c +1 -2

       * isn't used for informing secure firmware about CPU id.
       */
-     if (soc_is_exynos4212())
-             cpu = 0;
+     cpu = 0;

Why are you clearing the cpu for Exynos4412? Was it tested on Exynos4412?

arch/arm/mach-exynos/firmware.c static int exynos_do_idle(unsigned long mode) · line 88

Quoted 7 lines

arch/arm/mach-exynos/firmware.c +5 -0

+     exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0);
+     return 0;
+}
 
+static int exynos_cpu_boot(int cpu)
+{
      exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0);

This will be executed on Exynos4212...

Quoted 62 lines

arch/arm/mach-exynos/firmware.c +25 -6

      return 0;
 }
 
-static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
+static int exynos4412_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
 {
      void __iomem *boot_reg;
 

@@ -94,14 +103,24 @@ static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
       * additional offset for every CPU, with Exynos4412 being the only
       * exception.
       */
-     if (soc_is_exynos4412())
-             boot_reg += 4 * cpu;
+     boot_reg += 4 * cpu;
+     writel_relaxed(boot_addr, boot_reg);
+     return 0;
+}
+
+static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
+{
+     void __iomem *boot_reg;
 
+     if (!sysram_ns_base_addr)
+             return -ENODEV;
+
+     boot_reg = sysram_ns_base_addr + 0x1c;
      writel_relaxed(boot_addr, boot_reg);
      return 0;
 }
 
-static int exynos_get_cpu_boot_addr(int cpu, unsigned long *boot_addr)
+static int exynos4412_get_cpu_boot_addr(int cpu, unsigned long *boot_addr)
 {
      void __iomem *boot_reg;
 

@@ -109,10 +128,19 @@ static int exynos_get_cpu_boot_addr(int cpu, unsigned long *boot_addr)
              return -ENODEV;
 
      boot_reg = sysram_ns_base_addr + 0x1c;
+     boot_reg += 4 * cpu;
+     *boot_addr = readl_relaxed(boot_reg);
+     return 0;
+}
+
+static int exynos_get_cpu_boot_addr(int cpu, unsigned long *boot_addr)
+{
+     void __iomem *boot_reg;
 
-     if (soc_is_exynos4412())
-             boot_reg += 4 * cpu;
+     if (!sysram_ns_base_addr)
+             return -ENODEV;
 
+     boot_reg = sysram_ns_base_addr + 0x1c;
      *boot_addr = readl_relaxed(boot_reg);
      return 0;
 }

@@ -148,6 +176,23 @@ static int exynos_resume(void)
      return 0;
 }
 

arch/arm/mach-exynos/firmware.c static int exynos_resume(void) · line 182

Quoted 4 lines

arch/arm/mach-exynos/firmware.c +4 -0

+static const struct firmware_ops exynos3250_firmware_ops = {
+     .do_idle                = IS_ENABLED(CONFIG_EXYNOS_CPU_SUSPEND) ? exynos3250_do_idle : NULL,
+     .set_cpu_boot_addr      = exynos_set_cpu_boot_addr,
+     .get_cpu_boot_addr      = exynos_get_cpu_boot_addr,

You know that lack of cpu_boot() is not equivalent to previous 'return 0' code? Now -ENOSYS will be returned... which is not a problem because return values for cpu_boot are ignored... just wondering whether this was planned.

Quoted 18 lines

arch/arm/mach-exynos/firmware.c +13 -0

+     .suspend                = IS_ENABLED(CONFIG_PM_SLEEP) ? exynos_suspend : NULL,
+     .resume                 = IS_ENABLED(CONFIG_EXYNOS_CPU_SUSPEND) ? exynos_resume : NULL,
+};
+
+static const struct firmware_ops exynos4412_firmware_ops = {
+     .do_idle                = IS_ENABLED(CONFIG_EXYNOS_CPU_SUSPEND) ? exynos_do_idle : NULL,
+     .set_cpu_boot_addr      = exynos4412_set_cpu_boot_addr,
+     .get_cpu_boot_addr      = exynos4412_get_cpu_boot_addr,
+     .cpu_boot               = exynos4412_cpu_boot,
+     .suspend                = IS_ENABLED(CONFIG_PM_SLEEP) ? exynos_suspend : NULL,
+     .resume                 = IS_ENABLED(CONFIG_EXYNOS_CPU_SUSPEND) ? exynos_resume : NULL,
+};
+
 static const struct firmware_ops exynos_firmware_ops = {
      .do_idle                = IS_ENABLED(CONFIG_EXYNOS_CPU_SUSPEND) ? exynos_do_idle : NULL,
      .set_cpu_boot_addr      = exynos_set_cpu_boot_addr,

arch/arm/mach-exynos/firmware.c void __init exynos_firmware_init(void) · line 265

Quoted 10 lines

arch/arm/mach-exynos/firmware.c +6 -1

@@ -212,7 +257,12 @@ void __init exynos_firmware_init(void)
 
      pr_info("Running under secure firmware.\n");
 
-     register_firmware_ops(&exynos_firmware_ops);
+     if (of_machine_is_compatible("samsung,exynos3250"))
+             register_firmware_ops(&exynos3250_firmware_ops);
+     else if (of_machine_is_compatible("samsung,exynos4412"))
+             register_firmware_ops(&exynos4412_firmware_ops);
+     else
+             register_firmware_ops(&exynos_firmware_ops);

I prefer one register_firmware_ops() call, so something like:

        const struct firmware_ops *ops;
        if (...)
                ops = &exynos3250_firmware_ops;
        else if ()
                ...
        register_firmware_ops(ops);

It is a matter of taste but for me it is more common pattern, looks more readable and it reduces number of callers to register_firmware_ops() (so it is easier to find them).

To remove dependency on soc_is_exynosMMMM macros and remove multiple checks for such macros lets refactor code in pm.c

This patch matches SoC specific information via private data of soc_device_attribute and initialize it at one place and then uses it all other places

Signed-off-by Pankaj Dubey <[email protected]>

---
 arch/arm/mach-exynos/pm.c | 185 ++++++++++++++++++++++++++++++++++++++--------
 1 file changed, 155 insertions(+), 30 deletions(-)

arch/arm/mach-exynos/pm.c +155 -30

index c0b46c3..d43bea8 100644
@@ -20,6 +20,7 @@
 #include <linux/of.h>
 #include <linux/soc/samsung/exynos-regs-pmu.h>
 #include <linux/soc/samsung/exynos-pmu.h>
+#include <linux/sys_soc.h>
 
 #include <asm/firmware.h>
 #include <asm/smp_scu.h>

@@ -28,22 +29,49 @@
 
 #include "common.h"
 
+struct exynos_s2r_data {
+	void __iomem* (*boot_vector_addr)(void);
+	void __iomem* (*boot_vector_flag)(void);
+	void (*set_wakeupmask)(void);
+	void (*enter_aftr)(void);
+};
+
+static const struct exynos_s2r_data *s2r_data;
+
+static void __iomem *exynos4210_rev11_boot_vector_addr(void)
+{
+	return pmu_base_addr + S5P_INFORM7;
+}
+
+static void __iomem *exynos4210_rev10_boot_vector_addr(void)
+{
+	return sysram_base_addr + 0x24;
+}
+
 static inline void __iomem *exynos_boot_vector_addr(void)
 {
-	if (samsung_rev() == EXYNOS4210_REV_1_1)
-		return pmu_base_addr + S5P_INFORM7;
-	else if (samsung_rev() == EXYNOS4210_REV_1_0)
-		return sysram_base_addr + 0x24;
-	return pmu_base_addr + S5P_INFORM0;
+	if (s2r_data && s2r_data->boot_vector_addr)
+		return s2r_data->boot_vector_addr();
+	else
+		return pmu_base_addr + S5P_INFORM0;
+}
+
+static void __iomem *exynos4210_rev11_boot_vector_flag(void)
+{
+	return pmu_base_addr + S5P_INFORM6;
+}
+
+static void __iomem *exynos4210_rev10_boot_vector_flag(void)
+{
+	return sysram_base_addr + 0x20;
 }
 
 static inline void __iomem *exynos_boot_vector_flag(void)
 {
-	if (samsung_rev() == EXYNOS4210_REV_1_1)
-		return pmu_base_addr + S5P_INFORM6;
-	else if (samsung_rev() == EXYNOS4210_REV_1_0)
-		return sysram_base_addr + 0x20;
-	return pmu_base_addr + S5P_INFORM1;
+	if (s2r_data && s2r_data->boot_vector_flag)
+		return s2r_data->boot_vector_flag();
+	else
+		return pmu_base_addr + S5P_INFORM1;
 }
 
 #define S5P_CHECK_AFTR  0xFCBA0D10

@@ -120,12 +148,19 @@ int exynos_pm_central_resume(void)
 	return 0;
 }
 
+static void exynos3250_set_wakeupmask(void)
+{
+	pmu_raw_writel(0x40003ffe, S5P_WAKEUP_MASK);
+	pmu_raw_writel(0x0, S5P_WAKEUP_MASK2);
+}
+
 /* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
-static void exynos_set_wakeupmask(long mask)
+static void exynos_set_wakeupmask(void)
 {
-	pmu_raw_writel(mask, S5P_WAKEUP_MASK);
-	if (soc_is_exynos3250())
-		pmu_raw_writel(0x0, S5P_WAKEUP_MASK2);
+	if (s2r_data && s2r_data->set_wakeupmask)
+		s2r_data->set_wakeupmask();
+	else
+		pmu_raw_writel(0x0000ff3e, S5P_WAKEUP_MASK);
 }
 
 static void exynos_cpu_set_boot_vector(long flags)

@@ -139,7 +174,7 @@ static int exynos_aftr_finisher(unsigned long flags)
 {
 	int ret;
 
-	exynos_set_wakeupmask(soc_is_exynos3250() ? 0x40003ffe : 0x0000ff3e);
+	exynos_set_wakeupmask();
 	/* Set value of power down register for aftr mode */
 	exynos_sys_powerdown_conf(SYS_AFTR);
 

@@ -154,23 +189,30 @@ static int exynos_aftr_finisher(unsigned long flags)
 	return 1;
 }
 
-void exynos_enter_aftr(void)
+static void exynos3250_enter_aftr(void)
 {
 	unsigned int cpuid = smp_processor_id();
 
 	cpu_pm_enter();
 
-	if (soc_is_exynos3250())
-		exynos_set_boot_flag(cpuid, C2_STATE);
+	exynos_set_boot_flag(cpuid, C2_STATE);
+	exynos_pm_central_suspend();
+	cpu_suspend(0, exynos_aftr_finisher);
+	exynos_pm_central_resume();
+	exynos_clear_boot_flag(cpuid, C2_STATE);
+
+	cpu_pm_exit();
+}
+
+void exynos4x12_enter_aftr(void)
+{
+	cpu_pm_enter();
 
 	exynos_pm_central_suspend();
 
-	if (of_machine_is_compatible("samsung,exynos4212") ||
-	    of_machine_is_compatible("samsung,exynos4412")) {
-		/* Setting SEQ_OPTION register */
-		pmu_raw_writel(S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0,
-			       S5P_CENTRAL_SEQ_OPTION);
-	}
+	/* Setting SEQ_OPTION register */
+	pmu_raw_writel(S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0,
+			S5P_CENTRAL_SEQ_OPTION);
 
 	cpu_suspend(0, exynos_aftr_finisher);
 

@@ -182,12 +224,95 @@ void exynos_enter_aftr(void)
 
 	exynos_pm_central_resume();
 
-	if (soc_is_exynos3250())
-		exynos_clear_boot_flag(cpuid, C2_STATE);
+	cpu_pm_exit();
+}
+
+void exynos_common_enter_aftr(void)
+{
+	cpu_pm_enter();
+
+	exynos_pm_central_suspend();
+	cpu_suspend(0, exynos_aftr_finisher);
+
+	if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) {
+		exynos_scu_enable();
+		if (call_firmware_op(resume) == -ENOSYS)
+			exynos_cpu_restore_register();
+	}
+
+	exynos_pm_central_resume();
 
 	cpu_pm_exit();
 }
 
+void exynos_enter_aftr(void)
+{
+	if (s2r_data && s2r_data->enter_aftr)
+		s2r_data->enter_aftr();
+}
+
+static const struct exynos_s2r_data exynos_common_s2r_data = {
+	.enter_aftr		= exynos_common_enter_aftr,
+};
+
+static const struct exynos_s2r_data exynos3250_s2r_data = {
+	.set_wakeupmask		= exynos3250_set_wakeupmask,
+	.enter_aftr		= exynos3250_enter_aftr,
+};
+
+static const struct exynos_s2r_data exynos4210_rev11_s2r_data = {
+	.boot_vector_addr	= exynos4210_rev11_boot_vector_addr,
+	.boot_vector_flag	= exynos4210_rev11_boot_vector_flag,
+	.enter_aftr		= exynos_common_enter_aftr,
+};
+
+static const struct exynos_s2r_data exynos4210_rev10_s2r_data = {
+	.boot_vector_addr	= exynos4210_rev10_boot_vector_addr,
+	.boot_vector_flag	= exynos4210_rev10_boot_vector_flag,
+	.enter_aftr		= exynos_common_enter_aftr,
+};
+
+static const struct exynos_s2r_data exynos4x12_s2r_data = {
+	.enter_aftr		= exynos4x12_enter_aftr,
+};
+
+static const struct soc_device_attribute exynos_soc_revision[] = {
+	{ .soc_id = "EXYNOS3250", .data = &exynos3250_s2r_data },
+	{
+		.soc_id = "EXYNOS4210", .revision = "11",
+		.data = &exynos4210_rev11_s2r_data
+	},
+	{
+		.soc_id = "EXYNOS4210", .revision = "10",
+		.data = &exynos4210_rev10_s2r_data
+	},
+	{ .soc_id = "EXYNOS4212", .data = &exynos4x12_s2r_data },
+	{ .soc_id = "EXYNOS4412", .data = &exynos4x12_s2r_data },
+	{ .soc_id = "EXYNOS4415", .data = &exynos_common_s2r_data },
+	{ .soc_id = "EXYNOS5250", .data = &exynos_common_s2r_data },
+	{ .soc_id = "EXYNOS5260", .data = &exynos_common_s2r_data },
+	{ .soc_id = "EXYNOS5410", .data = &exynos_common_s2r_data },
+	{ .soc_id = "EXYNOS5420", .data = &exynos_common_s2r_data },
+	{ .soc_id = "EXYNOS5440", .data = &exynos_common_s2r_data },
+	{ .soc_id = "EXYNOS5800", .data = &exynos_common_s2r_data },
+};
+
+int __init exynos_s2r_init(void)
+{
+	const struct soc_device_attribute *match;
+
+	match = soc_device_match(exynos_soc_revision);
+
+	if (match)
+		s2r_data = (const struct exynos_s2r_data *) match->data;
+
+	if (!s2r_data)
+		return -ENODEV;
+
+	return 0;
+}
+arch_initcall(exynos_s2r_init);
+
 #if defined(CONFIG_SMP) && defined(CONFIG_ARM_EXYNOS_CPUIDLE)
 static atomic_t cpu1_wakeup = ATOMIC_INIT(0);
 

@@ -253,7 +378,7 @@ static int exynos_cpu0_enter_aftr(void)
 		while (exynos_cpu_power_state(1) != S5P_CORE_LOCAL_PWR_EN)
 			cpu_relax();
 
-		if (soc_is_exynos3250()) {
+		if (of_machine_is_compatible("samsung,exynos3250")) {
 			while (!pmu_raw_readl(S5P_PMU_SPARE2) &&
 			       !atomic_read(&cpu1_wakeup))
 				cpu_relax();

@@ -275,7 +400,7 @@ static int exynos_cpu0_enter_aftr(void)
 
 			call_firmware_op(cpu_boot, 1);
 
-			if (soc_is_exynos3250())
+			if (of_machine_is_compatible("samsung,exynos3250"))
 				dsb_sev();
 			else
 				arch_send_wakeup_ipi_mask(cpumask_of(1));

@@ -287,7 +412,7 @@ static int exynos_cpu0_enter_aftr(void)
 
 static int exynos_wfi_finisher(unsigned long flags)
 {
-	if (soc_is_exynos3250())
+	if (of_machine_is_compatible("samsung,exynos3250"))
 		flush_cache_all();
 	cpu_do_idle();
 

@@ -309,7 +434,7 @@ static int exynos_cpu1_powerdown(void)
 	 */
 	exynos_cpu_power_down(1);
 
-	if (soc_is_exynos3250())
+	if (of_machine_is_compatible("samsung,exynos3250"))
 		pmu_raw_writel(0, S5P_PMU_SPARE2);
 
 	ret = cpu_suspend(0, exynos_wfi_finisher);

Signature · 1 line

2.7.4

We are taking care of setting secondary cpu boot address in exynos_boot_secondary just before sending ipi to secondary CPUs, so we can safely remove this setting from smp_prepare_cpus.

Signed-off-by Pankaj Dubey <[email protected]>

---
 arch/arm/mach-exynos/platsmp.c | 25 -------------------------
 1 file changed, 25 deletions(-)

arch/arm/mach-exynos/platsmp.c +0 -25

index 43eec10..4de254e 100644
@@ -403,8 +403,6 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
 
 static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
 {
-	int i;
-
 	exynos_sysram_init();
 
 	exynos_set_delayed_reset_assertion(true);

@@ -414,29 +412,6 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
 		if (exynos_scu_enable())
 			return;
 	}
-	/*
-	 * Write the address of secondary startup into the
-	 * system-wide flags register. The boot monitor waits
-	 * until it receives a soft interrupt, and then the
-	 * secondary CPU branches to this address.
-	 *
-	 * Try using firmware operation first and fall back to
-	 * boot register if it fails.
-	 */
-	for (i = 1; i < max_cpus; ++i) {
-		unsigned long boot_addr;
-		u32 mpidr;
-		u32 core_id;
-		int ret;
-
-		mpidr = cpu_logical_map(i);
-		core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
-		boot_addr = virt_to_phys(exynos4_secondary_startup);
-
-		ret = exynos_set_boot_addr(core_id, boot_addr);
-		if (ret)
-			break;
-	}
 }
 
 #ifdef CONFIG_HOTPLUG_CPU

Signature · 1 line

2.7.4

Quoted 3 lines

We are taking care of setting secondary cpu boot address in exynos_boot_secondary just before sending ipi to secondary CPUs, so we can safely remove this setting from smp_prepare_cpus.

Indeed setting boot address is doubled. However between them, the power is turned on and Exynos3250 is being restarted.

It would be nice to test it on Exynos3250 (Artik5 or Gear2?) and some of Exynos4 family. Beside that looks good to me, I just want to see some tested-by.

To remove dependency on soc_is_exynosMMMM macros and remove multiple checks for such macros lets refactor code in platsmp.c. This patch introduces new structure as exynos_cpu_info to separate such variable information and routines which vary from one Exynos SoC to other SoC. During smp_prepare_cpus lets match SoC specific information to select appropriate exynos_cpu_info and use it in all other places

Signed-off-by Pankaj Dubey <[email protected]>

---
 arch/arm/mach-exynos/platsmp.c | 244 +++++++++++++++++++++++++++++++++++------
 1 file changed, 210 insertions(+), 34 deletions(-)

arch/arm/mach-exynos/platsmp.c +143 -33

index 4de254e..759a184 100644
@@ -19,6 +19,7 @@
 #include <linux/smp.h>
 #include <linux/io.h>
 #include <linux/of_address.h>
+#include <linux/sys_soc.h>
 #include <linux/soc/samsung/exynos-regs-pmu.h>
 
 #include <asm/cacheflush.h>

@@ -27,12 +28,26 @@
 #include <asm/smp_scu.h>
 #include <asm/firmware.h>
 
-#include <mach/map.h>
-
 #include "common.h"
 
 extern void exynos4_secondary_startup(void);
 
+/*
+ * struct exynos_cpu_info - Exynos CPU related info/operations
+ * @cpu_boot_reg: computes cpu boot address for requested cpu
+ * @cpu_power_down: handles cpu power down routine for requested cpu
+ * @cpu_power_up: handles cpu power up routine for requested cpu
+ * @cpu_restart: handles cpu restart routine for requested cpu
+ */
+struct exynos_cpu_info {
+	void __iomem* (*cpu_boot_reg)(u32 cpu);
+	void (*cpu_power_down)(u32 cpu);
+	void (*cpu_power_up)(u32 cpu);
+	void (*cpu_restart)(u32 cpu);
+};
+
+static const struct exynos_cpu_info *cpu_info;
+
 #ifdef CONFIG_HOTPLUG_CPU
 static inline void cpu_leave_lowpower(u32 core_id)
 {

@@ -81,19 +96,39 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
 }
 #endif /* CONFIG_HOTPLUG_CPU */
 
-/**
- * exynos_core_power_down : power down the specified cpu
+/*
+ * exynos_cpu_power_down - power down the specified cpu
  * @cpu : the cpu to power down
  *
- * Power down the specified cpu. The sequence must be finished by a
- * call to cpu_do_idle()
- *
+ * The sequence must be finished by a call to cpu_do_idle()
  */
 void exynos_cpu_power_down(int cpu)
 {
+	if (cpu_info && cpu_info->cpu_power_down)
+		cpu_info->cpu_power_down(cpu);
+}
+
+/*
+ * exynos_common_cpu_power_down - common cpu power down routine for Exynos SoC
+ * @cpu : the cpu to power down
+ */
+static void exynos_common_cpu_power_down(u32 cpu)
+{
 	u32 core_conf;
 
-	if (cpu == 0 && (soc_is_exynos5420() || soc_is_exynos5800())) {
+	core_conf = pmu_raw_readl(EXYNOS_ARM_CORE_CONFIGURATION(cpu));
+	core_conf &= ~S5P_CORE_LOCAL_PWR_EN;
+	pmu_raw_writel(core_conf, EXYNOS_ARM_CORE_CONFIGURATION(cpu));
+}
+
+/*
+ * exynos5420_cpu_power_down - Exynos5420/Exynos5800 specific cpu power down
+ * routine
+ * @cpu : the cpu to power down
+ */
+static void exynos5420_cpu_power_down(u32 cpu)
+{
+	if (cpu == 0) {
 		/*
 		 * Bypass power down for CPU0 during suspend. Check for
 		 * the SYS_PWR_REG value to decide if we are suspending

@@ -105,24 +140,39 @@ void exynos_cpu_power_down(int cpu)
 			return;
 	}
 
-	core_conf = pmu_raw_readl(EXYNOS_ARM_CORE_CONFIGURATION(cpu));
-	core_conf &= ~S5P_CORE_LOCAL_PWR_EN;
-	pmu_raw_writel(core_conf, EXYNOS_ARM_CORE_CONFIGURATION(cpu));
+	exynos_common_cpu_power_down(cpu);
 }
 
 /**
  * exynos_cpu_power_up : power up the specified cpu
  * @cpu : the cpu to power up
- *
- * Power up the specified cpu
  */
 void exynos_cpu_power_up(int cpu)
 {
+	if (cpu_info && cpu_info->cpu_power_up)
+		cpu_info->cpu_power_up(cpu);
+}
+
+/*
+ * exynos_common_cpu_power_up - common cpu power up routine for Exynos SoC
+ * @cpu : the cpu to power up
+ */
+static void exynos_common_cpu_power_up(u32 cpu)
+{
 	u32 core_conf = S5P_CORE_LOCAL_PWR_EN;
+	pmu_raw_writel(core_conf,
+			EXYNOS_ARM_CORE_CONFIGURATION(cpu));
+}
 
-	if (soc_is_exynos3250())
-		core_conf |= S5P_CORE_AUTOWAKEUP_EN;
+/*
+ * exynos3250_cpu_power_up - Exynos3250 specific cpu power up routine
+ * @cpu : the cpu to power down
+ */
+static void exynos3250_cpu_power_up(u32 cpu)
+{
+	u32 core_conf = S5P_CORE_LOCAL_PWR_EN;
 
+	core_conf |= S5P_CORE_AUTOWAKEUP_EN;
 	pmu_raw_writel(core_conf,
 			EXYNOS_ARM_CORE_CONFIGURATION(cpu));
 }

@@ -130,7 +180,6 @@ void exynos_cpu_power_up(int cpu)
 /**
  * exynos_cpu_power_state : returns the power state of the cpu
  * @cpu : the cpu to retrieve the power state from
- *
  */
 int exynos_cpu_power_state(int cpu)
 {

@@ -189,39 +238,76 @@ int exynos_scu_enable(void)
 	return 0;
 }
 
-static void __iomem *cpu_boot_reg_base(void)
+static inline void __iomem *exynos_cpu_boot_reg(int cpu)
+{
+	if (cpu_info && cpu_info->cpu_boot_reg)
+		return cpu_info->cpu_boot_reg(cpu);
+	return NULL;
+}
+
+static void __iomem *exynos_common_cpu_boot_reg(u32 cpu)
 {
-	if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
-		return pmu_base_addr + S5P_INFORM5;
+	if (!sysram_base_addr)
+		return IOMEM_ERR_PTR(-ENODEV);
+
 	return sysram_base_addr;
 }
 
-static inline void __iomem *cpu_boot_reg(int cpu)
+static void __iomem *exynos4210_cpu_boot_reg(u32 cpu)
 {
 	void __iomem *boot_reg;
 
-	boot_reg = cpu_boot_reg_base();
-	if (!boot_reg)
+	if (!pmu_base_addr)
 		return IOMEM_ERR_PTR(-ENODEV);
-	if (soc_is_exynos4412())
-		boot_reg += 4*cpu;
-	else if (soc_is_exynos5420() || soc_is_exynos5800())
-		boot_reg += 4;
+	boot_reg = pmu_base_addr + S5P_INFORM5;
+
+	return boot_reg;
+}
+
+static void __iomem *exynos4412_cpu_boot_reg(u32 cpu)
+{
+	void __iomem *boot_reg;
+
+	if (!sysram_base_addr)
+		return IOMEM_ERR_PTR(-ENODEV);
+
+	boot_reg = sysram_base_addr;
+	boot_reg += 4*cpu;
+
+	return boot_reg;
+}
+
+static void __iomem *exynos5420_cpu_boot_reg(u32 cpu)
+{
+	void __iomem *boot_reg;
+
+	if (!sysram_base_addr)
+		return IOMEM_ERR_PTR(-ENODEV);
+
+	boot_reg = sysram_base_addr;
+	boot_reg += 4;
+
 	return boot_reg;
 }
 
+/**
+ * exynos_core_restart : restart the specified cpu
+ * @core_id : the cpu to be restarted
+ */
+void exynos_core_restart(u32 core_id)
+{
+	if (cpu_info && cpu_info->cpu_restart)
+		cpu_info->cpu_restart(core_id);
+}
+
 /*
  * Set wake up by local power mode and execute software reset for given core.
- *
  * Currently this is needed only when booting secondary CPU on Exynos3250.
  */
-void exynos_core_restart(u32 core_id)
+static void exynos3250_core_restart(u32 core_id)
 {
 	u32 val;
 
-	if (!of_machine_is_compatible("samsung,exynos3250"))
-		return;
-
 	while (!pmu_raw_readl(S5P_PMU_SPARE2))
 		udelay(10);
 	udelay(10);

@@ -274,7 +360,7 @@ int exynos_set_boot_addr(u32 core_id, unsigned long boot_addr)
 	if (ret && ret != -ENOSYS)
 		goto fail;
 	if (ret == -ENOSYS) {
-		void __iomem *boot_reg = cpu_boot_reg(core_id);
+		void __iomem *boot_reg = exynos_cpu_boot_reg(core_id);
 
 		if (IS_ERR(boot_reg)) {
 			ret = PTR_ERR(boot_reg);

@@ -299,7 +385,7 @@ int exynos_get_boot_addr(u32 core_id, unsigned long *boot_addr)
 	if (ret && ret != -ENOSYS)
 		goto fail;
 	if (ret == -ENOSYS) {
-		void __iomem *boot_reg = cpu_boot_reg(core_id);
+		void __iomem *boot_reg = exynos_cpu_boot_reg(core_id);
 
 		if (IS_ERR(boot_reg)) {
 			ret = PTR_ERR(boot_reg);

@@ -312,13 +398,93 @@ int exynos_get_boot_addr(u32 core_id, unsigned long *boot_addr)
 	return ret;
 }
 
+static const struct exynos_cpu_info exynos3250_cpu_info = {
+	.cpu_boot_reg = exynos_common_cpu_boot_reg,
+	.cpu_power_down = exynos_common_cpu_power_down,
+	.cpu_power_up = exynos3250_cpu_power_up,
+	.cpu_restart = exynos3250_core_restart,
+};
+
+static const struct exynos_cpu_info exynos5420_cpu_info = {
+	.cpu_boot_reg = exynos5420_cpu_boot_reg,
+	.cpu_power_down = exynos5420_cpu_power_down,
+	.cpu_power_up = exynos_common_cpu_power_up,
+};
+
+static const struct exynos_cpu_info exynos4210_cpu_info = {
+	.cpu_boot_reg = exynos4210_cpu_boot_reg,
+	.cpu_power_down = exynos_common_cpu_power_down,
+	.cpu_power_up = exynos_common_cpu_power_up,
+};
+
+static const struct exynos_cpu_info exynos4412_cpu_info = {
+	.cpu_boot_reg = exynos4412_cpu_boot_reg,
+	.cpu_power_down = exynos_common_cpu_power_down,
+	.cpu_power_up = exynos_common_cpu_power_up,
+};

arch/arm/mach-exynos/platsmp.c +39 -0

+		.data = &exynos4210_cpu_info
+	}, {
+		.soc_id = "EXYNOS4210", .revision = "10",
+		.data = &exynos_common_cpu_info
+	}
+};
+
+static const struct of_device_id exynos_pmu_of_device_ids[] __initconst = {
+	{
+		.compatible = "samsung,exynos3250",
+		.data = &exynos3250_cpu_info
+	}, {
+		.compatible = "samsung,exynos4212",
+		.data = &exynos_common_cpu_info
+	}, {
+		.compatible = "samsung,exynos4412",
+		.data = &exynos4412_cpu_info
+	}, {
+		.compatible = "samsung,exynos5250",
+		.data = &exynos_common_cpu_info
+	}, {
+		.compatible = "samsung,exynos5260",
+		.data = &exynos_common_cpu_info
+	}, {
+		.compatible = "samsung,exynos5410",
+		.data = &exynos_common_cpu_info
+	}, {
+		.compatible = "samsung,exynos5420",
+		.data = &exynos5420_cpu_info
+	}, {
+		.compatible = "samsung,exynos5440",
+		.data = &exynos_common_cpu_info
+	}, {
+		.compatible = "samsung,exynos5800",
+		.data = &exynos5420_cpu_info
+	},
+	{ /*sentinel*/ },
+};
+

arch/arm/mach-exynos/platsmp.c +15 -1

+		if (match)
+			cpu_info = (const struct exynos_cpu_info *) match->data;
+	}
+
 	/*
 	 * Set synchronisation state between this boot processor
 	 * and the secondary one

@@ -377,7 +543,7 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
 
 		call_firmware_op(cpu_boot, core_id);
 
-		if (soc_is_exynos3250())
+		if (of_machine_is_compatible("samsung,exynos3250"))
 			dsb_sev();
 		else
 			arch_send_wakeup_ipi_mask(cpumask_of(cpu));

@@ -403,6 +569,16 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
 
 static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
 {
+	const struct of_device_id *match;
+	struct device_node *np;
+
+	np = of_find_matching_node_and_match(NULL,
+			exynos_pmu_of_device_ids, &match);
+	if (!np)
+		pr_err("failed to find supported CPU\n");
+	else
+		cpu_info = (const struct exynos_cpu_info *) match->data;
+
 	exynos_sysram_init();
 
 	exynos_set_delayed_reset_assertion(true);

Signature · 1 line

2.7.4