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sunxi: fix SID read on H3

PATCH New Icenowy Zheng 4 participants 4 messages Dec 19, 2016 – Dec 23, 2016

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Arm (32-bit) Arm sub-architectures Arm/Allwinner sunXi SoC support
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Icenowy Zheng

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#0 lore raw

PATCH 1/1 sunxi: fix SID read on H3

H3 SID controller has some bug, which makes the initial SID value at SUNXI_SID_BASE wrong when boot.

Change the SID retrieve code to call the SID Controller directly on H3, which can get the correct value, and also fix the SID value at SUNXI_SID_BASE, so that it can be used by further operations.

Signed-off-by Icenowy Zheng <[email protected]>
---
 arch/arm/include/asm/arch-sunxi/cpu_sun4i.h |  1 +
 arch/arm/mach-sunxi/cpu_info.c              | 44 +++++++++++++++++++++++++++++
 2 files changed, 45 insertions(+)
arch/arm/include/asm/arch-sunxi/cpu_sun4i.h +1 -0
index 7232f6d927..3c852224e6 100644
@@ -97,6 +97,7 @@
 #if defined(CONFIG_MACH_SUN8I_A83T) || defined(CONFIG_MACH_SUN8I_H3) || \
 defined(CONFIG_MACH_SUN50I)
 /* SID address space starts at 0x01c1400, but e-fuse is at offset 0x200 */
+#define SUNXI_SIDC_BASE			0x01c14000
 #define SUNXI_SID_BASE			0x01c14200
 #else
 #define SUNXI_SID_BASE			0x01c23800
arch/arm/mach-sunxi/cpu_info.c +44 -0

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Signature · 1 line
2.11.0
#1 lore raw

PATCH 1/1 sunxi: fix SID read on H3

Quoted 8 lines · Icenowy Zheng

H3 SID controller has some bug, which makes the initial SID value at SUNXI_SID_BASE wrong when boot.

Change the SID retrieve code to call the SID Controller directly on H3, which can get the correct value, and also fix the SID value at SUNXI_SID_BASE, so that it can be used by further operations.

Signed-off-by Icenowy Zheng <[email protected]>
Acked-by Maxime Ripard <[email protected]>

Thanks,
Maxime

Signature · 10 lines
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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#2 lore raw

PATCH 1/1 sunxi: fix SID read on H3

Quoted 11 lines · Maxime Ripard
Quoted 8 lines · Icenowy Zheng

H3 SID controller has some bug, which makes the initial SID value at SUNXI_SID_BASE wrong when boot.

Change the SID retrieve code to call the SID Controller directly on H3, which can get the correct value, and also fix the SID value at SUNXI_SID_BASE, so that it can be used by further operations.

Signed-off-by Icenowy Zheng <[email protected]>
Acked-by Maxime Ripard <[email protected]>

Applied to u-boot-sunxi/master

thanks!

Signature · 4 lines
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
#3 lore raw

PATCH 1/1 sunxi: fix SID read on H3

In reply to Icenowy Zheng
Quoted 38 lines · On Tue, 20 Dec 2016 02:03:36 +0800 Icenowy Zheng <[email protected]> wrote:

H3 SID controller has some bug, which makes the initial SID value at SUNXI_SID_BASE wrong when boot.

Change the SID retrieve code to call the SID Controller directly on H3, which can get the correct value, and also fix the SID value at SUNXI_SID_BASE, so that it can be used by further operations.

Signed-off-by Icenowy Zheng <[email protected]>
---
 arch/arm/include/asm/arch-sunxi/cpu_sun4i.h |  1 +
 arch/arm/mach-sunxi/cpu_info.c              | 44 +++++++++++++++++++++++++++++
 2 files changed, 45 insertions(+)
arch/arm/include/asm/arch-sunxi/cpu_sun4i.h +1 -0
index 7232f6d927..3c852224e6 100644
@@ -97,6 +97,7 @@
 #if defined(CONFIG_MACH_SUN8I_A83T) || defined(CONFIG_MACH_SUN8I_H3) || \
 defined(CONFIG_MACH_SUN50I)
 /* SID address space starts at 0x01c1400, but e-fuse is at offset 0x200 */
+#define SUNXI_SIDC_BASE			0x01c14000
 #define SUNXI_SID_BASE			0x01c14200
 #else
 #define SUNXI_SID_BASE			0x01c23800
arch/arm/mach-sunxi/cpu_info.c +5 -0
index 76b6719d99..f1f6fd5ba4 100644
@@ -99,10 +99,54 @@ int print_cpuinfo(void)
 }
 #endif
 
+#ifdef CONFIG_MACH_SUN8I_H3
+
+#define SIDC_PRCTL 0x40
+#define SIDC_RDKEY 0x60
+

arch/arm/mach-sunxi/cpu_info.c int print_cpuinfo(void) · line 116

Quoted 10 lines
arch/arm/mach-sunxi/cpu_info.c +10 -0
+#define SIDC_OP_LOCK 0xAC
+
+uint32_t sun8i_efuse_read(uint32_t offset)
+{
+	uint32_t reg_val;
+
+	reg_val = readl(SUNXI_SIDC_BASE + SIDC_PRCTL);
+	reg_val &= ~(((0x1ff) << 16) | 0x3);
+	reg_val |= (offset << 16);
+	writel(reg_val, SUNXI_SIDC_BASE + SIDC_PRCTL);

Normally clrsetbits_le32() is used for this kind of code in U-Boot.

arch/arm/mach-sunxi/cpu_info.c int print_cpuinfo(void) · line 125

Quoted 9 lines
arch/arm/mach-sunxi/cpu_info.c +9 -0
+
+	reg_val &= ~(((0xff) << 8) | 0x3);
+	reg_val |= (SIDC_OP_LOCK << 8) | 0x2;
+	writel(reg_val, SUNXI_SIDC_BASE + SIDC_PRCTL);
+
+	while (readl(SUNXI_SIDC_BASE + SIDC_PRCTL) & 0x2);
+
+	reg_val &= ~(((0x1ff) << 16) | ((0xff) << 8) | 0x3);
+	writel(reg_val, SUNXI_SIDC_BASE + SIDC_PRCTL);

Same here.

Quoted 17 lines
arch/arm/mach-sunxi/cpu_info.c +13 -0
+
+	reg_val = readl(SUNXI_SIDC_BASE + SIDC_RDKEY);
+	return reg_val;
+}
+#endif
+
 int sunxi_get_sid(unsigned int *sid)
 {
 #ifdef CONFIG_AXP221_POWER
 	return axp_get_sid(sid);
+#elif defined CONFIG_MACH_SUN8I_H3
+	/*
+	 * H3 SID controller has a bug, which makes the initial value of
+	 * SUNXI_SID_BASE at boot wrong.
+	 * Read the value directly from SID controller, in order to get
+	 * the correct value, and also refresh the wrong value at
+	 * SUNXI_SID_BASE.

arch/arm/mach-sunxi/cpu_info.c int print_cpuinfo(void) · line 152

Quoted 10 lines
arch/arm/mach-sunxi/cpu_info.c +7 -0
+	 */
+	int i;
+
+	for (i = 0; i< 4; i++)
+		sid[i] = sun8i_efuse_read(i * 4);
+
+	return 0;
 #elif defined SUNXI_SID_BASE
 	int i;

Thanks for this workaround. This problem has buggered some people since a while ago. It's good that you took time to investigate and fix it.

Signature · 2 lines
Best regards,
Siarhei Siamashka