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MIPS: Loongson: Add OSC support

PATCH New 谢致邦 (XIE Zhibang) 1 participant 1 message Jan 5, 2017

Subsystems (3)
MIPS Common clk MIPS/LOONGSON1 architecture
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谢致邦 (XIE Zhibang)

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PATCH 1/1 MIPS: Loongson: Add OSC support

Loongson 1B can connect to 25MHz or 33MHz OSC.

Signed-off-by 谢致邦 (XIE Zhibang) <[email protected]>
---
 arch/mips/loongson32/Kconfig           | 15 +++++++++++++++
 arch/mips/loongson32/common/platform.c |  8 ++++++++
 drivers/clk/loongson1/clk-loongson1b.c |  6 +++++-
 3 files changed, 28 insertions(+), 1 deletion(-)
arch/mips/loongson32/Kconfig +15 -0
index 3c0c2f20..1893e08b 100644
@@ -19,6 +19,21 @@ config LOONGSON1_LS1B
 	select USE_GENERIC_EARLY_PRINTK_8250
 	select COMMON_CLK
 
+if LOONGSON1_LS1B
+
+choice
+	prompt "OSC Type"
+	default OSC_33M
+
+config OSC_33M
+	bool "33 MHz OSC"
+
+config OSC_25M
+	bool "25 MHz OSC"
+endchoice
+
+endif
+
 config LOONGSON1_LS1C
 	bool "Loongson LS1C board"
 	select CEVT_R4K if !MIPS_EXTERNAL_TIMER
arch/mips/loongson32/common/platform.c +8 -0
index f9d877d4..683c8469 100644
@@ -83,8 +83,16 @@ void __init ls1x_rtc_set_extclk(struct platform_device *pdev)
 static struct plat_ls1x_cpufreq ls1x_cpufreq_pdata = {
 	.clk_name	= "cpu_clk",
 	.osc_clk_name	= "osc_clk",
+#if defined(CONFIG_LOONGSON1_LS1C)
+	.max_freq	= 300 * 1000,
+	.min_freq	= 24 * 1000,
+#elif defined(CONFIG_OSC_25M)
+	.max_freq	= 200 * 1000,
+	.min_freq	= 25 * 1000,
+#else
 	.max_freq	= 266 * 1000,
 	.min_freq	= 33 * 1000,
+#endif
 };
 
 struct platform_device ls1x_cpufreq_pdev = {
drivers/clk/loongson1/clk-loongson1b.c +5 -1
index f36a97e9..225b53e7 100644
@@ -15,7 +15,11 @@
 #include <loongson1.h>
 #include "clk.h"
 
+#if defined(CONFIG_OSC_25M)
+#define OSC		(25 * 1000000)
+#else
 #define OSC		(33 * 1000000)
+#endif
 #define DIV_APB		2
 
 static DEFINE_SPINLOCK(_lock);

@@ -48,7 +52,7 @@ void __init ls1x_clk_init(void)
 	hw = clk_hw_register_fixed_rate(NULL, "osc_clk", NULL, 0, OSC);
 	clk_hw_register_clkdev(hw, "osc_clk", NULL);
 
-	/* clock derived from 33 MHz OSC clk */
+	/* clock derived from OSC clk */
 	hw = clk_hw_register_pll(NULL, "pll_clk", "osc_clk",
 				 &ls1x_pll_clk_ops, 0);
 	clk_hw_register_clkdev(hw, "pll_clk", NULL);
Signature · 1 line
2.11.0