arm64: Add DTS support for FSL's LS1012A SoC

LS1012A features an advanced 64-bit ARM v8 CortexA53 processor with 32 KB of parity protected L1-I cache, 32 KB of ECC protected L1-D cache, as well as 256 KB of ECC protected L2 cache.

Features summary
One 64-bit ARM-v8 Cortex-A53 core with the following capabilities
- Arranged as a cluster of one core supporting a 256 KB L2 cache with ECC protection
- Speed up to 800 MHz
- Parity-protected 32 KB L1 instruction cache and 32 KB L1 data cache
- Neon SIMD engine
- ARM v8 cryptography extensions
One 16-bit DDR3L SDRAM memory controller
ARM core-link CCI-400 cache coherent interconnect
Cryptography acceleration (SEC)
One Configurable x3 SerDes
One PCI Express Gen2 controller, supporting x1 operation
One serial ATA (SATA Gen 3.0) controller
One USB 3.0/2.0 controller with integrated PHY

Following levels of DTSI/DTS files have been created for the LS1012A
SoC family:

- fsl-ls1012a.dtsi:
DTS-Include file for FSL LS1012A SoC.

- fsl-ls1012a-frdm.dts:
DTS file for FSL LS1012A FRDM board.

- fsl-ls1012a-qds.dts:
DTS file for FSL LS1012A QDS board.

- fsl-ls1012a-rdb.dts:
DTS file for FSL LS1012A RDB board.

---
Changes in v4: Incorporated Shawn's comments
- Convert "regulator_3p3v: regulator" to "reg_3p3v: regulator-3p3v"
- Add "status = "disabled"" property in sata and duart nodes

Changes in v3: Incorporated Leo's comments
- Change PPI interrupts to IRQ_TYPE_LEVEL_LOW and
- SPI interrupts to IRQ_TYPE_LEVEL_HIGH

Changes in v2: Incorporated Shawn's comments
- Brief introduction of the SoC in commit message
- Alphabetic ordering of labeled nodes
- Better naming to be used for regulator node
- Make timer node's comments more readable
- Sort nodes with unit-address in order of the address

 arch/arm64/boot/dts/freescale/Makefile             |   3 +
 arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts | 115 ++++++++++
 arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts  | 128 +++++++++++
 arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts  |  59 +++++
 arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi     | 247 +++++++++++++++++++++
 5 files changed, 552 insertions(+)
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi

index 6602718..39db645 100644
@@ -1,3 +1,6 @@
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds.dtb

1.9.1

I changed subject a bit as below and applied patch.

arm64: dts: Add support for FSL's LS1012A SoC

Shawn

Thanks Shawn

Regards
Harry++