ARM: dts: aspeed-g5: Add mailbox and LPC control node

Also add the reserved-memory node needed by the LPC control driver.

Signed-off-by Cyril Bur <[email protected]>

---
 arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts +21 -1

index 0adf6e7e284c..cb43a597de5a 100644
@@ -20,6 +20,17 @@
                reg = <0x80000000 0x40000000>;
        };
 
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               flash_memory: region@94000000 {
+                       no-map;
+                       reg = <0x94000000 0x04000000>; /* 64M */
+               };
+       };
+
        onewire0 {
                compatible = "w1-gpio";
                gpios = <&gpio ASPEED_GPIO(H, 0) GPIO_ACTIVE_HIGH>;

@@ -98,6 +109,16 @@
        };
 };
 
+&lpc_ctrl {
+       status = "okay";
+       memory-region = <&flash_memory>;
+       flash = <&spi1>;
+};
+
+&mbox {
+       status = "okay";
+};
+
 &uart5 {
        status = "okay";
 };
--

2.11.0

Also add the reserved-memory node needed by the LPC control driver.

Signed-off-by Cyril Bur <[email protected]>

---
 arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts +21 -1

index 9badf3e94599..c7c1917f2d89 100644
@@ -19,6 +19,17 @@
        memory {
                reg = <0x80000000 0x40000000>;
        };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               flash_memory: region@94000000 {
+                       no-map;
+                       reg = <0x94000000 0x04000000>; /* 64M */
+               };
+       };
 };
 
 &fmc {

@@ -44,6 +55,16 @@
        };
 };
 
+&lpc_ctrl {
+       status = "okay";
+       memory-region = <&flash_memory>;
+       flash = <&spi1>;
+};
+
+&mbox {
+       status = "okay";
+};
+
 &uart1 {
        /* Rear RS-232 connector */
        status = "okay";
--

2.11.0

Both these devices exist on the LPC bus these nodes are children of a new LPC bus node.

Signed-off-by Cyril Bur <[email protected]>

---
v2:
Add the core to to the dtsi
Enable them in the platforms that want them in subsequent patches Remove the compatible property for the reserved-memory nodes
All my understanding seems to indicate that this is how it should be. However i've had problems with drivers probing on other systems, hopefully these problems will turn out to have been unrelated.

 arch/arm/boot/dts/aspeed-g5.dtsi | 38 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

arch/arm/boot/dts/aspeed-g5.dtsi +38 -1

index d6ff41ee6c58..1ce07d0ed431 100644
@@ -89,6 +89,44 @@
                        };
                };
 
+               lpc: lpc@1e789000 {
+                       compatible = "aspeed,ast2500-lpc", "simple-mfd";
+                       reg = <0x1e789000 0x1000>;
+
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x0 0x1e789000 0x1000>;
+
+                       lpc_bmc: lpc-bmc@0 {
+                               compatible = "aspeed,ast2500-lpc-bmc";
+                               reg = <0x0 0x80>;
+                       };
+
+                       lpc_host: lpc-host@80 {
+                               compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
+                               reg = <0x80 0x1e0>;
+                               reg-io-width = <4>;
+
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0x0 0x80 0x1e0>;
+
+                               lpc_ctrl: lpc-ctrl@0 {
+                                       compatible = "aspeed,ast2500-lpc-ctrl";
+                                       reg = <0x0 0x80>;
+                                       status = "disabled"
+                               };
+
+                               mbox: mbox@180 {
+                                       compatible = "aspeed,ast2500-mbox";
+                                       reg = <0x180 0x5c>;
+                                       interrupts = <46>;
+                                       #mbox-cells = <1>;
+                                       status = "disabled"
+                               };
+                       };
+               };
+
                vic: interrupt-controller@1e6c0080 {
                        compatible = "aspeed,ast2400-vic";
                        interrupt-controller;
--

2.11.0

Quoted 4 lines · Cyril Bur

Both these devices exist on the LPC bus these nodes are children of a new LPC bus node.

Signed-off-by Cyril Bur <[email protected]>

Applied to dev4-.7.