Add QorIQ LS2088A platform support
Subsystems (2)
v4 cover Add QorIQ LS2088A platform support
This patchset adds support for the QorIQ LS2088A SoC.
LS2088A SoC is similar to LS2080A SoC with a few differences like it has A72 cores.
This patchset
- reorganize LS2088A DTS/DTSI for code reuseability
- adds LS2088A device dtsi and dts files.
Abhimanyu Saini (3):
dt-bindings: Add compatible for LS2088A QDS and RDB board
arm64: dts: freescale: ls2080a: Split devicetree for code resuability
arm64: dts: freescale: ls2088a: Add DTS support for FSL's LS2088A SoC
Changes for v4:
- Incorporated Shawn's comments by reorganizing DTSI, moving all #include to the top and,
- add missing files
Changes for v3:
- rename dts/dtsi files
Changes for v2:
- reorganize LS2088A device tree to use common nodes from LS2080A device trees.
- Both LS2080A and LS2088A have same hardware controllers, so separate dt-binding patches for pcie, gpio, dspi, qspi are not required.
Documentation/devicetree/bindings/arm/fsl.txt | 11 + arch/arm64/boot/dts/freescale/Makefile | 2 + arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts | 155 +--- arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts | 110 +-- arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 859 ++------------------- arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts | 65 ++ arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts | 65 ++ arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 153 ++++ arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi | 196 +++++ arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 151 ++++ arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 753 ++++++++++++++++++ 11 files changed, 1486 insertions(+), 1034 deletions(-) create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
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PATCH v4 1/3 dt-bindings: Add compatible for LS2088A QDS and RDB board
--- Documentation/devicetree/bindings/arm/fsl.txt | 11 +++++++++++ 1 file changed, 11 insertions(+)
Documentation/devicetree/bindings/arm/fsl.txt +11 -0
@@ -179,3 +179,14 @@ LS2080A ARMv8 based RDB Board Required root node properties: - compatible = "fsl,ls2080a-rdb", "fsl,ls2080a"; +LS2088A SoC +Required root node properties: + - compatible = "fsl,ls2088a"; + +LS2088A ARMv8 based QDS Board +Required root node properties: + - compatible = "fsl,ls2088a-qds", "fsl,ls2088a"; + +LS2088A ARMv8 based RDB Board +Required root node properties: + - compatible = "fsl,ls2088a-rdb", "fsl,ls2088a";
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PATCH v4 2/3 arm64: dts: freescale: ls2080a: Split devicetree for code resuability
In reply to a message not in the archiveLS2088A and LS2080A are similar SoCs with a few differences like ARM cores etc.
Reorganize the LS2080A device tree to move the common nodes to:
- fsl-ls208xa.dtsi
- fsl-ls208xa-rdb.dtsi
- fsl-ls208xa-qds.dtsi
---
Changes for v4:
- Incorporated Shawn's comments by reorganizing DTSI, moving all #include to the top and,
- add missing files
Changes for v3:
- rename dts/dtsi files
arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts | 155 +--- arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts | 110 +-- arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 859 ++------------------- arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi | 196 +++++ arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 151 ++++ arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 753 ++++++++++++++++++ 6 files changed, 1190 insertions(+), 1034 deletions(-) create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts +3 -152
@@ -1,8 +1,9 @@ /* * Device Tree file for Freescale LS2080a QDS Board. * - * Copyright (C) 2015, Freescale Semiconductor + * Copyright (C) 2015-17, Freescale Semiconductor * + * Abhimanyu Saini <[email protected]> * Bhupesh Sharma <[email protected]> * * This file is dual-licensed: you can use it either under the terms
@@ -47,6 +48,7 @@ /dts-v1/; #include "fsl-ls2080a.dtsi" +#include "fsl-ls208xa-qds.dtsi" / { model = "Freescale Layerscape 2080a QDS Board";
@@ -61,154 +63,3 @@ stdout-path = "serial0:115200n8"; }; }; - -&esdhc { - status = "okay"; -}; - -&ifc { - status = "okay"; - #address-cells = <2>; - #size-cells = <1>; - ranges = <0x0 0x0 0x5 0x80000000 0x08000000 - 0x2 0x0 0x5 0x30000000 0x00010000 - 0x3 0x0 0x5 0x20000000 0x00010000>; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x8000000>; - bank-width = <2>; - device-width = <1>; - }; - - nand@2,0 { - compatible = "fsl,ifc-nand"; - reg = <0x2 0x0 0x10000>; - }; - - cpld@3,0 { - reg = <0x3 0x0 0x10000>; - compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis"; - }; -}; - -&i2c0 { - status = "okay"; - pca9547@77 { - compatible = "nxp,pca9547"; - reg = <0x77>; - #address-cells = <1>; - #size-cells = <0>; - i2c@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x00>; - rtc@68 { - compatible = "dallas,ds3232"; - reg = <0x68>; - }; - }; - - i2c@2 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x02>; - - ina220@40 { - compatible = "ti,ina220"; - reg = <0x40>; - shunt-resistor = <500>; - }; - - ina220@41 { - compatible = "ti,ina220"; - reg = <0x41>; - shunt-resistor = <1000>; - }; - }; - - i2c@3 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x3>; - - adt7481@4c { - compatible = "adi,adt7461"; - reg = <0x4c>; - }; - }; - }; -}; - -&i2c1 { - status = "disabled"; -}; - -&i2c2 { - status = "disabled"; -}; - -&i2c3 { - status = "disabled"; -}; - -&dspi { - status = "okay"; - dflash0: n25q128a { - #address-cells = <1>; - #size-cells = <1>; - compatible = "st,m25p80"; - spi-max-frequency = <3000000>; - reg = <0>; - }; - dflash1: sst25wf040b { - #address-cells = <1>; - #size-cells = <1>; - compatible = "st,m25p80"; - spi-max-frequency = <3000000>; - reg = <1>; - }; - dflash2: en25s64 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "st,m25p80"; - spi-max-frequency = <3000000>; - reg = <2>; - }; -}; - -&qspi { - status = "okay"; - flash0: s25fl256s1@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "st,m25p80"; - spi-max-frequency = <20000000>; - reg = <0>; - }; - flash2: s25fl256s1@2 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "st,m25p80"; - spi-max-frequency = <20000000>; - reg = <0>; - }; -}; - -&sata0 { - status = "okay"; -}; - -&sata1 { - status = "okay"; -}; - -&usb0 { - status = "okay"; -}; - -&usb1 { - status = "okay"; -};
arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts +3 -107
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arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi +84 -775
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arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi new file +196 -0
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arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi new file +151 -0
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arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi new file +753 -0
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PATCH v4 3/3 arm64: dts: freescale: ls2088a: Add DTS support for FSL's LS2088A SoC
In reply to a message not in the archiveThis patch adds the device tree support for FSL LS2088A SoC based on ARMv8 architecture.
Following levels of DTSI/DTS files have been created for the LS2088A SoC family:
- fsl-ls2088a.dtsi:
DTS-Include file for FSL LS2088A SoC.
- fsl-ls2088a-qds.dts:
DTS file for FSL LS2088A QDS board.
- fsl-ls2088a-rdb.dts:
DTS file for FSL LS2088A RDB board.
---
Changes for v4:
- Incorporated Shawn's comments by reorganizing DTSI, moving all include definations to the top
- add missing files
Changes for v2:
- reorganize LS2088A device tree to use common nodes from LS2080A device trees.
arch/arm64/boot/dts/freescale/Makefile | 2 + arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts | 65 +++++++++ arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts | 65 +++++++++ arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 153 ++++++++++++++++++++++ 4 files changed, 285 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
arch/arm64/boot/dts/freescale/Makefile +2 -0
@@ -5,6 +5,8 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb always := $(dtb-y) subdir-y := $(dts-dirs)
arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts new file +65 -0
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arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts new file +65 -0
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arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi new file +153 -0
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PATCH v4 3/3 arm64: dts: freescale: ls2088a: Add DTS support for FSL's LS2088A SoC
Quoted 94 lines · Abhimanyu Saini
This patch adds the device tree support for FSL LS2088A SoC based on ARMv8 architecture.
Following levels of DTSI/DTS files have been created for the LS2088A SoC family:
-
fsl-ls2088a.dtsi:
DTS-Include file for FSL LS2088A SoC.-
fsl-ls2088a-qds.dts:
DTS file for FSL LS2088A QDS board.-
fsl-ls2088a-rdb.dts:
DTS file for FSL LS2088A RDB board.Signed-off-by Priyanka Jain <[email protected]>Signed-off-by Ashish Kumar <[email protected]>Signed-off-by Abhimanyu Saini <[email protected]>---
Changes for v4:
- Incorporated Shawn's comments by reorganizing DTSI, moving all include definations to the top
- add missing files
Changes for v2:
- reorganize LS2088A device tree to use common nodes from LS2080A device trees.arch/arm64/boot/dts/freescale/Makefile | 2 + arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts | 65 +++++++++ arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts | 65 +++++++++ arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 153 ++++++++++++++++++++++ 4 files changed, 285 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsiarch/arm64/boot/dts/freescale/Makefile +2
-0@@ -5,6 +5,8 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb always := $(dtb-y) subdir-y := $(dts-dirs)arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts new file +39
-0@@ -0,0 +1,65 @@ +/* + * Device Tree file for Freescale LS2088A QDS Board. + * + * Copyright (C) 2016-17, Freescale Semiconductor + * + * Abhimanyu Saini <[email protected]> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPLv2 or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts line 49
Quoted 10 lines
arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts new file +10
-0+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "fsl-ls2088a.dtsi"
Shouldn't you include fsl-ls208xa-qds.dtsi here as well?
Shawn
Quoted 249 lines
arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts new file +16
-0+ +/ { + model = "Freescale Layerscape 2088A QDS Board"; + compatible = "fsl,ls2088a-qds", "fsl,ls2088a"; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +#include "fsl-ls208xa-qds.dtsi"arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts new file +65
-0@@ -0,0 +1,65 @@ +/* + * Device Tree file for Freescale LS2088A RDB Board. + * + * Copyright (C) 2016-17, Freescale Semiconductor + * + * Abhimanyu Saini <[email protected]> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPLv2 or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "fsl-ls2088a.dtsi" + +/ { + model = "Freescale Layerscape 2088A RDB Board"; + compatible = "fsl,ls2088a-rdb", "fsl,ls2088a"; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + }; + + chosen { + stdout-path = "serial1:115200n8"; + }; +}; + +#include "fsl-ls208xa-rdb.dtsi"arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi new file +153
-0@@ -0,0 +1,153 @@ +/* + * Device Tree Include file for Freescale Layerscape-2088A family SoC. + * + * Copyright (C) 2016-17, Freescale Semiconductor + * + * Abhimanyu Saini <[email protected]> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPLv2 or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "fsl-ls208xa.dtsi" + +&cpu { + cpu0: cpu at 0 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x0>; + clocks = <&clockgen 1 0>; + next-level-cache = <&cluster0_l2>; + #cooling-cells = <2>; + }; + + cpu1: cpu at 1 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x1>; + clocks = <&clockgen 1 0>; + next-level-cache = <&cluster0_l2>; + }; + + cpu2: cpu at 100 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x100>; + clocks = <&clockgen 1 1>; + next-level-cache = <&cluster1_l2>; + #cooling-cells = <2>; + }; + + cpu3: cpu at 101 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x101>; + clocks = <&clockgen 1 1>; + next-level-cache = <&cluster1_l2>; + }; + + cpu4: cpu at 200 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x200>; + clocks = <&clockgen 1 2>; + next-level-cache = <&cluster2_l2>; + #cooling-cells = <2>; + }; + + cpu5: cpu at 201 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x201>; + clocks = <&clockgen 1 2>; + next-level-cache = <&cluster2_l2>; + }; + + cpu6: cpu at 300 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x300>; + clocks = <&clockgen 1 3>; + next-level-cache = <&cluster3_l2>; + #cooling-cells = <2>; + }; + + cpu7: cpu at 301 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x301>; + clocks = <&clockgen 1 3>; + next-level-cache = <&cluster3_l2>; + }; + + cluster0_l2: l2-cache0 { + compatible = "cache"; + }; + + cluster1_l2: l2-cache1 { + compatible = "cache"; + }; + + cluster2_l2: l2-cache2 { + compatible = "cache"; + }; + + cluster3_l2: l2-cache3 { + compatible = "cache"; + }; +}; + +&pcie1 { + ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000 + 0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>; +}; + +&pcie2 { + ranges = <0x81000000 0x0 0x00000000 0x28 0x00010000 0x0 0x00010000 + 0x82000000 0x0 0x40000000 0x28 0x40000000 0x0 0x40000000>; +}; + +&pcie3 { + ranges = <0x81000000 0x0 0x00000000 0x30 0x00010000 0x0 0x00010000 + 0x82000000 0x0 0x40000000 0x30 0x40000000 0x0 0x40000000>; +}; + +&pcie4 { + ranges = <0x81000000 0x0 0x00000000 0x38 0x00010000 0x0 0x00010000 + 0x82000000 0x0 0x40000000 0x38 0x40000000 0x0 0x40000000>; +};Signature · 1 line
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