x86/microcode changes for v4.11

Linus,

Please pull the latest x86-microcode-for-linus git tree from:

git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86-microcode-for-linus

# HEAD: f26483eaedec39b09b1f2bdfc3f0d18f86764327 Merge branch 'x86/urgent' into x86/microcode, to resolve conflicts

The main changes are further simplification and unification of the code between the AMD and Intel microcode loaders, plus other simplifications - by Borislav Petkov.

Thanks,

Ingo

------------------>
Borislav Petkov (15):
x86/MSR: Carve out bare minimum accessors x86/microcode: Convert to bare minimum MSR accessors x86/microcode/AMD: Clean up find_equiv_id() x86/microcode/AMD: Shorten function parameter's name x86/microcode/AMD: Extend the container struct x86/microcode/AMD: Rework container parsing x86/microcode: Decrease CPUID use x86/microcode/AMD: Get rid of global this_equiv_id x86/microcode/AMD: Use find_microcode_in_initrd() x86/microcode: Remove local vendor variable x86/microcode/AMD: Check patch level only on the BSP x86/microcode/AMD: Unify load_ucode_amd_ap() x86/microcode/AMD: Simplify saving from initrd x86/microcode/AMD: Remove AP scanning optimization x86/microcode/AMD: Remove struct cont_desc.eq_id

 arch/x86/include/asm/apic.h          |   2 +-
 arch/x86/include/asm/microcode.h     |   9 +-
 arch/x86/include/asm/microcode_amd.h |   2 -
 arch/x86/include/asm/msr.h           |  51 ++--
 arch/x86/kernel/cpu/microcode/amd.c  | 501 +++++++++++------------------------
 arch/x86/kernel/cpu/microcode/core.c |  81 ++++--
 6 files changed, 249 insertions(+), 397 deletions(-)

index 0c5fbc68e82d..eff8e36aaf72 100644
@@ -195,7 +195,7 @@ static inline void native_apic_msr_write(u32 reg, u32 v)
 
 static inline void native_apic_msr_eoi_write(u32 reg, u32 v)
 {
-	wrmsr_notrace(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK, 0);
+	__wrmsr(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK, 0);
 }
 
 static inline u32 native_apic_msr_read(u32 reg)

index 2266f864b747..daadeeea00b1 100644
@@ -7,18 +7,17 @@
 
 #define native_rdmsr(msr, val1, val2)			\
 do {							\
-	u64 __val = native_read_msr((msr));		\
+	u64 __val = __rdmsr((msr));			\
 	(void)((val1) = (u32)__val);			\
 	(void)((val2) = (u32)(__val >> 32));		\
 } while (0)
 
 #define native_wrmsr(msr, low, high)			\
-	native_write_msr(msr, low, high)
+	__wrmsr(msr, low, high)
 
 #define native_wrmsrl(msr, val)				\
-	native_write_msr((msr),				\
-			 (u32)((u64)(val)),		\
-			 (u32)((u64)(val) >> 32))
+	__wrmsr((msr), (u32)((u64)(val)),		\
+		       (u32)((u64)(val) >> 32))
 
 struct ucode_patch {
 	struct list_head plist;

index 3e3e20be829a..3d57009e168b 100644
@@ -54,6 +54,4 @@ static inline int __init
 save_microcode_in_initrd_amd(unsigned int family) { return -EINVAL; }
 void reload_ucode_amd(void) {}
 #endif
-
-extern bool check_current_patch_level(u32 *rev, bool early);
 #endif /* _ASM_X86_MICROCODE_AMD_H */