Series short description
Subsystems (2)
v2 cover Series short description
The following series:
- Move verbose init messages to debug mode
- Update the queue pointers in the event of an error
- Simplify buffer management and eliminate an unused option
---
Gary R Hook (3):
crypto: ccp - Add SHA-2 384- and 512-bit support
crypto: ccp - Enable support for AES GCM on v5 CCPs
crypto: ccp - Enable 3DES function on v5 CCPs
drivers/crypto/ccp/Makefile | 2 drivers/crypto/ccp/ccp-crypto-aes-galois.c | 257 ++++++++++++++ drivers/crypto/ccp/ccp-crypto-des3.c | 254 ++++++++++++++ drivers/crypto/ccp/ccp-crypto-main.c | 22 + drivers/crypto/ccp/ccp-crypto-sha.c | 22 + drivers/crypto/ccp/ccp-crypto.h | 44 ++ drivers/crypto/ccp/ccp-dev-v3.c | 1 drivers/crypto/ccp/ccp-dev-v5.c | 56 +++ drivers/crypto/ccp/ccp-dev.h | 15 + drivers/crypto/ccp/ccp-ops.c | 522 ++++++++++++++++++++++++++++ include/linux/ccp.h | 68 ++++ 11 files changed, 1257 insertions(+), 6 deletions(-) create mode 100644 drivers/crypto/ccp/ccp-crypto-aes-galois.c create mode 100644 drivers/crypto/ccp/ccp-crypto-des3.c
PATCH v2 1/3 crypto: ccp - Add SHA-2 384- and 512-bit support
Incorporate 384-bit and 512-bit hashing for a version 5 CCP device
--- drivers/crypto/ccp/ccp-crypto-sha.c | 22 +++++++++++ drivers/crypto/ccp/ccp-crypto.h | 8 ++-- drivers/crypto/ccp/ccp-ops.c | 72 +++++++++++++++++++++++++++++++++++ include/linux/ccp.h | 2 + 4 files changed, 101 insertions(+), 3 deletions(-)
drivers/crypto/ccp/ccp-crypto-sha.c +22 -0
@@ -146,6 +146,12 @@ static int ccp_do_sha_update(struct ahash_request *req, unsigned int nbytes,case CCP_SHA_TYPE_256 : rctx->cmd.u.sha.ctx_len =SHA256_DIGEST_SIZE ;break ; +case CCP_SHA_TYPE_384 : + rctx->cmd.u.sha.ctx_len =SHA384_DIGEST_SIZE ; +break ; +case CCP_SHA_TYPE_512 : + rctx->cmd.u.sha.ctx_len =SHA512_DIGEST_SIZE ; +break ;default :/* Should never get here */ break ;
@@ -393,6 +399,22 @@ struct ccp_sha_def { .digest_size = SHA256_DIGEST_SIZE, .block_size = SHA256_BLOCK_SIZE, }, + { + .version = CCP_VERSION(5, 0), + .name = "sha384", + .drv_name = "sha384-ccp", + .type = CCP_SHA_TYPE_384, + .digest_size = SHA384_DIGEST_SIZE, + .block_size = SHA384_BLOCK_SIZE, + }, + { + .version = CCP_VERSION(5, 0), + .name = "sha512", + .drv_name = "sha512-ccp", + .type = CCP_SHA_TYPE_512, + .digest_size = SHA512_DIGEST_SIZE, + .block_size = SHA512_BLOCK_SIZE, + }, }; static int ccp_register_hmac_alg(struct list_head *head,
drivers/crypto/ccp/ccp-crypto.h +5 -3
@@ -137,9 +137,11 @@ struct ccp_aes_cmac_exp_ctx {u8 buf[AES_BLOCK_SIZE ]; }; -/***** SHA related defines *****/ -#define MAX_SHA_CONTEXT_SIZE SHA256_DIGEST_SIZE -#define MAX_SHA_BLOCK_SIZE SHA256_BLOCK_SIZE +/* SHA-related defines +* These values must be large enough to accommodate any variant +*/ +#define MAX_SHA_CONTEXT_SIZE SHA512_DIGEST_SIZE +#define MAX_SHA_BLOCK_SIZE SHA512_BLOCK_SIZEstruct ccp_sha_ctx {struct scatterlist opad_sg;
drivers/crypto/ccp/ccp-ops.c +72 -0
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include/linux/ccp.h +2 -0
@@ -249,6 +249,8 @@ enum ccp_sha_type {CCP_SHA_TYPE_1 =1 ,CCP_SHA_TYPE_224 ,CCP_SHA_TYPE_256 , +CCP_SHA_TYPE_384 , +CCP_SHA_TYPE_512 , CCP_SHA_TYPE__LAST, };
PATCH v2 2/3 crypto: ccp - Enable support for AES GCM on v5 CCPs
In reply to Gary R HookA version 5 device provides the primitive commands required for AES GCM. This patch adds support for en/decryption.
--- drivers/crypto/ccp/Makefile | 1 drivers/crypto/ccp/ccp-crypto-aes-galois.c | 257 ++++++++++++++++++++++++++++ drivers/crypto/ccp/ccp-crypto-main.c | 12 + drivers/crypto/ccp/ccp-crypto.h | 14 ++ drivers/crypto/ccp/ccp-dev-v5.c | 2 drivers/crypto/ccp/ccp-dev.h | 1 drivers/crypto/ccp/ccp-ops.c | 252 +++++++++++++++++++++++++++ include/linux/ccp.h | 9 + 8 files changed, 548 insertions(+) create mode 100644 drivers/crypto/ccp/ccp-crypto-aes-galois.c
drivers/crypto/ccp/Makefile +1 -0
@@ -12,4 +12,5 @@ ccp-crypto-objs := ccp-crypto-main.o \ ccp-crypto-aes.o \ ccp-crypto-aes-cmac.o \ ccp-crypto-aes-xts.o \ + ccp-crypto-aes-galois.o \ ccp-crypto-sha.o
drivers/crypto/ccp/ccp-crypto-aes-galois.c new file +257 -0
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drivers/crypto/ccp/ccp-crypto-main.c +12 -0
@@ -36,6 +36,7 @@/* List heads for the supported algorithms */ static LIST_HEAD (hash_algs);static LIST_HEAD (cipher_algs); +static LIST_HEAD (aead_algs);/* For any tfm, requests for that tfm must be returned on the order * received. With multiple queues available, the CCP can process more
@@ -335,6 +336,10 @@ static int ccp_register_algs(void) ret =ccp_register_aes_xts_algs (&cipher_algs);if (ret)return ret; + + ret =ccp_register_aes_aeads (&aead_algs); +if (ret) +return ret; }if (!sha_disable) {
@@ -350,6 +355,7 @@ static void ccp_unregister_algs(void) {struct ccp_crypto_ahash_alg *ahash_alg, *ahash_tmp;struct ccp_crypto_ablkcipher_alg *ablk_alg, *ablk_tmp; +struct ccp_crypto_aead *aead_alg, *aead_tmp;list_for_each_entry_safe (ahash_alg, ahash_tmp, &hash_algs, entry) {crypto_unregister_ahash (&ahash_alg->alg);
@@ -362,6 +368,12 @@ static void ccp_unregister_algs(void)list_del (&ablk_alg->entry);kfree (ablk_alg); } + +list_for_each_entry_safe (aead_alg, aead_tmp, &aead_algs, entry) { +crypto_unregister_aead (&aead_alg->alg); +list_del (&aead_alg->entry); +kfree (aead_alg); + } }static int ccp_crypto_init (void )
drivers/crypto/ccp/ccp-crypto.h +14 -0
@@ -19,6 +19,8 @@#include <linux/ccp.h> #include <crypto/algapi.h> #include <crypto/aes.h> +#include <crypto/internal/aead.h> +#include <crypto/aead.h> #include <crypto/ctr.h> #include <crypto/hash.h> #include <crypto/sha.h>
@@ -33,6 +35,14 @@ struct ccp_crypto_ablkcipher_alg {struct crypto_alg alg; }; +struct ccp_crypto_aead { +struct list_head entry; + +u32 mode; + +struct aead_alg alg; +}; +struct ccp_crypto_ahash_alg {struct list_head entry;
@@ -95,6 +105,9 @@ struct ccp_aes_req_ctx {struct scatterlist iv_sg;u8 iv[AES_BLOCK_SIZE ]; +struct scatterlist tag_sg; +u8 tag[AES_BLOCK_SIZE ]; +/* Fields used for RFC3686 requests */ u8 *rfc3686_info;u8 rfc3686_iv[AES_BLOCK_SIZE ];
@@ -212,6 +225,7 @@ struct scatterlist *ccp_crypto_sg_table_add(struct sg_table *table,int ccp_register_aes_algs (struct list_head *head);int ccp_register_aes_cmac_algs (struct list_head *head);int ccp_register_aes_xts_algs (struct list_head *head); +int ccp_register_aes_aeads (struct list_head *head);int ccp_register_sha_algs (struct list_head *head);#endif
drivers/crypto/ccp/ccp-dev-v5.c +2 -0
@@ -289,6 +289,8 @@ static int ccp5_perform_aes(struct ccp_op *op)CCP_AES_TYPE (&function) = op->u.aes.type;if (op->u.aes.mode ==CCP_AES_MODE_CFB )CCP_AES_SIZE (&function) =0x7f ; +if ((op->u.aes.mode ==CCP_AES_MODE_GCTR ) && op->eom) +CCP_AES_SIZE (&function) = op->u.aes.size;CCP5_CMD_FUNCTION (&desc) = function.raw;
drivers/crypto/ccp/ccp-dev.h +1 -0
@@ -466,6 +466,7 @@ struct ccp_aes_op {enum ccp_aes_type type;enum ccp_aes_mode mode;enum ccp_aes_action action; +unsigned int size; };struct ccp_xts_aes_op {
drivers/crypto/ccp/ccp-ops.c +252 -0
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include/linux/ccp.h +9 -0
@@ -123,6 +123,10 @@ enum ccp_aes_mode {CCP_AES_MODE_CFB ,CCP_AES_MODE_CTR ,CCP_AES_MODE_CMAC , +CCP_AES_MODE_GHASH , +CCP_AES_MODE_GCTR , +CCP_AES_MODE_GCM , +CCP_AES_MODE_GMAC , CCP_AES_MODE__LAST, };
@@ -137,6 +141,9 @@ enum ccp_aes_action {CCP_AES_ACTION_ENCRYPT , CCP_AES_ACTION__LAST, }; +/* Overloaded field */ +#define CCP_AES_GHASHAAD CCP_AES_ACTION_DECRYPT +#define CCP_AES_GHASHFINAL CCP_AES_ACTION_ENCRYPT/** * struct ccp_aes_engine - CCP AES operation
@@ -181,6 +188,8 @@ struct ccp_aes_engine {struct scatterlist *cmac_key;/* K1/K2 cmac key required for * final cmac cmd */ u32 cmac_key_len;/* In bytes */ + +u32 aad_len;/* In bytes */ };/***** XTS-AES engine *****/
Re: [PATCH V2 2/3] crypto: ccp - Enable support for AES GCM on v5 CCPs
Am Donnerstag, 2. März 2017, 22:26:54 CET schrieb Gary R Hook:
Hi Gary,
Quoted 123 lines
A version 5 device provides the primitive commands required for AES GCM. This patch adds support for en/decryption.
Signed-off-by Gary R Hook <[email protected]>--- drivers/crypto/ccp/Makefile | 1 drivers/crypto/ccp/ccp-crypto-aes-galois.c | 257 ++++++++++++++++++++++++++++ drivers/crypto/ccp/ccp-crypto-main.c | 12 + drivers/crypto/ccp/ccp-crypto.h | 14 ++ drivers/crypto/ccp/ccp-dev-v5.c | 2 drivers/crypto/ccp/ccp-dev.h | 1 drivers/crypto/ccp/ccp-ops.c | 252 +++++++++++++++++++++++++++ include/linux/ccp.h | 9 + 8 files changed, 548 insertions(+) create mode 100644 drivers/crypto/ccp/ccp-crypto-aes-galois.cdrivers/crypto/ccp/Makefile +1
-0@@ -12,4 +12,5 @@ ccp-crypto-objs := ccp-crypto-main.o \ ccp-crypto-aes.o \ ccp-crypto-aes-cmac.o \ ccp-crypto-aes-xts.o \ + ccp-crypto-aes-galois.o \ ccp-crypto-sha.o(quoted diff) +0
-0
b/drivers/crypto/ccp/ccp-crypto-aes-galois.cnew file mode 100644 index 0000000..8bc18c9drivers/crypto/ccp/ccp-crypto-aes-galois.c new file +29
-0@@ -0,0 +1,257 @@ +/* +* AMD Cryptographic Coprocessor (CCP) AES GCM crypto API support +* +* Copyright (C) 2016 Advanced Micro Devices, Inc. +* +* Author: Gary R Hook <[email protected]> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation. +*/ + +#include <linux/module.h> +#include <linux/sched.h> +#include <linux/delay.h> +#include <linux/scatterlist.h> +#include <linux/crypto.h> +#include <crypto/internal/aead.h> +#include <crypto/algapi.h> +#include <crypto/aes.h> +#include <crypto/ctr.h> +#include <crypto/scatterwalk.h> +#include <linux/delay.h> + +#include "ccp-crypto.h" + +#define AES_GCM_IVSIZE 12 + +static int ccp_aes_gcm_complete(struct crypto_async_request *async_req, intret) +{
drivers/crypto/ccp/ccp-crypto-aes-galois.c new file +58
-0+return ret; +} + +static int ccp_aes_gcm_setkey (struct crypto_aead *tfm,const u8 *key, +unsigned int key_len) +{ +struct ccp_ctx *ctx =crypto_aead_ctx (tfm); + +switch (key_len) { +case AES_KEYSIZE_128 : + ctx->u.aes.type =CCP_AES_TYPE_128 ; +break ; +case AES_KEYSIZE_192 : + ctx->u.aes.type =CCP_AES_TYPE_192 ; +break ; +case AES_KEYSIZE_256 : + ctx->u.aes.type =CCP_AES_TYPE_256 ; +break ; +default : +crypto_aead_set_flags (tfm,CRYPTO_TFM_RES_BAD_KEY_LEN ); +return -EINVAL ; + } + + ctx->u.aes.mode =CCP_AES_MODE_GCM ; + ctx->u.aes.key_len = key_len; + +memcpy (ctx->u.aes.key, key, key_len); +sg_init_one (&ctx->u.aes.key_sg, ctx->u.aes.key, key_len); + +return 0 ; +} + +static int ccp_aes_gcm_setauthsize (struct crypto_aead *tfm, +unsigned int authsize) +{ +return 0 ; +} + +static int ccp_aes_gcm_crypt (struct aead_request *req,bool encrypt) +{ +struct crypto_aead *tfm =crypto_aead_reqtfm (req); +struct ccp_ctx *ctx =crypto_aead_ctx (tfm); +struct ccp_aes_req_ctx *rctx =aead_request_ctx (req); +struct scatterlist *iv_sg =NULL ; +unsigned int iv_len =0 ; +int i; +int ret =0 ; + +if (!ctx->u.aes.key_len) +return -EINVAL ; + +if (ctx->u.aes.mode !=CCP_AES_MODE_GCM ) +return -EINVAL ; + +if (!req->iv) +return -EINVAL ; + +/*
drivers/crypto/ccp/ccp-crypto-aes-galois.c line 98
Quoted 10 lines
drivers/crypto/ccp/ccp-crypto-aes-galois.c new file +10
-0+* 5 parts: +* plaintext/ciphertext input +* AAD +* key +* IV +* Destination+tag buffer +*/ + +/* According to the way AES GCM has been implemented here, +* per RFC 4106 it seems, the provided IV is fixed at 12 bytes,
When you have that restriction, should the cipher be called rfc4106(gcm(aes))?
But then, the key is 4 bytes longer than a normal AES key as it contains the leading 32 bits of the IV.
Quoted 11 lines
drivers/crypto/ccp/ccp-crypto-aes-galois.c new file +11
-0+* occupies the beginning of the IV array. Write a 32-bit +* integer after that (bytes 13-16) with a value of "1". +*/ +memcpy (rctx->iv, req->iv,AES_GCM_IVSIZE ); +for (i =0 ; i <3 ; i++) + rctx->iv[i +AES_GCM_IVSIZE ] =0 ; + rctx->iv[AES_BLOCK_SIZE -1 ] =1 ; + +/* Set up a scatterlist for the IV */ + iv_sg = &rctx->iv_sg; + iv_len =AES_BLOCK_SIZE ;
drivers/crypto/ccp/ccp-crypto-aes-galois.c line 119
Quoted 10 lines
drivers/crypto/ccp/ccp-crypto-aes-galois.c new file +10
-0+sg_init_one (iv_sg, rctx->iv, iv_len); + +/* The AAD + plaintext are concatenated in the src buffer */ +memset (&rctx->cmd,0 ,sizeof (rctx->cmd)); +INIT_LIST_HEAD (&rctx->cmd.entry); + rctx->cmd.engine =CCP_ENGINE_AES ; + rctx->cmd.u.aes.type = ctx->u.aes.type; + rctx->cmd.u.aes.mode = ctx->u.aes.mode; + rctx->cmd.u.aes.action = + (encrypt) ?CCP_AES_ACTION_ENCRYPT :CCP_AES_ACTION_DECRYPT ;
Instead of this condition, why not changing the encrypt/decrypt function to directly provide the enc/dec variables?
drivers/crypto/ccp/ccp-crypto-aes-galois.c line 126
Quoted 7 lines
drivers/crypto/ccp/ccp-crypto-aes-galois.c new file +7
-0+ rctx->cmd.u.aes.key = &ctx->u.aes.key_sg; + rctx->cmd.u.aes.key_len = ctx->u.aes.key_len; + rctx->cmd.u.aes.iv = iv_sg; + rctx->cmd.u.aes.iv_len = iv_len; + rctx->cmd.u.aes.src = req->src; + rctx->cmd.u.aes.src_len = req->cryptlen; + rctx->cmd.u.aes.aad_len = req->assoclen;
Just to be on the safe side: is the implementation good when cryptlen or assoclen is 0?
Ciao
Stephan
Herbert Xu
maintainerRe: [PATCH V2 2/3] crypto: ccp - Enable support for AES GCM on v5 CCPs
In reply to Gary R HookQuoted 5 lines · Gary R Hook
A version 5 device provides the primitive commands required for AES GCM. This patch adds support for en/decryption.
Signed-off-by Gary R Hook <[email protected]>
This patch doesn't apply to the current cryptodev tree.
Cheers,
Signature · 3 lines
Email: Herbert Xu <[email protected]> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
PATCH v2 3/3 crypto: ccp - Enable 3DES function on v5 CCPs
In reply to Gary R HookWire up support for Triple DES in ECB mode.
--- drivers/crypto/ccp/Makefile | 1 drivers/crypto/ccp/ccp-crypto-des3.c | 254 ++++++++++++++++++++++++++++++++++ drivers/crypto/ccp/ccp-crypto-main.c | 10 + drivers/crypto/ccp/ccp-crypto.h | 22 +++ drivers/crypto/ccp/ccp-dev-v3.c | 1 drivers/crypto/ccp/ccp-dev-v5.c | 54 +++++++ drivers/crypto/ccp/ccp-dev.h | 14 ++ drivers/crypto/ccp/ccp-ops.c | 198 +++++++++++++++++++++++++++ include/linux/ccp.h | 57 +++++++- 9 files changed, 608 insertions(+), 3 deletions(-) create mode 100644 drivers/crypto/ccp/ccp-crypto-des3.c
drivers/crypto/ccp/Makefile +1 -0
@@ -13,4 +13,5 @@ ccp-crypto-objs := ccp-crypto-main.o \ ccp-crypto-aes-cmac.o \ ccp-crypto-aes-xts.o \ ccp-crypto-aes-galois.o \ + ccp-crypto-des3.o \ ccp-crypto-sha.o
drivers/crypto/ccp/ccp-crypto-des3.c new file +254 -0
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drivers/crypto/ccp/ccp-crypto-main.c +10 -0
@@ -33,6 +33,10 @@module_param (sha_disable, uint,0444 );MODULE_PARM_DESC (sha_disable,"Disable use of SHA - any non-zero value" ); +static unsigned int des3_disable; +module_param (des3_disable, uint,0444 ); +MODULE_PARM_DESC (des3_disable,"Disable use of 3DES - any non-zero value" ); +/* List heads for the supported algorithms */ static LIST_HEAD (hash_algs);static LIST_HEAD (cipher_algs);
@@ -342,6 +346,12 @@ static int ccp_register_algs(void)return ret; } +if (!des3_disable) { + ret =ccp_register_des3_algs (&cipher_algs); +if (ret) +return ret; + } +if (!sha_disable) { ret =ccp_register_sha_algs (&hash_algs);if (ret)
drivers/crypto/ccp/ccp-crypto.h +22 -0
@@ -25,6 +25,8 @@#include <crypto/hash.h> #include <crypto/sha.h> +#define CCP_LOG_LEVEL KERN_INFO +#define CCP_CRA_PRIORITY 300struct ccp_crypto_ablkcipher_alg {
@@ -150,6 +152,24 @@ struct ccp_aes_cmac_exp_ctx {u8 buf[AES_BLOCK_SIZE ]; }; +/***** 3DES related defines *****/ +struct ccp_des3_ctx { +enum ccp_engine engine; +enum ccp_des3_type type; +enum ccp_des3_mode mode; + +struct scatterlist key_sg; +unsigned int key_len; +u8 key[AES_MAX_KEY_SIZE ]; +}; + +struct ccp_des3_req_ctx { +struct scatterlist iv_sg; +u8 iv[AES_BLOCK_SIZE ]; + +struct ccp_cmd cmd; +}; +/* SHA-related defines * These values must be large enough to accommodate any variant */
@@ -214,6 +234,7 @@ struct ccp_ctx {union {struct ccp_aes_ctx aes;struct ccp_sha_ctx sha; +struct ccp_des3_ctx des3; } u; };
@@ -227,5 +248,6 @@ struct scatterlist *ccp_crypto_sg_table_add(struct sg_table *table,int ccp_register_aes_xts_algs (struct list_head *head);int ccp_register_aes_aeads (struct list_head *head);int ccp_register_sha_algs (struct list_head *head); +int ccp_register_des3_algs (struct list_head *head);#endif
drivers/crypto/ccp/ccp-dev-v3.c +1 -0
@@ -553,6 +553,7 @@ static irqreturn_t ccp_irq_handler(int irq, void *data)static const struct ccp_actions ccp3_actions = { .aes = ccp_perform_aes, .xts_aes = ccp_perform_xts_aes, + .des3 =NULL , .sha = ccp_perform_sha, .rsa = ccp_perform_rsa, .passthru = ccp_perform_passthru,
drivers/crypto/ccp/ccp-dev-v5.c +54 -0
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drivers/crypto/ccp/ccp-dev.h +12 -2
@@ -190,6 +190,9 @@#define CCP_XTS_AES_KEY_SB_COUNT 1#define CCP_XTS_AES_CTX_SB_COUNT 1 +#define CCP_DES3_KEY_SB_COUNT 1 +#define CCP_DES3_CTX_SB_COUNT 1 +#define CCP_SHA_SB_COUNT 1#define CCP_RSA_MAX_WIDTH 4096
@@ -474,6 +477,12 @@ struct ccp_xts_aes_op {enum ccp_xts_aes_unit_size unit_size; }; +struct ccp_des3_op { +enum ccp_des3_type type; +enum ccp_des3_mode mode; +enum ccp_des3_action action; +}; +struct ccp_sha_op {enum ccp_sha_type type;u64 msg_bits;
@@ -511,6 +520,7 @@ struct ccp_op {union {struct ccp_aes_op aes;struct ccp_xts_aes_op xts; +struct ccp_des3_op des3;struct ccp_sha_op sha;struct ccp_rsa_op rsa;struct ccp_passthru_op passthru;
@@ -619,13 +629,13 @@ struct ccp5_desc {struct ccp_actions {int (*aes)(struct ccp_op *);int (*xts_aes)(struct ccp_op *); +int (*des3)(struct ccp_op *);int (*sha)(struct ccp_op *);int (*rsa)(struct ccp_op *);int (*passthru)(struct ccp_op *);int (*ecc)(struct ccp_op *);u32 (*sballoc)(struct ccp_cmd_queue *,unsigned int ); -void (*sbfree)(struct ccp_cmd_queue *,unsigned int , -unsigned int ); +void (*sbfree)(struct ccp_cmd_queue *,unsigned int ,unsigned int );unsigned int (*get_free_slots)(struct ccp_cmd_queue *);int (*init)(struct ccp_device *);void (*destroy)(struct ccp_device *);
drivers/crypto/ccp/ccp-ops.c +198 -0
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include/linux/ccp.h +56 -1
75 lines not on this page · raw message
Quoted 4 lines · Gary
The following series:
- Move verbose init messages to debug mode
- Update the queue pointers in the event of an error
- Simplify buffer management and eliminate an unused option
*sigh* That Subject line is supposed to read "Minor CCP improvements and clean-up".
Quoted 27 lines
---
Gary R Hook (3):
crypto: ccp - Add SHA-2 384- and 512-bit support
crypto: ccp - Enable support for AES GCM on v5 CCPs
crypto: ccp - Enable 3DES function on v5 CCPsdrivers/crypto/ccp/Makefile | 2 drivers/crypto/ccp/ccp-crypto-aes-galois.c | 257 ++++++++++++++ drivers/crypto/ccp/ccp-crypto-des3.c | 254 ++++++++++++++ drivers/crypto/ccp/ccp-crypto-main.c | 22 + drivers/crypto/ccp/ccp-crypto-sha.c | 22 + drivers/crypto/ccp/ccp-crypto.h | 44 ++ drivers/crypto/ccp/ccp-dev-v3.c | 1 drivers/crypto/ccp/ccp-dev-v5.c | 56 +++ drivers/crypto/ccp/ccp-dev.h | 15 + drivers/crypto/ccp/ccp-ops.c | 522 ++++++++++++++++++++++++++++ include/linux/ccp.h | 68 ++++ 11 files changed, 1257 insertions(+), 6 deletions(-) create mode 100644 drivers/crypto/ccp/ccp-crypto-aes-galois.c create mode 100644 drivers/crypto/ccp/ccp-crypto-des3.c--
Signature
Signature · 3 lines
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