Add QorIQ LS2088A platform support

This patchset adds support for the QorIQ LS2088A SoC.
LS2088A SoC is similar to LS2080A SoC with a few differences like it has A72 cores.

This patchset
- reorganize LS2088A DTS/DTSI for code reuseability
- adds LS2088A device dtsi and dts files.

Abhimanyu Saini (3):
dt-bindings: Add compatible for LS2088A QDS and RDB board
arm64: dts: freescale: ls2080a: Split devicetree for code resuability
arm64: dts: freescale: ls2088a: Add DTS support for FSL's LS2088A SoC

Changes for v5:
- Add missing includes
Changes for v4:
- Incorporated Shawn's comments by reorganizing DTSI, moving all #include to the top and,
- add missing files
Changes for v3:
- rename dts/dtsi files
Changes for v2:
- reorganize LS2088A device tree to use common nodes from LS2080A device trees.
- Both LS2080A and LS2088A have same hardware controllers, so separate dt-binding patches for pcie, gpio, dspi, qspi are not required.

Abhimanyu Saini (3):
dt-bindings: Add compatible for LS2088A QDS and RDB board
arm64: dts: freescale: ls2080a: Split devicetree for code resuability
arm64: dts: freescale: ls2088a: Add DTS support for FSL's LS2088A SoC

 Documentation/devicetree/bindings/arm/fsl.txt      |  11 +
 arch/arm64/boot/dts/freescale/Makefile             |   2 +
 arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts  | 155 +---
 arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts  | 110 +--
 arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi     | 859 ++-------------------
 arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts  |  66 ++
 arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts  |  66 ++
 arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi     | 153 ++++
 arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi | 196 +++++
 arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 151 ++++
 arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi     | 753 ++++++++++++++++++
 11 files changed, 1488 insertions(+), 1034 deletions(-)
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi

1.9.1

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---
 Documentation/devicetree/bindings/arm/fsl.txt | 11 +++++++++++
 1 file changed, 11 insertions(+)

index c9c567a..645e8ff 100644
@@ -195,3 +195,14 @@ LS2080A ARMv8 based RDB Board
 Required root node properties:
     - compatible = "fsl,ls2080a-rdb", "fsl,ls2080a";
 
+LS2088A SoC
+Required root node properties:
+    - compatible = "fsl,ls2088a";
+
+LS2088A ARMv8 based QDS Board
+Required root node properties:
+    - compatible = "fsl,ls2088a-qds", "fsl,ls2088a";
+
+LS2088A ARMv8 based RDB Board
+Required root node properties:
+    - compatible = "fsl,ls2088a-rdb", "fsl,ls2088a";

1.9.1

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LS2088A and LS2080A are similar SoCs with a few differences like ARM cores etc.

Reorganize the LS2080A device tree to move the common nodes to:
- fsl-ls208xa.dtsi
- fsl-ls208xa-rdb.dtsi
- fsl-ls208xa-qds.dtsi

---
Changes for v5:
- Moved pcie regs node to common file
Changes for v4:
- Incorporated Shawn's comments by reorganizing DTSI, moving all #include to the top and,
- add missing files
Changes for v3:
- rename dts/dtsi files

 arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts  | 155 +---
 arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts  | 110 +--
 arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi     | 863 +++------------------
 arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi | 196 +++++
 arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 151 ++++
 arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi     | 737 ++++++++++++++++++
 6 files changed, 1182 insertions(+), 1030 deletions(-)
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi

index 8bc1f8f..c1e76df 100644
@@ -1,8 +1,9 @@
 /*
  * Device Tree file for Freescale LS2080a QDS Board.
  *
- * Copyright (C) 2015, Freescale Semiconductor
+ * Copyright (C) 2015-17, Freescale Semiconductor
  *
+ * Abhimanyu Saini <[email protected]>
  * Bhupesh Sharma <[email protected]>
  *
  * This file is dual-licensed: you can use it either under the terms

@@ -47,6 +48,7 @@
 /dts-v1/;
 
 #include "fsl-ls2080a.dtsi"
+#include "fsl-ls208xa-qds.dtsi"
 
 / {
 	model = "Freescale Layerscape 2080a QDS Board";

@@ -61,154 +63,3 @@
 		stdout-path = "serial0:115200n8";
 	};
 };
-
-&esdhc {
-	status = "okay";
-};
-
-&ifc {
-	status = "okay";
-	#address-cells = <2>;
-	#size-cells = <1>;
-	ranges = <0x0 0x0 0x5 0x80000000 0x08000000
-		  0x2 0x0 0x5 0x30000000 0x00010000
-		  0x3 0x0 0x5 0x20000000 0x00010000>;
-
-	nor@0,0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "cfi-flash";
-		reg = <0x0 0x0 0x8000000>;
-		bank-width = <2>;
-		device-width = <1>;
-	};
-
-	nand@2,0 {
-	     compatible = "fsl,ifc-nand";
-	     reg = <0x2 0x0 0x10000>;
-	};
-
-	cpld@3,0 {
-	     reg = <0x3 0x0 0x10000>;
-	     compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
-	};
-};
-
-&i2c0 {
-	status = "okay";
-	pca9547@77 {
-		compatible = "nxp,pca9547";
-		reg = <0x77>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-		i2c@0 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <0x00>;
-			rtc@68 {
-				compatible = "dallas,ds3232";
-				reg = <0x68>;
-			};
-		};
-
-		i2c@2 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <0x02>;
-
-			ina220@40 {
-				compatible = "ti,ina220";
-				reg = <0x40>;
-				shunt-resistor = <500>;
-			};
-
-			ina220@41 {
-				compatible = "ti,ina220";
-				reg = <0x41>;
-				shunt-resistor = <1000>;
-			};
-		};
-
-		i2c@3 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <0x3>;
-
-			adt7481@4c {
-				compatible = "adi,adt7461";
-				reg = <0x4c>;
-			};
-		};
-	};
-};
-
-&i2c1 {
-	status = "disabled";
-};
-
-&i2c2 {
-	status = "disabled";
-};
-
-&i2c3 {
-	status = "disabled";
-};
-
-&dspi {
-	status = "okay";
-	dflash0: n25q128a {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "st,m25p80";
-		spi-max-frequency = <3000000>;
-		reg = <0>;
-	};
-	dflash1: sst25wf040b {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "st,m25p80";
-		spi-max-frequency = <3000000>;
-		reg = <1>;
-	};
-	dflash2: en25s64 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "st,m25p80";
-		spi-max-frequency = <3000000>;
-		reg = <2>;
-	};
-};
-
-&qspi {
-	status = "okay";
-	flash0: s25fl256s1@0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "st,m25p80";
-		spi-max-frequency = <20000000>;
-		reg = <0>;
-	};
-	flash2: s25fl256s1@2 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "st,m25p80";
-		spi-max-frequency = <20000000>;
-		reg = <0>;
-	};
-};
-
-&sata0 {
-	status = "okay";
-};
-
-&sata1 {
-	status = "okay";
-};
-
-&usb0 {
-	status = "okay";
-};
-
-&usb1 {
-	status = "okay";
-};

1.9.1

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This patch adds the device tree support for FSL LS2088A SoC based on ARMv8 architecture.

Following levels of DTSI/DTS files have been created for the LS2088A SoC family:

- fsl-ls2088a.dtsi:
DTS-Include file for FSL LS2088A SoC.

- fsl-ls2088a-qds.dts:
DTS file for FSL LS2088A QDS board.

- fsl-ls2088a-rdb.dts:
DTS file for FSL LS2088A RDB board.

---
Changes for v5:
- Add missing includes
Changes for v4:
- Incorporated Shawn's comments by reorganizing DTSI, moving all #include to the top and,
- add missing files
Changes for v3:
- rename dts/dtsi files

 arch/arm64/boot/dts/freescale/Makefile            |   2 +
 arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts |  64 +++++++++
 arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts |  64 +++++++++
 arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi    | 165 ++++++++++++++++++++++
 4 files changed, 295 insertions(+)
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi

index 39db645..6d5df45 100644
@@ -8,6 +8,8 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb
  
 always		:= $(dtb-y)
 subdir-y	:= $(dts-dirs)

1.9.1

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Applied all, thanks.