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ARM: OMAP2+: Add and enable operating-points-v2

PATCH New Dave Gerlach 4 participants 13 messages Mar 6, 2017 – Mar 23, 2017

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#0 lore raw

cover ARM: OMAP2+: Add and enable operating-points-v2

Hi,
This series adds the necessary changes to get proper operating-points-v2 tables for AM335x/AM437x/DRA7xx/AM57xx TI SoCs. Doing this enables the ti-cpufreq driver and allows the platform to detect which CPU OPPs are valid for the configuration in use and enable them.

This series adds complete tables for am335x and adds 1GHz support for all beaglebone black boards and updates the already merged but unused am437x table to match the finalized DT bindings. It also moves the existing dra7xx/am57xx OPPs to OPPv2 but does not enable 1.5GHz yet as this requires multiregulator support which will come at a later date.

Also, now that so many TI platforms will depend on the ti-cpufreq driver let's add CONFIG_ARM_TI_CPUFREQ to omap2plus_defconfig to enable it as part of the default configuration.

Pushed a branch containing these patches on top of v4.11-rc1 if anyone wants to try it out [1].

Regards,
Dave

[1] https://github.com/dgerlach/linux-pm/tree/upstream/v4.11/ti-cpufreq-dts

Dave Gerlach (5):
ARM: dts: am33xx: Add updated operating-points-v2 table for cpu
ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu
ARM: dts: am4372: Update operating-points-v2 table for cpu
ARM: dts: dra7: Add updated operating-points-v2 table for cpu
ARM: omap2plus_defconfig: Enable support for ti-cpufreq

 arch/arm/boot/dts/am335x-boneblack.dts | 11 +++++
 arch/arm/boot/dts/am33xx.dtsi          | 87 +++++++++++++++++++++++++++++-----
 arch/arm/boot/dts/am4372.dtsi          |  7 ++-
 arch/arm/boot/dts/dra7.dtsi            | 24 ++++++++--
 arch/arm/boot/dts/dra74x.dtsi          |  5 ++
 arch/arm/configs/omap2plus_defconfig   |  1 +
 6 files changed, 113 insertions(+), 22 deletions(-)
Signature · 1 line
2.11.0
#1 lore raw

PATCH 1/5 ARM: dts: am33xx: Add updated operating-points-v2 table for cpu

After the ti-cpufreq driver has been added, we can now drop the operating-points table present in am33xx.dtsi for the cpu and add an operating-points-v2 table with all OPPs available for all silicon revisions. Also add necessary data for use by ti-cpufreq to selectively enable the appropriate OPPs at runtime as part of the operating-points table.

Information from AM335x Data Manual, SPRS717i, Revised December 2015, Table 5-7.

---
 arch/arm/boot/dts/am33xx.dtsi | 87 ++++++++++++++++++++++++++++++++++++-------
 1 file changed, 74 insertions(+), 13 deletions(-)
arch/arm/boot/dts/am33xx.dtsi +74 -13
index 9e96d60976b7..9e242943dcec 100644
@@ -46,19 +46,7 @@
 			device_type = "cpu";
 			reg = <0>;
 
-			/*
-			 * To consider voltage drop between PMIC and SoC,
-			 * tolerance value is reduced to 2% from 4% and
-			 * voltage value is increased as a precaution.
-			 */
-			operating-points = <
-				/* kHz    uV */
-				720000  1285000
-				600000  1225000
-				500000  1125000
-				275000  1125000
-			>;
-			voltage-tolerance = <2>; /* 2 percentage */
+			operating-points-v2 = <&cpu0_opp_table>;
 
 			clocks = <&dpll_mpu_ck>;
 			clock-names = "cpu";
@@ -67,6 +55,79 @@
 		};
 	};
 
+	cpu0_opp_table: opp-table {
+		compatible = "operating-points-v2-ti-cpu";
+		syscon = <&scm_conf>;
+
+		/*
+		 * The three following nodes are marked with opp-suspend
+		 * because the can not be enabled simultaneously on a
+		 * single SoC.
+		 */
+		opp50 at 300000000 {
+			opp-hz = /bits/ 64 <300000000>;
+			opp-microvolt = <950000 931000 969000>;
+			opp-supported-hw = <0x06 0x0010>;
+			opp-suspend;
+		};
+
+		opp100 at 275000000 {
+			opp-hz = /bits/ 64 <275000000>;
+			opp-microvolt = <1100000 1078000 1122000>;
+			opp-supported-hw = <0x01 0x00FF>;
+			opp-suspend;
+		};
+
+		opp100 at 300000000 {
+			opp-hz = /bits/ 64 <300000000>;
+			opp-microvolt = <1100000 1078000 1122000>;
+			opp-supported-hw = <0x06 0x0020>;
+			opp-suspend;
+		};
+
+		opp100 at 500000000 {
+			opp-hz = /bits/ 64 <500000000>;
+			opp-microvolt = <1100000 1078000 1122000>;
+			opp-supported-hw = <0x01 0xFFFF>;
+		};
+
+		opp100 at 600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <1100000 1078000 1122000>;
+			opp-supported-hw = <0x06 0x0040>;
+		};
+
+		opp120 at 600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <1200000 1176000 1224000>;
+			opp-supported-hw = <0x01 0xFFFF>;
+		};
+
+		opp120 at 720000000 {
+			opp-hz = /bits/ 64 <720000000>;
+			opp-microvolt = <1200000 1176000 1224000>;
+			opp-supported-hw = <0x06 0x0080>;
+		};
+
+		oppturbo at 720000000 {
+			opp-hz = /bits/ 64 <720000000>;
+			opp-microvolt = <1260000 1234800 1285200>;
+			opp-supported-hw = <0x01 0xFFFF>;
+		};
+
+		oppturbo at 800000000 {
+			opp-hz = /bits/ 64 <800000000>;
+			opp-microvolt = <1260000 1234800 1285200>;
+			opp-supported-hw = <0x06 0x0100>;
+		};
+
+		oppnitro at 1000000000 {
+			opp-hz = /bits/ 64 <1000000000>;
+			opp-microvolt = <1325000 1298500 1351500>;
+			opp-supported-hw = <0x04 0x0200>;
+		};
+	};
+
 	pmu {
 		compatible = "arm,cortex-a8-pmu";
 		interrupts = <3>;
Signature · 1 line
2.11.0
#2 lore raw

PATCH 1/5 ARM: dts: am33xx: Add updated operating-points-v2 table for cpu

Quoted 11 lines · On Mon, 6 Mar 2017 09:23:38 -0600 Dave Gerlach <[email protected]> wrote:

After the ti-cpufreq driver has been added, we can now drop the operating-points table present in am33xx.dtsi for the cpu and add an operating-points-v2 table with all OPPs available for all silicon revisions. Also add necessary data for use by ti-cpufreq to selectively enable the appropriate OPPs at runtime as part of the operating-points table.

Information from AM335x Data Manual, SPRS717i, Revised December 2015, Table 5-7.

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de

#3 lore raw

PATCH 2/5 ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu

In reply to Dave Gerlach

Although all PG2.0 silicon may not support 1GHz OPP for the MPU, older Beaglebone Blacks may have PG2.0 silicon populated and these particular parts are guaranteed to support the OPP, so enable it for PG2.0 on am335x-boneblack only.

---
 arch/arm/boot/dts/am335x-boneblack.dts | 11 +++++++++++
 1 file changed, 11 insertions(+)
arch/arm/boot/dts/am335x-boneblack.dts +11 -0
index 77273df1a028..935ed17d22e4 100644
@@ -15,3 +15,14 @@
 	model = "TI AM335x BeagleBone Black";
 	compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
 };
+
+&cpu0_opp_table {
+	/*
+	 * All PG 2.0 silicon may not support 1GHz but some of the early
+	 * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
+	 * to support 1GHz OPP so enable it for PG 2.0 on this board.
+	 */
+	oppnitro at 1000000000 {
+		opp-supported-hw = <0x06 0x0100>;
+	};
+};
Signature · 1 line
2.11.0
#4 lore raw

PATCH 2/5 ARM: dts: am335x-boneblack: Enable 1GHz OPP for cpu

Quoted 6 lines · On Mon, 6 Mar 2017 09:23:39 -0600 Dave Gerlach <[email protected]> wrote:

Although all PG2.0 silicon may not support 1GHz OPP for the MPU, older Beaglebone Blacks may have PG2.0 silicon populated and these particular parts are guaranteed to support the OPP, so enable it for PG2.0 on am335x-boneblack only.

Quoted 17 lines
---
 arch/arm/boot/dts/am335x-boneblack.dts | 11 +++++++++++
 1 file changed, 11 insertions(+)
(quoted diff) +0 -0

b/arch/arm/boot/dts/am335x-boneblack.dts index 77273df1a028..935ed17d22e4 100644 --- a/arch/arm/boot/dts/am335x-boneblack.dts +++ b/arch/arm/boot/dts/am335x-boneblack.dts @@ -15,3 +15,14 @@

(quoted diff) +0 -0
 	model = "TI AM335x BeagleBone Black";
 	compatible = "ti,am335x-bone-black", "ti,am335x-bone",

"ti,am33xx"; };

arch/arm/boot/dts/am335x-boneblack.dts +4 -0
+
+&cpu0_opp_table {
+	/*
+	 * All PG 2.0 silicon may not support 1GHz but some of the

early

arch/arm/boot/dts/am335x-boneblack.dts line 28

Quoted 7 lines
arch/arm/boot/dts/am335x-boneblack.dts +7 -0
+	 * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
+	 * to support 1GHz OPP so enable it for PG 2.0 on this board.
+	 */
+	oppnitro at 1000000000 {
+		opp-supported-hw = <0x06 0x0100>;
+	};
+};

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de

#5 lore raw

PATCH 3/5 ARM: dts: am4372: Update operating-points-v2 table for cpu

In reply to Dave Gerlach

The operatings-points-v2 table for am4372 was merged before any user of it was present in the kernel and before the binding had been finalized. The new ti-cpufreq driver and binding expects the platform specific properties to be part of the operating-points-v2 table rather than the cpu node so let's move them there as the only user is the ti-cpufreq driver.

---
 arch/arm/boot/dts/am4372.dtsi | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)
arch/arm/boot/dts/am4372.dtsi +3 -4
index 97fcaf415de1..176e09e9a45e 100644
@@ -50,15 +50,14 @@
 			clock-names = "cpu";
 
 			operating-points-v2 = <&cpu0_opp_table>;
-			ti,syscon-efuse = <&scm_conf 0x610 0x3f 0>;
-			ti,syscon-rev = <&scm_conf 0x600>;
 
 			clock-latency = <300000>; /* From omap-cpufreq driver */
 		};
 	};
 
-	cpu0_opp_table: opp_table0 {
-		compatible = "operating-points-v2";
+	cpu0_opp_table: opp-table {
+		compatible = "operating-points-v2-ti-cpu";
+		syscon = <&scm_conf>;
 
 		opp50 at 300000000 {
 			opp-hz = /bits/ 64 <300000000>;
Signature · 1 line
2.11.0
#6 lore raw

PATCH 3/5 ARM: dts: am4372: Update operating-points-v2 table for cpu

Quoted 8 lines · On Mon, 6 Mar 2017 09:23:40 -0600 Dave Gerlach <[email protected]> wrote:

The operatings-points-v2 table for am4372 was merged before any user of it was present in the kernel and before the binding had been finalized. The new ti-cpufreq driver and binding expects the platform specific properties to be part of the operating-points-v2 table rather than the cpu node so let's move them there as the only user is the ti-cpufreq driver.

Quoted 17 lines
---
 arch/arm/boot/dts/am4372.dtsi | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)
(quoted diff) +0 -0

b/arch/arm/boot/dts/am4372.dtsi index 97fcaf415de1..176e09e9a45e 100644 --- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi

arch/arm/boot/dts/am4372.dtsi +0 -2
@@ -50,15 +50,14 @@
 			clock-names = "cpu";
 
 			operating-points-v2 = <&cpu0_opp_table>;
-			ti,syscon-efuse = <&scm_conf 0x610 0x3f 0>;
-			ti,syscon-rev = <&scm_conf 0x600>;
 
 			clock-latency = <300000>; /* From
 omap-cpufreq driver */ };

arch/arm/boot/dts/am4372.dtsi line 63

Quoted 10 lines
arch/arm/boot/dts/am4372.dtsi +3 -2
 	};
 
-	cpu0_opp_table: opp_table0 {
-		compatible = "operating-points-v2";
+	cpu0_opp_table: opp-table {
+		compatible = "operating-points-v2-ti-cpu";
+		syscon = <&scm_conf>;
 
 		opp50 at 300000000 {
 			opp-hz = /bits/ 64 <300000000>;

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de

#7 lore raw

PATCH 4/5 ARM: dts: dra7: Add updated operating-points-v2 table for cpu

In reply to Dave Gerlach

After the ti-cpufreq driver has been added, we can now drop the operating-points table present in dra7.dtsi for the cpu and add an operating-points-v2 table with all OPPs available for all silicon revisions. Also add necessary data for use by ti-cpufreq to selectively enable the appropriate OPPs at runtime as part of the operating-points table.

As we now need to define voltage ranges for each OPP, we define the minimum and maximum voltage to match the ranges possible for AVS class0 voltage as defined by the DRA7/AM57 Data Manual, with the exception of using a range for OPP_OD based on historical data to ensure that SoCs from older lots still continue to boot, even though more optimal voltages are now the standard. Once an AVS Class0 driver is in place it will be possible for these OPP voltages to be adjusted to any voltage within the provided range.

Information from SPRS953, Revised December 2015.

---
 arch/arm/boot/dts/dra7.dtsi   | 24 +++++++++++++++++++-----
 arch/arm/boot/dts/dra74x.dtsi |  5 +++++
 2 files changed, 24 insertions(+), 5 deletions(-)
arch/arm/boot/dts/dra7.dtsi +19 -5
index 2c9e56f4aac5..e9dc314b0dcf 100644
@@ -81,11 +81,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <0>;
 
-			operating-points = <
-				/* kHz    uV */
-				1000000	1060000
-				1176000	1160000
-				>;
+			operating-points-v2 = <&cpu0_opp_table>;
 
 			clocks = <&dpll_mpu_ck>;
 			clock-names = "cpu";
@@ -99,6 +95,24 @@
 		};
 	};
 
+	cpu0_opp_table: opp-table {
+		compatible = "operating-points-v2-ti-cpu";
+		syscon = <&scm_wkup>;
+
+		opp_nom at 1000000000 {
+			opp-hz = /bits/ 64 <1000000000>;
+			opp-microvolt = <1060000 850000 1150000>;
+			opp-supported-hw = <0xFF 0x01>;
+			opp-suspend;
+		};
+
+		opp_od at 1176000000 {
+			opp-hz = /bits/ 64 <1176000000>;
+			opp-microvolt = <1160000 885000 1160000>;
+			opp-supported-hw = <0xFF 0x02>;
+		};
+	};
+
 	/*
 	 * The soc node represents the soc top level view. It is used for IPs
 	 * that are not memory mapped in the MPU view or for the MPU itself.
arch/arm/boot/dts/dra74x.dtsi +5 -0
index 0a78347e6615..24e6746c5b26 100644
@@ -17,6 +17,7 @@
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <1>;
+			operating-points-v2 = <&cpu0_opp_table>;
 		};
 	};
 
@@ -79,6 +80,10 @@
 	};
 };
 
+&cpu0_opp_table {
+	opp-shared;
+};
+
 &dss {
 	reg = <0x58000000 0x80>,
 	      <0x58004054 0x4>,
Signature · 1 line
2.11.0
#8 lore raw

PATCH 4/5 ARM: dts: dra7: Add updated operating-points-v2 table for cpu

Quoted 16 lines · On Mon, 6 Mar 2017 09:23:41 -0600 Dave Gerlach <[email protected]> wrote:

After the ti-cpufreq driver has been added, we can now drop the operating-points table present in dra7.dtsi for the cpu and add an operating-points-v2 table with all OPPs available for all silicon revisions. Also add necessary data for use by ti-cpufreq to selectively enable the appropriate OPPs at runtime as part of the operating-points table.

As we now need to define voltage ranges for each OPP, we define the minimum and maximum voltage to match the ranges possible for AVS class0 voltage as defined by the DRA7/AM57 Data Manual, with the exception of using a range for OPP_OD based on historical data to ensure that SoCs from older lots still continue to boot, even though more optimal voltages are now the standard. Once an AVS Class0 driver is in place it will be possible for these OPP voltages to be adjusted to any voltage within the provided range.

Quoted 3 lines

Information from SPRS953, Revised December 2015.

Quoted 61 lines
---
 arch/arm/boot/dts/dra7.dtsi   | 24 +++++++++++++++++++-----
 arch/arm/boot/dts/dra74x.dtsi |  5 +++++
 2 files changed, 24 insertions(+), 5 deletions(-)
arch/arm/boot/dts/dra7.dtsi +19 -5
index 2c9e56f4aac5..e9dc314b0dcf 100644
@@ -81,11 +81,7 @@
 			compatible = "arm,cortex-a15";
 			reg = <0>;
 
-			operating-points = <
-				/* kHz    uV */
-				1000000	1060000
-				1176000	1160000
-				>;
+			operating-points-v2 = <&cpu0_opp_table>;
 
 			clocks = <&dpll_mpu_ck>;
 			clock-names = "cpu";
@@ -99,6 +95,24 @@
 		};
 	};
 
+	cpu0_opp_table: opp-table {
+		compatible = "operating-points-v2-ti-cpu";
+		syscon = <&scm_wkup>;
+
+		opp_nom at 1000000000 {
+			opp-hz = /bits/ 64 <1000000000>;
+			opp-microvolt = <1060000 850000 1150000>;
+			opp-supported-hw = <0xFF 0x01>;
+			opp-suspend;
+		};
+
+		opp_od at 1176000000 {
+			opp-hz = /bits/ 64 <1176000000>;
+			opp-microvolt = <1160000 885000 1160000>;
+			opp-supported-hw = <0xFF 0x02>;
+		};
+	};
+
 	/*
 	 * The soc node represents the soc top level view. It is

used for IPs
* that are not memory mapped in the MPU view or for the MPU
itself. diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi index 0a78347e6615..24e6746c5b26 100644 --- a/arch/arm/boot/dts/dra74x.dtsi
+++ b/arch/arm/boot/dts/dra74x.dtsi

arch/arm/boot/dts/dra7.dtsi +1 -0
@@ -17,6 +17,7 @@
 			device_type = "cpu";
 			compatible = "arm,cortex-a15";
 			reg = <1>;
+			operating-points-v2 = <&cpu0_opp_table>;
 		};
 	};
 

arch/arm/boot/dts/dra7.dtsi line 89

Quoted 10 lines
arch/arm/boot/dts/dra7.dtsi +4 -0
@@ -79,6 +80,10 @@
 	};
 };
 
+&cpu0_opp_table {
+	opp-shared;
+};
+
 &dss {
 	reg = <0x58000000 0x80>,
 	      <0x58004054 0x4>,

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de

#9 lore raw

PATCH 5/5 ARM: omap2plus_defconfig: Enable support for ti-cpufreq

In reply to Dave Gerlach

AM335x, AM437x, DRA7xx, and AM57xx platforms all now depend on ti-cpufreq driver to enable proper OPPs for use with cpufreq, so enable the same.

---
 arch/arm/configs/omap2plus_defconfig | 1 +
 1 file changed, 1 insertion(+)
arch/arm/configs/omap2plus_defconfig +1 -0
index f2462a6bdba6..62a4b6cf16f0 100644
@@ -64,6 +64,7 @@ CONFIG_CPU_FREQ_GOV_POWERSAVE=y
 CONFIG_CPU_FREQ_GOV_USERSPACE=y
 CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
 CONFIG_CPUFREQ_DT=m
+CONFIG_ARM_TI_CPUFREQ=y
 # CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set
 CONFIG_CPU_IDLE=y
 CONFIG_BINFMT_MISC=y
Signature · 1 line
2.11.0
#10 lore raw

PATCH 5/5 ARM: omap2plus_defconfig: Enable support for ti-cpufreq

Quoted 5 lines · On Mon, 6 Mar 2017 09:23:42 -0600 Dave Gerlach <[email protected]> wrote:

AM335x, AM437x, DRA7xx, and AM57xx platforms all now depend on ti-cpufreq driver to enable proper OPPs for use with cpufreq, so enable the same.

Quoted 5 lines
---
 arch/arm/configs/omap2plus_defconfig | 1 +
 1 file changed, 1 insertion(+)
(quoted diff) +0 -0
Quoted 11 lines

b/arch/arm/configs/omap2plus_defconfig index f2462a6bdba6..62a4b6cf16f0 100644 --- a/arch/arm/configs/omap2plus_defconfig +++ b/arch/arm/configs/omap2plus_defconfig @@ -64,6 +64,7 @@ CONFIG_CPU_FREQ_GOV_POWERSAVE=y CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y CONFIG_CPUFREQ_DT=m
+CONFIG_ARM_TI_CPUFREQ=y
# CONFIG_ARM_OMAP2PLUS_CPUFREQ is not set CONFIG_CPU_IDLE=y
CONFIG_BINFMT_MISC=y

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de

#11 lore raw

cover ARM: OMAP2+: Add and enable operating-points-v2

In reply to Dave Gerlach
Quoted 12 lines · Dave Gerlach

Hi,
This series adds the necessary changes to get proper operating-points-v2 tables for AM335x/AM437x/DRA7xx/AM57xx TI SoCs. Doing this enables the ti-cpufreq driver and allows the platform to detect which CPU OPPs are valid for the configuration in use and enable them.

This series adds complete tables for am335x and adds 1GHz support for all beaglebone black boards and updates the already merged but unused am437x table to match the finalized DT bindings. It also moves the existing dra7xx/am57xx OPPs to OPPv2 but does not enable 1.5GHz yet as this requires multiregulator support which will come at a later date.

Quoted 6 lines

Also, now that so many TI platforms will depend on the ti-cpufreq driver let's add CONFIG_ARM_TI_CPUFREQ to omap2plus_defconfig to enable it as part of the default configuration.

Pushed a branch containing these patches on top of v4.11-rc1 if anyone wants to try it out [1].

Signature · 1 line
viresh
maintainer
#12 lore raw

cover ARM: OMAP2+: Add and enable operating-points-v2

In reply to Dave Gerlach
Quoted 12 lines · Dave Gerlach

Hi,
This series adds the necessary changes to get proper operating-points-v2 tables for AM335x/AM437x/DRA7xx/AM57xx TI SoCs. Doing this enables the ti-cpufreq driver and allows the platform to detect which CPU OPPs are valid for the configuration in use and enable them.

This series adds complete tables for am335x and adds 1GHz support for all beaglebone black boards and updates the already merged but unused am437x table to match the finalized DT bindings. It also moves the existing dra7xx/am57xx OPPs to OPPv2 but does not enable 1.5GHz yet as this requires multiregulator support which will come at a later date.

Quoted 3 lines

Also, now that so many TI platforms will depend on the ti-cpufreq driver let's add CONFIG_ARM_TI_CPUFREQ to omap2plus_defconfig to enable it as part of the default configuration.

Applying all for v4.12 into dt-v2 and defconfig branches.

Thanks,

Tony