README.socfpga: Add readme update from Stefan Roese patch

index cb805cfd3a..63733a986e 100644
@@ -1,4 +1,3 @@
-
 --------------------------------------------
 SOCFPGA Documentation for U-Boot and SPL
 --------------------------------------------

@@ -11,8 +10,92 @@ www.altera.com.
 --------------------------------------------
 socfpga_dw_mmc
 --------------------------------------------
-Here are macro and detailed configuration required to enable DesignWare SDMMC
+Here are macro and detailed configuration required to enable DesignWare SDMMC   
 controller support within SOCFPGA
 
-#define CONFIG_SYS_MMC_MAX_BLK_COUNT	256
+#define CONFIG_SYS_MMC_MAX_BLK_COUNT    256
 -> Using smaller max blk cnt to avoid flooding the limited stack in OCRAM
+
+-------------------------------------------------------------------------
+Generating the header files for SPL intergration as a replacement for the
+Preloader
+-------------------------------------------------------------------------
+This text assumes the use of Quartus 14.0.200
+
+I) Rebuilding the MCVEVK Quartus project
+----------------------------------------
+ 1) Navigate to DENX_MCV_reference_* directory
+ 2) Run Quartus II
+ 3) Open Project (Ctrl+J), select DENX_MCV_reference.qpf
+ 4) Run QSys [Tools->QSys]
+    4.1) In the Open dialog, select 'mcv_hps.qsys'
+    4.2) In the Open System dialog, wait until completion and press 'Close'
+    4.3) In the Qsys window, click on 'Generate HDL...' in bottom right corner
+         4.3.1) In the 'Generation' window, click 'Generate'
+	 4.3.2) In the 'Generate' dialog, wait until completion and click 'Close'
+    4.4) In the QSys window, click 'Finish'
+         4.4.1) In the 'Quartus II' pop up window, click 'OK'
+ 5) Back in Quartus II main window, do the following
+    5.1) Use Processing -> Start -> Start Analysis & Synthesis (Ctrl+K)
+    5.2) Use Processing -> Start Compilation (Ctrl+L)
+    ... have lunch, coffee, play games ...
+
+ [
+   NOTE: Steps 2-5 above can be also done using a convenience scripts
+         from the command line:
+	 $ ./qsys.sh && ./anal.sh && ./build.sh
+ ]
+
+ 6) Launch a separate terminal window
+    6.1) Change directory to 'software/spl_bsp'
+    6.2) Export path to embedded command shell and friends
+         $ export PATH=/work/DENX/Altera/Quartus/14.0/embedded/:$PATH
+    6.3) Start embedded command shell (ECS)
+         $ embedded_command_shell.sh
+    6.4) Prepare BSP by launching the BSP editor from ECS
+         => bsp-editor
+    6.5) In BSP editor
+         6.5.1) Use File -> Open
+	 6.5.2) Select 'settings.bsp' file
+	 6.5.4) Click Generate
+	 6.5.5) Click Exit
+
+Now the necessary files are generated. And U-Boot can be used to generate 
+the SPL header files. For this, please use the following script from the
+u-boot source tree::
+
+  $ ./arch/arm/mach-socfpga/qts-filter.sh [soc_type] [input_qts_dir] [input_bsp_dir] [output_dir]
+  
+  Process QTS-generated headers into U-Boot compatible ones.
+  
+    soc_type      - Type of SoC, either 'cyclone5' or 'arria5'.
+    input_qts_dir - Directory with compiled Quartus project
+                    and containing the Quartus project file (QPF).
+    input_bsp_dir - Directory with generated bsp containing
+                    the settings.bsp file.
+    output_dir    - Directory to store the U-Boot compatible
+                    headers.
+
+This will generate the following 4 files:
+
+iocsr_config.h
+pinmux_config.h
+pll_config.h
+sdram_config.h
+
+These files need to be copied into "qts" directory in the board directory
+(see output arg of script command above).
+
+Here the example for the DENX MCVEVK:
+
+$ ll board/denx/mcvevk/qts/
+total 44
+drwxrwxr-x 2 stefan stefan 4096 Okt 20 07:07 ./
+drwxrwxr-x 3 stefan stefan 4096 Okt 21 13:06 ../
+-rw-rw-r-- 1 stefan stefan 8826 Okt 20 07:07 iocsr_config.h
+-rw-rw-r-- 1 stefan stefan 4398 Okt 20 07:07 pinmux_config.h
+-rw-rw-r-- 1 stefan stefan 3192 Okt 20 07:07 pll_config.h
+-rw-rw-r-- 1 stefan stefan 9031 Okt 20 07:07 sdram_config.h
+
+Now your board is ready for full mainline support including
+U-Boot SPL. The Preloader will not be needed any more.

index 63733a986e..3110161753 100644
@@ -20,7 +20,9 @@ controller support within SOCFPGA
 Generating the header files for SPL intergration as a replacement for the
 Preloader
 -------------------------------------------------------------------------
-This text assumes the use of Quartus 14.0.200
+This text has been updated based on testing with Quartus Lite 16.1 and a fixed
+DE1_SOC_Linux_FB demo project (https://github.com/VCTLabs/DE1_SOC_Linux_FB).
+FB project can be built manually (as below) or with the project Makefile.
 
 I) Rebuilding the MCVEVK Quartus project
 ----------------------------------------

@@ -60,14 +62,14 @@ I) Rebuilding the MCVEVK Quartus project
 	 6.5.4) Click Generate
 	 6.5.5) Click Exit
 
-Now the necessary files are generated. And U-Boot can be used to generate 
+Now the necessary files are generated. And U-Boot can be used to generate
 the SPL header files. For this, please use the following script from the
 u-boot source tree::
 
   $ ./arch/arm/mach-socfpga/qts-filter.sh [soc_type] [input_qts_dir] [input_bsp_dir] [output_dir]
-  
+
   Process QTS-generated headers into U-Boot compatible ones.
-  
+
     soc_type      - Type of SoC, either 'cyclone5' or 'arria5'.
     input_qts_dir - Directory with compiled Quartus project
                     and containing the Quartus project file (QPF).